From: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com>
To: <bp@alien8.de>, <tony.luck@intel.com>, <hpa@zytor.com>,
<mingo@redhat.com>, <tglx@linutronix.de>,
<dougthompson@xmission.com>, <mchehab@osg.samsung.com>
Cc: <x86@kernel.org>, <linux-edac@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <ashok.raj@intel.com>,
<gong.chen@linux.intel.com>, <len.brown@intel.com>,
<peterz@infradead.org>, <ak@linux.intel.com>,
<alexander.shishkin@linux.intel.com>
Subject: Re: [PATCH 2/4] x86/mce/AMD: Fix logic to obtain block address
Date: Thu, 18 Feb 2016 09:38:29 -0600 [thread overview]
Message-ID: <56C5E575.8040301@amd.com> (raw)
In-Reply-To: <1455659111-32074-3-git-send-email-Aravind.Gopalakrishnan@amd.com>
On 2/16/2016 3:45 PM, Aravind Gopalakrishnan wrote:
> In upcoming processors, the BLKPTR field is no longer used
> to indicate the MSR number of the additional register.
> Insted, it simply indicates the prescence of additional MSRs.
>
> Fixing the logic here to gather MSR address from
> MSR_AMD64_SMCA_MCx_MISC() for newer processors
> and we fall back to existing logic for older processors.
>
> Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
> ---
Caught couple of issues-
>
> + /* Fall back to method we used for older processors */
> + switch (block) {
> + case 0:
> + addr = MSR_IA32_MCx_MISC(bank);
> + break;
> + case 1:
> + offset = ((low & MASK_BLKPTR_LO) >> 21);
> + if (offset)
> + addr = MCG_XBLK_ADDR + offset;
> + break;
> + default:
> + addr = current_addr++;
> + }
> +
This needs to be addr = ++current_addr;
>
> + address = get_block_address(address, high, low,
> + bank, block);
The 'high' and 'low' variables need to be swapped.
Missed this during a rebase to latest tip, Apologies..
>
> + address = get_block_address(address, high, low,
> + bank, block);
and here..
> + address = get_block_address(address, high, low, bank, ++block);
> +
and here..
> + if (!address)
> + return 0;
>
>
Apologies, these didn't show up on initial testing locally..
Fixed these on local branch and it seems to work fine.
I'll send it out as a V2 (Shall wait for further comments/reviews before
I do that).
Thanks,
-Aravind.
next prev parent reply other threads:[~2016-02-18 15:38 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-16 21:45 [PATCH 0/4] Updates to EDAC and AMD MCE driver Aravind Gopalakrishnan
2016-02-16 21:45 ` [PATCH 1/4] EDAC, MCE, AMD: Enable error decoding of Scalable MCA errors Aravind Gopalakrishnan
2016-02-23 12:37 ` Borislav Petkov
2016-02-23 22:50 ` Aravind Gopalakrishnan
2016-02-24 11:28 ` Borislav Petkov
2016-02-24 17:57 ` Aravind Gopalakrishnan
2016-02-16 21:45 ` [PATCH 2/4] x86/mce/AMD: Fix logic to obtain block address Aravind Gopalakrishnan
2016-02-18 15:38 ` Aravind Gopalakrishnan [this message]
2016-02-23 12:39 ` Borislav Petkov
2016-02-23 22:56 ` Aravind Gopalakrishnan
2016-02-24 11:33 ` Borislav Petkov
2016-02-24 18:02 ` Aravind Gopalakrishnan
2016-02-24 20:15 ` Boris Petkov
2016-02-16 21:45 ` [PATCH 3/4] x86/mce: Clarify comments regarding deferred error Aravind Gopalakrishnan
2016-02-23 12:11 ` Borislav Petkov
2016-02-23 23:02 ` Aravind Gopalakrishnan
2016-02-24 11:37 ` Borislav Petkov
2016-02-24 18:06 ` Aravind Gopalakrishnan
2016-02-24 20:13 ` Boris Petkov
2016-02-16 21:45 ` [PATCH 4/4] x86/mce/AMD: Add comments for easier understanding Aravind Gopalakrishnan
2016-02-23 12:35 ` Borislav Petkov
2016-02-24 18:26 ` Aravind Gopalakrishnan
2016-02-26 17:44 ` Borislav Petkov
2016-02-26 19:08 ` Aravind Gopalakrishnan
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