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From: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: <tony.luck@intel.com>, <hpa@zytor.com>, <mingo@redhat.com>,
	<tglx@linutronix.de>, <dougthompson@xmission.com>,
	<mchehab@osg.samsung.com>, <x86@kernel.org>,
	<linux-edac@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<ashok.raj@intel.com>, <gong.chen@linux.intel.com>,
	<len.brown@intel.com>, <peterz@infradead.org>,
	<ak@linux.intel.com>, <alexander.shishkin@linux.intel.com>
Subject: Re: [PATCH 4/4] x86/mce/AMD: Add comments for easier understanding
Date: Fri, 26 Feb 2016 13:08:20 -0600	[thread overview]
Message-ID: <56D0A2A4.6030406@amd.com> (raw)
In-Reply-To: <20160226174402.GF28911@pd.tnic>

On 2/26/2016 11:44 AM, Borislav Petkov wrote:
>
> threshold_restart_bank() reprograms the MISC MSR after sanity-checking
> the fields supplied for that MSR. store_threshold_limit() sets the error
> count, store_interrupt_enable() enables/disables the interrupt and both
> call threshold_restart_bank() to do that.
>
> But this is basically spelling the code now - I don't think we need to
> comment in that detail.

Ok, Have dropped this for V2.

> /*
>   * Called via smp_call_function_single(), must be called with correct
>   * cpu affinity.
>   */
>
> is also useless.

Will remove these as well.

>> "This function provides user with capabilities to re-program the
>> 'thresold_limit' and 'interrupt_enable' sysfs attributes"
> No sorry, I don't want to be explaining every line. Just say: "Reprogram
> the MISC MSR behind this threshold bank."
>

Ok, Will do that.

Btw, included comments around struct threshold_block to describethe members.
Do let me know if this seems OK-

  struct threshold_block {
-       unsigned int            block;
-       unsigned int            bank;
-       unsigned int            cpu;
-       u32                     address;
-       u16                     interrupt_enable;
-       bool                    interrupt_capable;
-       u16                     threshold_limit;
-       struct kobject          kobj;
-       struct list_head        miscj;
+       unsigned int            block;                  /* Threshold 
block number within bank */
+       unsigned int            bank;                   /* MCA bank the 
block belongs to */
+       unsigned int            cpu;                    /* CPU which 
controls the MCA bank */
+       u32                     address;                /* MSR address 
for the block */
+       u16                     interrupt_enable;       /* Enable/ 
Disable APIC interrupt upon threshold error */
+       bool                    interrupt_capable;      /* Specifies if 
interrupt is possible from the block */
+       u16                     threshold_limit;        /* Value upon 
which threshold interrupt is generated */
+       struct kobject          kobj;                   /* sysfs object */
+       struct list_head        miscj;                  /* Add multiple 
threshold blocks within a bank to the list */
  };

Thanks,
-Aravind.

      reply	other threads:[~2016-02-26 19:08 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-16 21:45 [PATCH 0/4] Updates to EDAC and AMD MCE driver Aravind Gopalakrishnan
2016-02-16 21:45 ` [PATCH 1/4] EDAC, MCE, AMD: Enable error decoding of Scalable MCA errors Aravind Gopalakrishnan
2016-02-23 12:37   ` Borislav Petkov
2016-02-23 22:50     ` Aravind Gopalakrishnan
2016-02-24 11:28       ` Borislav Petkov
2016-02-24 17:57         ` Aravind Gopalakrishnan
2016-02-16 21:45 ` [PATCH 2/4] x86/mce/AMD: Fix logic to obtain block address Aravind Gopalakrishnan
2016-02-18 15:38   ` Aravind Gopalakrishnan
2016-02-23 12:39   ` Borislav Petkov
2016-02-23 22:56     ` Aravind Gopalakrishnan
2016-02-24 11:33       ` Borislav Petkov
2016-02-24 18:02         ` Aravind Gopalakrishnan
2016-02-24 20:15           ` Boris Petkov
2016-02-16 21:45 ` [PATCH 3/4] x86/mce: Clarify comments regarding deferred error Aravind Gopalakrishnan
2016-02-23 12:11   ` Borislav Petkov
2016-02-23 23:02     ` Aravind Gopalakrishnan
2016-02-24 11:37       ` Borislav Petkov
2016-02-24 18:06         ` Aravind Gopalakrishnan
2016-02-24 20:13           ` Boris Petkov
2016-02-16 21:45 ` [PATCH 4/4] x86/mce/AMD: Add comments for easier understanding Aravind Gopalakrishnan
2016-02-23 12:35   ` Borislav Petkov
2016-02-24 18:26     ` Aravind Gopalakrishnan
2016-02-26 17:44       ` Borislav Petkov
2016-02-26 19:08         ` Aravind Gopalakrishnan [this message]

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