* [PATCH v2 0/5] Support for Broadcom Vulcan ARM64 processor
@ 2016-02-20 14:19 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-20 14:19 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Rob Herring, Arnd Bergmann,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w
Cc: Jayachandran C
This patchset adds support for Broadcom's Vulcan ARM64 processor.
The changes are to add the device tree files, documentation for the
device tree, cpu ID and the maintainers entry.
This is v2 of the patchset, changelog below:
v1->v2 :
- dts: remove memreserve, use brcm,vulcan-soc for board
(to address comments from Mark Rutland)
- Fixup copyright (Broadcomp corp -> Broadcom)
(suggested by Florian Fainelli)
- Rename dts from brcm-vulcan* to vulcan*
(suggested by Ray Jui)
- Add maintainers entry
(suggested by Florian Fainelli)
- Updated the device tree doc and fixed a couple of commit
comments
Jayachandran C (4):
dt-bindings: Add documentation for Broadcom Vulcan
arm64: defconfig: Add Broadcom Vulcan to defconfig
arm64: cputype info for Broadcom Vulcan
MAINTAINERS: Add entry for Broadcom Vulcan SoC
Zi Shen Lim (1):
arm64: Broadcom Vulcan support
.../bindings/arm/bcm/brcm,vulcan-soc.txt | 10 ++
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
MAINTAINERS | 7 +
arch/arm64/Kconfig.platforms | 5 +
arch/arm64/boot/dts/broadcom/Makefile | 1 +
arch/arm64/boot/dts/broadcom/vulcan-eval.dts | 33 +++++
arch/arm64/boot/dts/broadcom/vulcan.dtsi | 144 +++++++++++++++++++++
arch/arm64/configs/defconfig | 1 +
arch/arm64/include/asm/cputype.h | 3 +
9 files changed, 205 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.txt
create mode 100644 arch/arm64/boot/dts/broadcom/vulcan-eval.dts
create mode 100644 arch/arm64/boot/dts/broadcom/vulcan.dtsi
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v2 1/5] arm64: Broadcom Vulcan support
@ 2016-02-20 14:19 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-20 14:19 UTC (permalink / raw)
To: linux-arm-kernel
From: Zi Shen Lim <zlim@broadcom.com>
Add a configuration option and a device tree for Broadcom's Vulcan
ARM64 processor. vulcan.dtsi has the on-chip blocks like the PCIe
controller, GICv3 with ITS, PMU, system timer and the pl011 UART.
vulcan-eval.dts has definitions for a basic evaluation board.
Vulcan's processor cores support the ARMv8.1 instruction set and
will use "brcm,vulcan" as the compatible property. The firmware
has PSCI 0.2 support for cpu wakeup.
Signed-off-by: Zi Shen Lim <zlim@broadcom.com>
[ updated and split dts - jchandra at broadcom.com ]
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
---
arch/arm64/Kconfig.platforms | 5 +
arch/arm64/boot/dts/broadcom/Makefile | 1 +
arch/arm64/boot/dts/broadcom/vulcan-eval.dts | 33 ++++++
arch/arm64/boot/dts/broadcom/vulcan.dtsi | 144 +++++++++++++++++++++++++++
4 files changed, 183 insertions(+)
create mode 100644 arch/arm64/boot/dts/broadcom/vulcan-eval.dts
create mode 100644 arch/arm64/boot/dts/broadcom/vulcan.dtsi
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 21074f6..75e1bfe 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -131,6 +131,11 @@ config ARCH_VEXPRESS
This enables support for the ARMv8 software model (Versatile
Express).
+config ARCH_VULCAN
+ bool "Broadcom Vulcan SOC Family"
+ help
+ This enables support for Broadcom Vulcan SoC Family
+
config ARCH_XGENE
bool "AppliedMicro X-Gene SOC Family"
help
diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
index e21fe66..bec1f8b 100644
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -1,4 +1,5 @@
dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb
+dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/broadcom/vulcan-eval.dts b/arch/arm64/boot/dts/broadcom/vulcan-eval.dts
new file mode 100644
index 0000000..9ee8d3d
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/vulcan-eval.dts
@@ -0,0 +1,33 @@
+/*
+ * dts file for Broadcom (BRCM) Vulcan Evaluation Platform
+ *
+ * Copyright (c) 2013-2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/dts-v1/;
+
+#include "vulcan.dtsi"
+
+/ {
+ model = "Broadcom Vulcan Eval Platform";
+ compatible = "brcm,vulcan-eval", "brcm,vulcan-soc";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
+ <0x00000008 0x80000000 0x0 0x80000000>; /* 2G @ 34G */
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
diff --git a/arch/arm64/boot/dts/broadcom/vulcan.dtsi b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
new file mode 100644
index 0000000..c49b5a8
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
@@ -0,0 +1,144 @@
+/*
+ * dtsi file for Broadcom (BRCM) Vulcan processor
+ *
+ * Copyright (c) 2013-2016 Broadcom
+ * Author: Zi Shen Lim <zlim@broadcom.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ model = "Broadcom Vulcan";
+ compatible = "brcm,vulcan-soc";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ /* just 4 cpus now, 128 needed in full config */
+ cpus {
+ #address-cells = <0x2>;
+ #size-cells = <0x0>;
+
+ cpu at 0 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ };
+
+ cpu at 1 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ };
+
+ cpu at 2 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x2>;
+ enable-method = "psci";
+ };
+
+ cpu at 3 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x3>;
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ gic: interrupt-controller at 400080000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ interrupt-controller;
+ #redistributor-regions = <1>;
+ reg = <0x04 0x00080000 0x0 0x20000>, /* GICD */
+ <0x04 0x01000000 0x0 0x1000000>; /* GICR */
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+
+ gicits: gic-its at 40010000 {
+ compatible = "arm,gic-v3-its";
+ msi-controller;
+ reg = <0x04 0x00100000 0x0 0x20000>; /* GIC ITS */
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; /* PMU overflow */
+ };
+
+ clk125mhz: uart_clk125mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <125000000>;
+ clock-output-names = "clk125mhz";
+ };
+
+ pci {
+ compatible = "pci-host-ecam-generic";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ /* ECAM at 0x3000_0000 - 0x4000_0000 */
+ reg = <0x0 0x30000000 0x0 0x10000000>;
+ reg-names = "PCI ECAM";
+
+ /* IO 0x4000_0000 - 0x4001_0000 */
+ ranges = <0x01000000 0 0x40000000 0 0x40000000 0 0x00010000
+ /* MEM 0x4800_0000 - 0x5000_0000 */
+ 0x02000000 0 0x48000000 0 0x48000000 0 0x08000000
+ /* MEM64 pref 0x6_0000_0000 - 0x7_0000_0000 */
+ 0x43000000 6 0x00000000 6 0x00000000 1 0x00000000>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map =
+ /* addr pin ic icaddr icintr */
+ <0 0 0 1 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 2 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 3 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 4 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ msi-parent = <&gicits>;
+ dma-coherent;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ uart0: serial at 402020000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x04 0x02020000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk125mhz>;
+ clock-names = "apb_pclk";
+ };
+ };
+
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH v2 1/5] arm64: Broadcom Vulcan support
@ 2016-02-20 14:19 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-20 14:19 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Rob Herring, Arnd Bergmann,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w
Cc: Zi Shen Lim, Jayachandran C
From: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
Add a configuration option and a device tree for Broadcom's Vulcan
ARM64 processor. vulcan.dtsi has the on-chip blocks like the PCIe
controller, GICv3 with ITS, PMU, system timer and the pl011 UART.
vulcan-eval.dts has definitions for a basic evaluation board.
Vulcan's processor cores support the ARMv8.1 instruction set and
will use "brcm,vulcan" as the compatible property. The firmware
has PSCI 0.2 support for cpu wakeup.
Signed-off-by: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
[ updated and split dts - jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org ]
Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
arch/arm64/Kconfig.platforms | 5 +
arch/arm64/boot/dts/broadcom/Makefile | 1 +
arch/arm64/boot/dts/broadcom/vulcan-eval.dts | 33 ++++++
arch/arm64/boot/dts/broadcom/vulcan.dtsi | 144 +++++++++++++++++++++++++++
4 files changed, 183 insertions(+)
create mode 100644 arch/arm64/boot/dts/broadcom/vulcan-eval.dts
create mode 100644 arch/arm64/boot/dts/broadcom/vulcan.dtsi
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 21074f6..75e1bfe 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -131,6 +131,11 @@ config ARCH_VEXPRESS
This enables support for the ARMv8 software model (Versatile
Express).
+config ARCH_VULCAN
+ bool "Broadcom Vulcan SOC Family"
+ help
+ This enables support for Broadcom Vulcan SoC Family
+
config ARCH_XGENE
bool "AppliedMicro X-Gene SOC Family"
help
diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
index e21fe66..bec1f8b 100644
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -1,4 +1,5 @@
dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb
+dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/broadcom/vulcan-eval.dts b/arch/arm64/boot/dts/broadcom/vulcan-eval.dts
new file mode 100644
index 0000000..9ee8d3d
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/vulcan-eval.dts
@@ -0,0 +1,33 @@
+/*
+ * dts file for Broadcom (BRCM) Vulcan Evaluation Platform
+ *
+ * Copyright (c) 2013-2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/dts-v1/;
+
+#include "vulcan.dtsi"
+
+/ {
+ model = "Broadcom Vulcan Eval Platform";
+ compatible = "brcm,vulcan-eval", "brcm,vulcan-soc";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
+ <0x00000008 0x80000000 0x0 0x80000000>; /* 2G @ 34G */
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
diff --git a/arch/arm64/boot/dts/broadcom/vulcan.dtsi b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
new file mode 100644
index 0000000..c49b5a8
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
@@ -0,0 +1,144 @@
+/*
+ * dtsi file for Broadcom (BRCM) Vulcan processor
+ *
+ * Copyright (c) 2013-2016 Broadcom
+ * Author: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ model = "Broadcom Vulcan";
+ compatible = "brcm,vulcan-soc";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ /* just 4 cpus now, 128 needed in full config */
+ cpus {
+ #address-cells = <0x2>;
+ #size-cells = <0x0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x2>;
+ enable-method = "psci";
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x3>;
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ gic: interrupt-controller@400080000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ interrupt-controller;
+ #redistributor-regions = <1>;
+ reg = <0x04 0x00080000 0x0 0x20000>, /* GICD */
+ <0x04 0x01000000 0x0 0x1000000>; /* GICR */
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+
+ gicits: gic-its@40010000 {
+ compatible = "arm,gic-v3-its";
+ msi-controller;
+ reg = <0x04 0x00100000 0x0 0x20000>; /* GIC ITS */
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; /* PMU overflow */
+ };
+
+ clk125mhz: uart_clk125mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <125000000>;
+ clock-output-names = "clk125mhz";
+ };
+
+ pci {
+ compatible = "pci-host-ecam-generic";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ /* ECAM at 0x3000_0000 - 0x4000_0000 */
+ reg = <0x0 0x30000000 0x0 0x10000000>;
+ reg-names = "PCI ECAM";
+
+ /* IO 0x4000_0000 - 0x4001_0000 */
+ ranges = <0x01000000 0 0x40000000 0 0x40000000 0 0x00010000
+ /* MEM 0x4800_0000 - 0x5000_0000 */
+ 0x02000000 0 0x48000000 0 0x48000000 0 0x08000000
+ /* MEM64 pref 0x6_0000_0000 - 0x7_0000_0000 */
+ 0x43000000 6 0x00000000 6 0x00000000 1 0x00000000>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map =
+ /* addr pin ic icaddr icintr */
+ <0 0 0 1 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 2 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 3 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 4 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ msi-parent = <&gicits>;
+ dma-coherent;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ uart0: serial@402020000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x04 0x02020000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk125mhz>;
+ clock-names = "apb_pclk";
+ };
+ };
+
+};
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 2/5] dt-bindings: Add documentation for Broadcom Vulcan
@ 2016-02-20 14:19 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-20 14:19 UTC (permalink / raw)
To: linux-arm-kernel
Update arm/cpus.txt to add "brcm,vulcan" CPU. Add documentation
for Broadcom Vulcan boards in arm/bcm/brcm,vulcan-soc.txt
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
---
Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.txt | 10 ++++++++++
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
2 files changed, 11 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.txt
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.txt
new file mode 100644
index 0000000..223ed34
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.txt
@@ -0,0 +1,10 @@
+Broadcom Vulcan device tree bindings
+------------------------------------
+
+Boards with Broadcom Vulcan shall have the following root property:
+
+Broadcom Vulcan Evaluation Board:
+ compatible = "brcm,vulcan-eval", "brcm,vulcan-soc";
+
+Generic Vulcan board:
+ compatible = "brcm,vulcan-soc";
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index ae9be07..bc43ad7 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -167,6 +167,7 @@ nodes to be present and contain the properties described below.
"arm,cortex-r5"
"arm,cortex-r7"
"brcm,brahma-b15"
+ "brcm,vulcan"
"cavium,thunder"
"faraday,fa526"
"intel,sa110"
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 2/5] dt-bindings: Add documentation for Broadcom Vulcan
@ 2016-02-20 14:19 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-20 14:19 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Rob Herring, Arnd Bergmann,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w
Cc: Jayachandran C
Update arm/cpus.txt to add "brcm,vulcan" CPU. Add documentation
for Broadcom Vulcan boards in arm/bcm/brcm,vulcan-soc.txt
Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.txt | 10 ++++++++++
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
2 files changed, 11 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.txt
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.txt
new file mode 100644
index 0000000..223ed34
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.txt
@@ -0,0 +1,10 @@
+Broadcom Vulcan device tree bindings
+------------------------------------
+
+Boards with Broadcom Vulcan shall have the following root property:
+
+Broadcom Vulcan Evaluation Board:
+ compatible = "brcm,vulcan-eval", "brcm,vulcan-soc";
+
+Generic Vulcan board:
+ compatible = "brcm,vulcan-soc";
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index ae9be07..bc43ad7 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -167,6 +167,7 @@ nodes to be present and contain the properties described below.
"arm,cortex-r5"
"arm,cortex-r7"
"brcm,brahma-b15"
+ "brcm,vulcan"
"cavium,thunder"
"faraday,fa526"
"intel,sa110"
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 3/5] arm64: defconfig: Add Broadcom Vulcan to defconfig
@ 2016-02-20 14:19 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-20 14:19 UTC (permalink / raw)
To: linux-arm-kernel
Enable Broadcom Vulcan support in arm64 default configuration. This will
build the device tree needed to boot on a Broadcom Vulcan board.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 86581f7..6c1b3a6 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -47,6 +47,7 @@ CONFIG_ARCH_SPRD=y
CONFIG_ARCH_THUNDER=y
CONFIG_ARCH_UNIPHIER=y
CONFIG_ARCH_VEXPRESS=y
+CONFIG_ARCH_VULCAN=y
CONFIG_ARCH_XGENE=y
CONFIG_ARCH_ZYNQMP=y
CONFIG_PCI=y
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 3/5] arm64: defconfig: Add Broadcom Vulcan to defconfig
@ 2016-02-20 14:19 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-20 14:19 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Rob Herring, Arnd Bergmann,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w
Cc: Jayachandran C
Enable Broadcom Vulcan support in arm64 default configuration. This will
build the device tree needed to boot on a Broadcom Vulcan board.
Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 86581f7..6c1b3a6 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -47,6 +47,7 @@ CONFIG_ARCH_SPRD=y
CONFIG_ARCH_THUNDER=y
CONFIG_ARCH_UNIPHIER=y
CONFIG_ARCH_VEXPRESS=y
+CONFIG_ARCH_VULCAN=y
CONFIG_ARCH_XGENE=y
CONFIG_ARCH_ZYNQMP=y
CONFIG_PCI=y
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 4/5] arm64: cputype info for Broadcom Vulcan
@ 2016-02-20 14:19 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-20 14:19 UTC (permalink / raw)
To: linux-arm-kernel
Add Broadcom Vulcan implementor ID and part ID in cputype.h. This is
to document the values.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
---
arch/arm64/include/asm/cputype.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 1a59493..3dcecdf 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -65,6 +65,7 @@
#define ARM_CPU_IMP_ARM 0x41
#define ARM_CPU_IMP_APM 0x50
#define ARM_CPU_IMP_CAVIUM 0x43
+#define ARM_CPU_IMP_BRCM 0x42
#define ARM_CPU_PART_AEM_V8 0xD0F
#define ARM_CPU_PART_FOUNDATION 0xD00
@@ -75,6 +76,8 @@
#define CAVIUM_CPU_PART_THUNDERX 0x0A1
+#define BRCM_CPU_PART_VULCAN 0x516
+
#ifndef __ASSEMBLY__
/*
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 4/5] arm64: cputype info for Broadcom Vulcan
@ 2016-02-20 14:19 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-20 14:19 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Rob Herring, Arnd Bergmann,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w
Cc: Jayachandran C
Add Broadcom Vulcan implementor ID and part ID in cputype.h. This is
to document the values.
Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
Acked-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
Acked-by: Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>
---
arch/arm64/include/asm/cputype.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 1a59493..3dcecdf 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -65,6 +65,7 @@
#define ARM_CPU_IMP_ARM 0x41
#define ARM_CPU_IMP_APM 0x50
#define ARM_CPU_IMP_CAVIUM 0x43
+#define ARM_CPU_IMP_BRCM 0x42
#define ARM_CPU_PART_AEM_V8 0xD0F
#define ARM_CPU_PART_FOUNDATION 0xD00
@@ -75,6 +76,8 @@
#define CAVIUM_CPU_PART_THUNDERX 0x0A1
+#define BRCM_CPU_PART_VULCAN 0x516
+
#ifndef __ASSEMBLY__
/*
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 5/5] MAINTAINERS: Add entry for Broadcom Vulcan SoC
@ 2016-02-20 14:19 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-20 14:19 UTC (permalink / raw)
To: linux-arm-kernel
Add maintainer information for Broadcom's Vulcan arm64 SoC.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
---
MAINTAINERS | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index cc2f753..eac98eb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2512,6 +2512,13 @@ L: netdev at vger.kernel.org
S: Supported
F: drivers/net/ethernet/broadcom/bcmsysport.*
+BROADCOM VULCAN ARM64 SOC
+M: Jayachandran C. <jchandra@broadcom.com>
+L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
+L: bcm-kernel-feedback-list at broadcom.com
+S: Maintained
+F: arch/arm64/boot/dts/broadcom/vulcan*
+
BROCADE BFA FC SCSI DRIVER
M: Anil Gurumurthy <anil.gurumurthy@qlogic.com>
M: Sudarsana Kalluru <sudarsana.kalluru@qlogic.com>
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 5/5] MAINTAINERS: Add entry for Broadcom Vulcan SoC
@ 2016-02-20 14:19 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-20 14:19 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Rob Herring, Arnd Bergmann,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w
Cc: Jayachandran C
Add maintainer information for Broadcom's Vulcan arm64 SoC.
Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
MAINTAINERS | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index cc2f753..eac98eb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2512,6 +2512,13 @@ L: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
S: Supported
F: drivers/net/ethernet/broadcom/bcmsysport.*
+BROADCOM VULCAN ARM64 SOC
+M: Jayachandran C. <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
+L: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org (moderated for non-subscribers)
+L: bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org
+S: Maintained
+F: arch/arm64/boot/dts/broadcom/vulcan*
+
BROCADE BFA FC SCSI DRIVER
M: Anil Gurumurthy <anil.gurumurthy-h88ZbnxC6KDQT0dZR+AlfA@public.gmane.org>
M: Sudarsana Kalluru <sudarsana.kalluru-h88ZbnxC6KDQT0dZR+AlfA@public.gmane.org>
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 0/5] Support for Broadcom Vulcan ARM64 processor
@ 2016-02-20 19:50 ` Florian Fainelli
0 siblings, 0 replies; 24+ messages in thread
From: Florian Fainelli @ 2016-02-20 19:50 UTC (permalink / raw)
To: linux-arm-kernel
Le 20/02/2016 06:19, Jayachandran C a ?crit :
> This patchset adds support for Broadcom's Vulcan ARM64 processor.
> The changes are to add the device tree files, documentation for the
> device tree, cpu ID and the maintainers entry.
>
> This is v2 of the patchset, changelog below:
>
> v1->v2 :
> - dts: remove memreserve, use brcm,vulcan-soc for board
> (to address comments from Mark Rutland)
> - Fixup copyright (Broadcomp corp -> Broadcom)
> (suggested by Florian Fainelli)
> - Rename dts from brcm-vulcan* to vulcan*
> (suggested by Ray Jui)
> - Add maintainers entry
> (suggested by Florian Fainelli)
> - Updated the device tree doc and fixed a couple of commit
> comments
>
> Jayachandran C (4):
> dt-bindings: Add documentation for Broadcom Vulcan
> arm64: defconfig: Add Broadcom Vulcan to defconfig
> arm64: cputype info for Broadcom Vulcan
> MAINTAINERS: Add entry for Broadcom Vulcan SoC
>
> Zi Shen Lim (1):
> arm64: Broadcom Vulcan support
All applied and submitted for 4.6 thanks!
--
Florian
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 0/5] Support for Broadcom Vulcan ARM64 processor
@ 2016-02-20 19:50 ` Florian Fainelli
0 siblings, 0 replies; 24+ messages in thread
From: Florian Fainelli @ 2016-02-20 19:50 UTC (permalink / raw)
To: Jayachandran C, Catalin Marinas, Will Deacon, Rob Herring,
Arnd Bergmann, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w
Le 20/02/2016 06:19, Jayachandran C a écrit :
> This patchset adds support for Broadcom's Vulcan ARM64 processor.
> The changes are to add the device tree files, documentation for the
> device tree, cpu ID and the maintainers entry.
>
> This is v2 of the patchset, changelog below:
>
> v1->v2 :
> - dts: remove memreserve, use brcm,vulcan-soc for board
> (to address comments from Mark Rutland)
> - Fixup copyright (Broadcomp corp -> Broadcom)
> (suggested by Florian Fainelli)
> - Rename dts from brcm-vulcan* to vulcan*
> (suggested by Ray Jui)
> - Add maintainers entry
> (suggested by Florian Fainelli)
> - Updated the device tree doc and fixed a couple of commit
> comments
>
> Jayachandran C (4):
> dt-bindings: Add documentation for Broadcom Vulcan
> arm64: defconfig: Add Broadcom Vulcan to defconfig
> arm64: cputype info for Broadcom Vulcan
> MAINTAINERS: Add entry for Broadcom Vulcan SoC
>
> Zi Shen Lim (1):
> arm64: Broadcom Vulcan support
All applied and submitted for 4.6 thanks!
--
Florian
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 1/5] arm64: Broadcom Vulcan support
@ 2016-02-27 6:52 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-27 6:52 UTC (permalink / raw)
To: linux-arm-kernel
From: Zi Shen Lim <zlim@broadcom.com>
Add a configuration option and a device tree for Broadcom's Vulcan
ARM64 processor. vulcan.dtsi has the on-chip blocks like the PCIe
controller, GICv3 with ITS, PMU, system timer and the pl011 UART.
vulcan-eval.dts has definitions for a basic evaluation board.
Vulcan's processor cores support the ARMv8.1 instruction set and
will use "brcm,vulcan" as the compatible property. The firmware
has PSCI 0.2 support for cpu wakeup.
Signed-off-by: Zi Shen Lim <zlim@broadcom.com>
[ updated and split dts - jchandra at broadcom.com ]
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
---
There is a minor update to this patch.
After some discussions here, it looks like it is necessary to increase the
PCI mem and mem64 ranges to support all the use cases. We are updating the
firmware to use these ranges as well.
Hope it is not too late to fix this, sorry for the late churn.
Thanks,
JC.
v2->v3:
update ranges in the pci entry in vulcan.dtsi, changes are:
IO: removed, since it is not supported
MEM: 0x4800_0000-0x5000_0000 to 0x4000_0000-0x6000_0000
MEM 64: 0x6_0000_0000-0x7_0000_0000 to 0x40_0000_0000-0x60_0000_0000
arch/arm64/Kconfig.platforms | 5 +
arch/arm64/boot/dts/broadcom/Makefile | 1 +
arch/arm64/boot/dts/broadcom/vulcan-eval.dts | 33 ++++++
arch/arm64/boot/dts/broadcom/vulcan.dtsi | 147 +++++++++++++++++++++++++++
4 files changed, 186 insertions(+)
create mode 100644 arch/arm64/boot/dts/broadcom/vulcan-eval.dts
create mode 100644 arch/arm64/boot/dts/broadcom/vulcan.dtsi
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 21074f6..75e1bfe 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -131,6 +131,11 @@ config ARCH_VEXPRESS
This enables support for the ARMv8 software model (Versatile
Express).
+config ARCH_VULCAN
+ bool "Broadcom Vulcan SOC Family"
+ help
+ This enables support for Broadcom Vulcan SoC Family
+
config ARCH_XGENE
bool "AppliedMicro X-Gene SOC Family"
help
diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
index e21fe66..bec1f8b 100644
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -1,4 +1,5 @@
dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb
+dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/broadcom/vulcan-eval.dts b/arch/arm64/boot/dts/broadcom/vulcan-eval.dts
new file mode 100644
index 0000000..9ee8d3d
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/vulcan-eval.dts
@@ -0,0 +1,33 @@
+/*
+ * dts file for Broadcom (BRCM) Vulcan Evaluation Platform
+ *
+ * Copyright (c) 2013-2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/dts-v1/;
+
+#include "vulcan.dtsi"
+
+/ {
+ model = "Broadcom Vulcan Eval Platform";
+ compatible = "brcm,vulcan-eval", "brcm,vulcan-soc";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
+ <0x00000008 0x80000000 0x0 0x80000000>; /* 2G @ 34G */
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
diff --git a/arch/arm64/boot/dts/broadcom/vulcan.dtsi b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
new file mode 100644
index 0000000..85820e2
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
@@ -0,0 +1,147 @@
+/*
+ * dtsi file for Broadcom (BRCM) Vulcan processor
+ *
+ * Copyright (c) 2013-2016 Broadcom
+ * Author: Zi Shen Lim <zlim@broadcom.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ model = "Broadcom Vulcan";
+ compatible = "brcm,vulcan-soc";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ /* just 4 cpus now, 128 needed in full config */
+ cpus {
+ #address-cells = <0x2>;
+ #size-cells = <0x0>;
+
+ cpu at 0 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ };
+
+ cpu at 1 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ };
+
+ cpu at 2 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x2>;
+ enable-method = "psci";
+ };
+
+ cpu at 3 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x3>;
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ gic: interrupt-controller at 400080000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ interrupt-controller;
+ #redistributor-regions = <1>;
+ reg = <0x04 0x00080000 0x0 0x20000>, /* GICD */
+ <0x04 0x01000000 0x0 0x1000000>; /* GICR */
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+
+ gicits: gic-its at 40010000 {
+ compatible = "arm,gic-v3-its";
+ msi-controller;
+ reg = <0x04 0x00100000 0x0 0x20000>; /* GIC ITS */
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; /* PMU overflow */
+ };
+
+ clk125mhz: uart_clk125mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <125000000>;
+ clock-output-names = "clk125mhz";
+ };
+
+ pci {
+ compatible = "pci-host-ecam-generic";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ /* ECAM at 0x3000_0000 - 0x4000_0000 */
+ reg = <0x0 0x30000000 0x0 0x10000000>;
+ reg-names = "PCI ECAM";
+
+ /*
+ * PCI ranges:
+ * IO no supported
+ * MEM 0x4000_0000 - 0x6000_0000
+ * MEM64 pref 0x40_0000_0000 - 0x60_0000_0000
+ */
+ ranges =
+ <0x02000000 0 0x40000000 0 0x40000000 0 0x20000000
+ 0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map =
+ /* addr pin ic icaddr icintr */
+ <0 0 0 1 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 2 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 3 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 4 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ msi-parent = <&gicits>;
+ dma-coherent;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ uart0: serial at 402020000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x04 0x02020000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk125mhz>;
+ clock-names = "apb_pclk";
+ };
+ };
+
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH v3 1/5] arm64: Broadcom Vulcan support
@ 2016-02-27 6:52 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-27 6:52 UTC (permalink / raw)
To: Florian Fainelli, Catalin Marinas, Will Deacon, Rob Herring,
Arnd Bergmann, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w
Cc: Zi Shen Lim, Jayachandran C
From: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
Add a configuration option and a device tree for Broadcom's Vulcan
ARM64 processor. vulcan.dtsi has the on-chip blocks like the PCIe
controller, GICv3 with ITS, PMU, system timer and the pl011 UART.
vulcan-eval.dts has definitions for a basic evaluation board.
Vulcan's processor cores support the ARMv8.1 instruction set and
will use "brcm,vulcan" as the compatible property. The firmware
has PSCI 0.2 support for cpu wakeup.
Signed-off-by: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
[ updated and split dts - jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org ]
Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
There is a minor update to this patch.
After some discussions here, it looks like it is necessary to increase the
PCI mem and mem64 ranges to support all the use cases. We are updating the
firmware to use these ranges as well.
Hope it is not too late to fix this, sorry for the late churn.
Thanks,
JC.
v2->v3:
update ranges in the pci entry in vulcan.dtsi, changes are:
IO: removed, since it is not supported
MEM: 0x4800_0000-0x5000_0000 to 0x4000_0000-0x6000_0000
MEM 64: 0x6_0000_0000-0x7_0000_0000 to 0x40_0000_0000-0x60_0000_0000
arch/arm64/Kconfig.platforms | 5 +
arch/arm64/boot/dts/broadcom/Makefile | 1 +
arch/arm64/boot/dts/broadcom/vulcan-eval.dts | 33 ++++++
arch/arm64/boot/dts/broadcom/vulcan.dtsi | 147 +++++++++++++++++++++++++++
4 files changed, 186 insertions(+)
create mode 100644 arch/arm64/boot/dts/broadcom/vulcan-eval.dts
create mode 100644 arch/arm64/boot/dts/broadcom/vulcan.dtsi
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 21074f6..75e1bfe 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -131,6 +131,11 @@ config ARCH_VEXPRESS
This enables support for the ARMv8 software model (Versatile
Express).
+config ARCH_VULCAN
+ bool "Broadcom Vulcan SOC Family"
+ help
+ This enables support for Broadcom Vulcan SoC Family
+
config ARCH_XGENE
bool "AppliedMicro X-Gene SOC Family"
help
diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
index e21fe66..bec1f8b 100644
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -1,4 +1,5 @@
dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb
+dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/broadcom/vulcan-eval.dts b/arch/arm64/boot/dts/broadcom/vulcan-eval.dts
new file mode 100644
index 0000000..9ee8d3d
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/vulcan-eval.dts
@@ -0,0 +1,33 @@
+/*
+ * dts file for Broadcom (BRCM) Vulcan Evaluation Platform
+ *
+ * Copyright (c) 2013-2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/dts-v1/;
+
+#include "vulcan.dtsi"
+
+/ {
+ model = "Broadcom Vulcan Eval Platform";
+ compatible = "brcm,vulcan-eval", "brcm,vulcan-soc";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
+ <0x00000008 0x80000000 0x0 0x80000000>; /* 2G @ 34G */
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
diff --git a/arch/arm64/boot/dts/broadcom/vulcan.dtsi b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
new file mode 100644
index 0000000..85820e2
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
@@ -0,0 +1,147 @@
+/*
+ * dtsi file for Broadcom (BRCM) Vulcan processor
+ *
+ * Copyright (c) 2013-2016 Broadcom
+ * Author: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ model = "Broadcom Vulcan";
+ compatible = "brcm,vulcan-soc";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ /* just 4 cpus now, 128 needed in full config */
+ cpus {
+ #address-cells = <0x2>;
+ #size-cells = <0x0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x2>;
+ enable-method = "psci";
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "brcm,vulcan", "arm,armv8";
+ reg = <0x0 0x3>;
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ gic: interrupt-controller@400080000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ interrupt-controller;
+ #redistributor-regions = <1>;
+ reg = <0x04 0x00080000 0x0 0x20000>, /* GICD */
+ <0x04 0x01000000 0x0 0x1000000>; /* GICR */
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+
+ gicits: gic-its@40010000 {
+ compatible = "arm,gic-v3-its";
+ msi-controller;
+ reg = <0x04 0x00100000 0x0 0x20000>; /* GIC ITS */
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; /* PMU overflow */
+ };
+
+ clk125mhz: uart_clk125mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <125000000>;
+ clock-output-names = "clk125mhz";
+ };
+
+ pci {
+ compatible = "pci-host-ecam-generic";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ /* ECAM at 0x3000_0000 - 0x4000_0000 */
+ reg = <0x0 0x30000000 0x0 0x10000000>;
+ reg-names = "PCI ECAM";
+
+ /*
+ * PCI ranges:
+ * IO no supported
+ * MEM 0x4000_0000 - 0x6000_0000
+ * MEM64 pref 0x40_0000_0000 - 0x60_0000_0000
+ */
+ ranges =
+ <0x02000000 0 0x40000000 0 0x40000000 0 0x20000000
+ 0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map =
+ /* addr pin ic icaddr icintr */
+ <0 0 0 1 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 2 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 3 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 4 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ msi-parent = <&gicits>;
+ dma-coherent;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ uart0: serial@402020000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x04 0x02020000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk125mhz>;
+ clock-names = "apb_pclk";
+ };
+ };
+
+};
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH v3 1/5] arm64: Broadcom Vulcan support
@ 2016-02-27 20:03 ` Florian Fainelli
0 siblings, 0 replies; 24+ messages in thread
From: Florian Fainelli @ 2016-02-27 20:03 UTC (permalink / raw)
To: linux-arm-kernel
On 26/02/16 22:52, Jayachandran C wrote:
> From: Zi Shen Lim <zlim@broadcom.com>
>
> Add a configuration option and a device tree for Broadcom's Vulcan
> ARM64 processor. vulcan.dtsi has the on-chip blocks like the PCIe
> controller, GICv3 with ITS, PMU, system timer and the pl011 UART.
> vulcan-eval.dts has definitions for a basic evaluation board.
>
> Vulcan's processor cores support the ARMv8.1 instruction set and
> will use "brcm,vulcan" as the compatible property. The firmware
> has PSCI 0.2 support for cpu wakeup.
>
> Signed-off-by: Zi Shen Lim <zlim@broadcom.com>
> [ updated and split dts - jchandra at broadcom.com ]
> Signed-off-by: Jayachandran C <jchandra@broadcom.com>
> ---
>
> There is a minor update to this patch.
>
> After some discussions here, it looks like it is necessary to increase the
> PCI mem and mem64 ranges to support all the use cases. We are updating the
> firmware to use these ranges as well.
>
> Hope it is not too late to fix this, sorry for the late churn.
V2 got merged already into next/dt64 by the arm-soc maintainers, could
you provide an incremental patch to your v2? Thanks!
--
Florian
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 1/5] arm64: Broadcom Vulcan support
@ 2016-02-27 20:03 ` Florian Fainelli
0 siblings, 0 replies; 24+ messages in thread
From: Florian Fainelli @ 2016-02-27 20:03 UTC (permalink / raw)
To: Jayachandran C, Florian Fainelli, Catalin Marinas, Will Deacon,
Rob Herring, Arnd Bergmann, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w
Cc: Zi Shen Lim
On 26/02/16 22:52, Jayachandran C wrote:
> From: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
>
> Add a configuration option and a device tree for Broadcom's Vulcan
> ARM64 processor. vulcan.dtsi has the on-chip blocks like the PCIe
> controller, GICv3 with ITS, PMU, system timer and the pl011 UART.
> vulcan-eval.dts has definitions for a basic evaluation board.
>
> Vulcan's processor cores support the ARMv8.1 instruction set and
> will use "brcm,vulcan" as the compatible property. The firmware
> has PSCI 0.2 support for cpu wakeup.
>
> Signed-off-by: Zi Shen Lim <zlim-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> [ updated and split dts - jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org ]
> Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> ---
>
> There is a minor update to this patch.
>
> After some discussions here, it looks like it is necessary to increase the
> PCI mem and mem64 ranges to support all the use cases. We are updating the
> firmware to use these ranges as well.
>
> Hope it is not too late to fix this, sorry for the late churn.
V2 got merged already into next/dt64 by the arm-soc maintainers, could
you provide an incremental patch to your v2? Thanks!
--
Florian
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH] arm64: dts: vulcan: Update PCI ranges
@ 2016-02-28 7:37 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-28 7:37 UTC (permalink / raw)
To: linux-arm-kernel
The PCI memory windows available in vulcan.dtsi are limited to 128MB
for 32-bit BARs, and 4GB for 64-bit BARs. Given the memory mapped IO
space available in arm64, these windows can be increased substantially
to support more use cases.
The change increases the 32-bit window to 256MB and the 64-bit window
to 128 GB. The firmware on vulcan boards will use these ranges as well.
PCI IO windows are not supported on Vulcan, so remove them instead of
keeping an unused value.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
---
This is an update to the patch with subject
"arm64: Broadcom Vulcan support"
I had sent earlier, please fold it into that patch if possible
Thanks,
JC.
arch/arm64/boot/dts/broadcom/vulcan.dtsi | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/broadcom/vulcan.dtsi b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
index c49b5a8..85820e2 100644
--- a/arch/arm64/boot/dts/broadcom/vulcan.dtsi
+++ b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
@@ -108,12 +108,15 @@
reg = <0x0 0x30000000 0x0 0x10000000>;
reg-names = "PCI ECAM";
- /* IO 0x4000_0000 - 0x4001_0000 */
- ranges = <0x01000000 0 0x40000000 0 0x40000000 0 0x00010000
- /* MEM 0x4800_0000 - 0x5000_0000 */
- 0x02000000 0 0x48000000 0 0x48000000 0 0x08000000
- /* MEM64 pref 0x6_0000_0000 - 0x7_0000_0000 */
- 0x43000000 6 0x00000000 6 0x00000000 1 0x00000000>;
+ /*
+ * PCI ranges:
+ * IO no supported
+ * MEM 0x4000_0000 - 0x6000_0000
+ * MEM64 pref 0x40_0000_0000 - 0x60_0000_0000
+ */
+ ranges =
+ <0x02000000 0 0x40000000 0 0x40000000 0 0x20000000
+ 0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map =
/* addr pin ic icaddr icintr */
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH] arm64: dts: vulcan: Update PCI ranges
@ 2016-02-28 7:37 ` Jayachandran C
0 siblings, 0 replies; 24+ messages in thread
From: Jayachandran C @ 2016-02-28 7:37 UTC (permalink / raw)
To: Florian Fainelli, Rob Herring, Arnd Bergmann,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w
Cc: Jayachandran C
The PCI memory windows available in vulcan.dtsi are limited to 128MB
for 32-bit BARs, and 4GB for 64-bit BARs. Given the memory mapped IO
space available in arm64, these windows can be increased substantially
to support more use cases.
The change increases the 32-bit window to 256MB and the 64-bit window
to 128 GB. The firmware on vulcan boards will use these ranges as well.
PCI IO windows are not supported on Vulcan, so remove them instead of
keeping an unused value.
Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
This is an update to the patch with subject
"arm64: Broadcom Vulcan support"
I had sent earlier, please fold it into that patch if possible
Thanks,
JC.
arch/arm64/boot/dts/broadcom/vulcan.dtsi | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/broadcom/vulcan.dtsi b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
index c49b5a8..85820e2 100644
--- a/arch/arm64/boot/dts/broadcom/vulcan.dtsi
+++ b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
@@ -108,12 +108,15 @@
reg = <0x0 0x30000000 0x0 0x10000000>;
reg-names = "PCI ECAM";
- /* IO 0x4000_0000 - 0x4001_0000 */
- ranges = <0x01000000 0 0x40000000 0 0x40000000 0 0x00010000
- /* MEM 0x4800_0000 - 0x5000_0000 */
- 0x02000000 0 0x48000000 0 0x48000000 0 0x08000000
- /* MEM64 pref 0x6_0000_0000 - 0x7_0000_0000 */
- 0x43000000 6 0x00000000 6 0x00000000 1 0x00000000>;
+ /*
+ * PCI ranges:
+ * IO no supported
+ * MEM 0x4000_0000 - 0x6000_0000
+ * MEM64 pref 0x40_0000_0000 - 0x60_0000_0000
+ */
+ ranges =
+ <0x02000000 0 0x40000000 0 0x40000000 0 0x20000000
+ 0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map =
/* addr pin ic icaddr icintr */
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH] arm64: dts: vulcan: Update PCI ranges
@ 2016-03-11 20:16 ` Florian Fainelli
0 siblings, 0 replies; 24+ messages in thread
From: Florian Fainelli @ 2016-03-11 20:16 UTC (permalink / raw)
To: linux-arm-kernel
On 27/02/16 23:37, Jayachandran C wrote:
> The PCI memory windows available in vulcan.dtsi are limited to 128MB
> for 32-bit BARs, and 4GB for 64-bit BARs. Given the memory mapped IO
> space available in arm64, these windows can be increased substantially
> to support more use cases.
>
> The change increases the 32-bit window to 256MB and the 64-bit window
> to 128 GB. The firmware on vulcan boards will use these ranges as well.
>
> PCI IO windows are not supported on Vulcan, so remove them instead of
> keeping an unused value.
>
> Signed-off-by: Jayachandran C <jchandra@broadcom.com>
> ---
>
> This is an update to the patch with subject
> "arm64: Broadcom Vulcan support"
> I had sent earlier, please fold it into that patch if possible
Arnd, I do not have any other Broadcom ARM64 DT changes for 4.6 to be
sent at the moment, do you mind taking this patch directly?
Feel free to add my:
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Thanks!
>
> Thanks,
> JC.
>
>
> arch/arm64/boot/dts/broadcom/vulcan.dtsi | 15 +++++++++------
> 1 file changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/broadcom/vulcan.dtsi b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
> index c49b5a8..85820e2 100644
> --- a/arch/arm64/boot/dts/broadcom/vulcan.dtsi
> +++ b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
> @@ -108,12 +108,15 @@
> reg = <0x0 0x30000000 0x0 0x10000000>;
> reg-names = "PCI ECAM";
>
> - /* IO 0x4000_0000 - 0x4001_0000 */
> - ranges = <0x01000000 0 0x40000000 0 0x40000000 0 0x00010000
> - /* MEM 0x4800_0000 - 0x5000_0000 */
> - 0x02000000 0 0x48000000 0 0x48000000 0 0x08000000
> - /* MEM64 pref 0x6_0000_0000 - 0x7_0000_0000 */
> - 0x43000000 6 0x00000000 6 0x00000000 1 0x00000000>;
> + /*
> + * PCI ranges:
> + * IO no supported
> + * MEM 0x4000_0000 - 0x6000_0000
> + * MEM64 pref 0x40_0000_0000 - 0x60_0000_0000
> + */
> + ranges =
> + <0x02000000 0 0x40000000 0 0x40000000 0 0x20000000
> + 0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>;
> interrupt-map-mask = <0 0 0 7>;
> interrupt-map =
> /* addr pin ic icaddr icintr */
>
--
Florian
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH] arm64: dts: vulcan: Update PCI ranges
@ 2016-03-11 20:16 ` Florian Fainelli
0 siblings, 0 replies; 24+ messages in thread
From: Florian Fainelli @ 2016-03-11 20:16 UTC (permalink / raw)
To: Jayachandran C, Florian Fainelli, Rob Herring, Arnd Bergmann,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w
On 27/02/16 23:37, Jayachandran C wrote:
> The PCI memory windows available in vulcan.dtsi are limited to 128MB
> for 32-bit BARs, and 4GB for 64-bit BARs. Given the memory mapped IO
> space available in arm64, these windows can be increased substantially
> to support more use cases.
>
> The change increases the 32-bit window to 256MB and the 64-bit window
> to 128 GB. The firmware on vulcan boards will use these ranges as well.
>
> PCI IO windows are not supported on Vulcan, so remove them instead of
> keeping an unused value.
>
> Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> ---
>
> This is an update to the patch with subject
> "arm64: Broadcom Vulcan support"
> I had sent earlier, please fold it into that patch if possible
Arnd, I do not have any other Broadcom ARM64 DT changes for 4.6 to be
sent at the moment, do you mind taking this patch directly?
Feel free to add my:
Signed-off-by: Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Thanks!
>
> Thanks,
> JC.
>
>
> arch/arm64/boot/dts/broadcom/vulcan.dtsi | 15 +++++++++------
> 1 file changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/broadcom/vulcan.dtsi b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
> index c49b5a8..85820e2 100644
> --- a/arch/arm64/boot/dts/broadcom/vulcan.dtsi
> +++ b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
> @@ -108,12 +108,15 @@
> reg = <0x0 0x30000000 0x0 0x10000000>;
> reg-names = "PCI ECAM";
>
> - /* IO 0x4000_0000 - 0x4001_0000 */
> - ranges = <0x01000000 0 0x40000000 0 0x40000000 0 0x00010000
> - /* MEM 0x4800_0000 - 0x5000_0000 */
> - 0x02000000 0 0x48000000 0 0x48000000 0 0x08000000
> - /* MEM64 pref 0x6_0000_0000 - 0x7_0000_0000 */
> - 0x43000000 6 0x00000000 6 0x00000000 1 0x00000000>;
> + /*
> + * PCI ranges:
> + * IO no supported
> + * MEM 0x4000_0000 - 0x6000_0000
> + * MEM64 pref 0x40_0000_0000 - 0x60_0000_0000
> + */
> + ranges =
> + <0x02000000 0 0x40000000 0 0x40000000 0 0x20000000
> + 0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>;
> interrupt-map-mask = <0 0 0 7>;
> interrupt-map =
> /* addr pin ic icaddr icintr */
>
--
Florian
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH] arm64: dts: vulcan: Update PCI ranges
@ 2016-03-29 22:30 ` Arnd Bergmann
0 siblings, 0 replies; 24+ messages in thread
From: Arnd Bergmann @ 2016-03-29 22:30 UTC (permalink / raw)
To: linux-arm-kernel
On Friday 11 March 2016 12:16:15 Florian Fainelli wrote:
> On 27/02/16 23:37, Jayachandran C wrote:
> > The PCI memory windows available in vulcan.dtsi are limited to 128MB
> > for 32-bit BARs, and 4GB for 64-bit BARs. Given the memory mapped IO
> > space available in arm64, these windows can be increased substantially
> > to support more use cases.
> >
> > The change increases the 32-bit window to 256MB and the 64-bit window
> > to 128 GB. The firmware on vulcan boards will use these ranges as well.
> >
> > PCI IO windows are not supported on Vulcan, so remove them instead of
> > keeping an unused value.
> >
> > Signed-off-by: Jayachandran C <jchandra@broadcom.com>
> > ---
> >
> > This is an update to the patch with subject
> > "arm64: Broadcom Vulcan support"
> > I had sent earlier, please fold it into that patch if possible
>
> Arnd, I do not have any other Broadcom ARM64 DT changes for 4.6 to be
> sent at the moment, do you mind taking this patch directly?
>
> Feel free to add my:
>
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
>
>
Applied to the 4.6 fixes branch now, thanks!
Arnd
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH] arm64: dts: vulcan: Update PCI ranges
@ 2016-03-29 22:30 ` Arnd Bergmann
0 siblings, 0 replies; 24+ messages in thread
From: Arnd Bergmann @ 2016-03-29 22:30 UTC (permalink / raw)
To: Florian Fainelli
Cc: Jayachandran C, Florian Fainelli, Rob Herring,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w
On Friday 11 March 2016 12:16:15 Florian Fainelli wrote:
> On 27/02/16 23:37, Jayachandran C wrote:
> > The PCI memory windows available in vulcan.dtsi are limited to 128MB
> > for 32-bit BARs, and 4GB for 64-bit BARs. Given the memory mapped IO
> > space available in arm64, these windows can be increased substantially
> > to support more use cases.
> >
> > The change increases the 32-bit window to 256MB and the 64-bit window
> > to 128 GB. The firmware on vulcan boards will use these ranges as well.
> >
> > PCI IO windows are not supported on Vulcan, so remove them instead of
> > keeping an unused value.
> >
> > Signed-off-by: Jayachandran C <jchandra-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> > ---
> >
> > This is an update to the patch with subject
> > "arm64: Broadcom Vulcan support"
> > I had sent earlier, please fold it into that patch if possible
>
> Arnd, I do not have any other Broadcom ARM64 DT changes for 4.6 to be
> sent at the moment, do you mind taking this patch directly?
>
> Feel free to add my:
>
> Signed-off-by: Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>
>
Applied to the 4.6 fixes branch now, thanks!
Arnd
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 24+ messages in thread