From: Xiao Guangrong <guangrong.xiao@linux.intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: stable@vger.kernel.org,
Xiao Guangrong <guangrong.xiao@redhat.com>,
Andy Lutomirski <luto@amacapital.net>
Subject: Re: [PATCH 1/2] KVM: MMU: fix ept=0/pte.u=0/pte.w=0/CR0.WP=0/CR4.SMEP=1/EFER.NX=0 combo
Date: Thu, 10 Mar 2016 16:46:12 +0800 [thread overview]
Message-ID: <56E13454.3080604@linux.intel.com> (raw)
In-Reply-To: <1457437467-65707-2-git-send-email-pbonzini@redhat.com>
On 03/08/2016 07:44 PM, Paolo Bonzini wrote:
> Yes, all of these are needed. :) This is admittedly a bit odd, but
> kvm-unit-tests access.flat tests this if you run it with "-cpu host"
> and of course ept=0.
>
> KVM handles supervisor writes of a pte.u=0/pte.w=0/CR0.WP=0 page by
> setting U=0 and W=1 in the shadow PTE. This will cause a user write
> to fault and a supervisor write to succeed (which is correct because
> CR0.WP=0). A user read instead will flip U=0 to 1 and W=1 back to 0.
BTW, it should be pte.u = 1 where you mentioned above.
next prev parent reply other threads:[~2016-03-10 8:46 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-08 11:44 [PATCH 0/2] KVM: MMU: fix ept=0/pte.u=0/pte.w=0/CR0.WP=0/CR4.SMEP=1/EFER.NX=0 Paolo Bonzini
2016-03-08 11:44 ` [PATCH 1/2] KVM: MMU: fix ept=0/pte.u=0/pte.w=0/CR0.WP=0/CR4.SMEP=1/EFER.NX=0 combo Paolo Bonzini
2016-03-10 8:27 ` Xiao Guangrong
2016-03-10 10:01 ` Paolo Bonzini
2016-03-10 10:09 ` Paolo Bonzini
2016-03-10 12:14 ` Xiao Guangrong
2016-03-10 12:26 ` Paolo Bonzini
2016-03-10 8:46 ` Xiao Guangrong [this message]
2016-03-10 10:03 ` Paolo Bonzini
2016-03-08 11:44 ` [PATCH 2/2] KVM: MMU: fix reserved bit check for pte.u=0/pte.w=0/CR0.WP=0/CR4.SMEP=1/EFER.NX=0 Paolo Bonzini
2016-03-10 8:36 ` Xiao Guangrong
2016-03-10 10:02 ` Paolo Bonzini
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