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From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
To: Paolo Bonzini <pbonzini@redhat.com>, <rkrcmar@redhat.com>,
	<joro@8bytes.org>, <bp@alien8.de>, <gleb@kernel.org>,
	<alex.williamson@redhat.com>
Cc: <kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<wei@redhat.com>, <sherry.hurwitz@amd.com>
Subject: Re: [PART1 RFC v2 05/10] KVM: x86: Detect and Initialize AVIC support
Date: Wed, 16 Mar 2016 00:09:32 +0700	[thread overview]
Message-ID: <56E841CC.4090806@amd.com> (raw)
In-Reply-To: <56DDAF2D.3060703@redhat.com>

Hi

On 03/07/2016 11:41 PM, Paolo Bonzini wrote:
> On 04/03/2016 21:46, Suravee Suthikulpanit wrote:
> >  [....]
>> +/* Note: This structure is per VM */
>> +struct svm_vm_data {
>> +	atomic_t count;
>> +	u32 ldr_mode;
>> +	u32 avic_max_vcpu_id;
>> +	u32 avic_tag;
>> +
>> +	struct page *avic_log_ait_page;
>> +	struct page *avic_phy_ait_page;
>
> You can put these directly in kvm_arch.  Do not use abbreviations:
>
> 	struct page *avic_logical_apic_id_table_page;
> 	struct page *avic_physical_apic_id_table_page;
>

Actually, the reason I would like to introduce this per-arch specific 
structure is because I feel that it is easier to manage these 
processor-specific variable/data-structure. If we add all these directly 
into kvm_arch, which is shared b/w SVM and VMX, it is more difficult to 
tell which one is used in the different code base.

>> [...]
>> +	memcpy(vapic_bkpg, svm->in_kernel_lapic_regs, PAGE_SIZE);
>> +	svm->vcpu.arch.apic->regs = vapic_bkpg;
>
> Can you explain the flipping logic, and why you cannot just use the
> existing apic.regs?

Please see "explanation 1" below.

>> [...]
>> +static struct svm_avic_phy_ait_entry *
>> +avic_get_phy_ait_entry(struct kvm_vcpu *vcpu, int index)
>> +{
>> +    [.....]
>> +}
>> +
>> +struct svm_avic_log_ait_entry *
>> +avic_get_log_ait_entry(struct kvm_vcpu *vcpu, u8 mda, bool is_flat)
>> +{
>> +	[.....]
>> +}
>
> Instead of these functions, create a complete function to handle APIC_ID
> and APIC_LDR writes.  Then use kmap/kunmap instead of page_address.
>

Ok. May I ask why we are against using page_address?  I have see that 
used in several places in the code.

>> [...]
>> +static int avic_alloc_bk_page(struct vcpu_svm *svm, int id)
>> +{
>> +	int ret = 0, i;
>> +	bool realloc = false;
>> +	struct kvm_vcpu *vcpu;
>> +	struct kvm *kvm = svm->vcpu.kvm;
>> +	struct svm_vm_data *vm_data = kvm->arch.arch_data;
>> +
>> +	mutex_lock(&kvm->slots_lock);
>> +
>> +	/* Check if we have already allocated vAPIC backing
>> +	 * page for this vCPU. If not, we need to realloc
>> +	 * a new one and re-assign all other vCPU.
>> +	 */
>> +	if (kvm->arch.apic_access_page_done &&
>> +	    (id > vm_data->avic_max_vcpu_id)) {
>> +		kvm_for_each_vcpu(i, vcpu, kvm)
>> +			avic_unalloc_bk_page(vcpu);
>> +
>> +		__x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
>> +					0, 0);
>> +		realloc = true;
>> +		vm_data->avic_max_vcpu_id = 0;
>> +	}
>> +
>> +	/*
>> +	 * We are allocating vAPIC backing page
>> +	 * upto the max vCPU ID
>> +	 */
>> +	if (id >= vm_data->avic_max_vcpu_id) {
>> +		ret = __x86_set_memory_region(kvm,
>> +					      APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
>> +					      APIC_DEFAULT_PHYS_BASE,
>> +					      PAGE_SIZE * (id + 1));
>
> Why is this necessary?  The APIC access page is a peculiarity of Intel
> processors (and the special memslot for only needs to map 0xfee00000 to
> 0xfee00fff; after that there is the MSI area).
>

Please see "explanation 1" below.

 >> [...]
>> +		if (ret)
>> +			goto out;
>> +
>> +		vm_data->avic_max_vcpu_id = id;
>> +	}
>> +
>> +	/* Reinit vAPIC backing page for exisinting vcpus */
>> +	if (realloc)
>> +		kvm_for_each_vcpu(i, vcpu, kvm)
>> +			avic_init_bk_page(vcpu);
>
> Why is this necessary?

Explanation 1:

The current lapic regs page is allocated using get_zeroed_page(), which 
can be paged out. If I use these pages for AVIC backing pages, it seems 
to cause VM to slow down quite a bit due to a lot of page faults.

Currently, the AVIC backing pages are acquired from __x86_set_memory 
region() with APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, which maps the pages for 
address 0xfee00000 and above for VM to use. I mostly grab this from the 
VMX implementation in alloc_apic_access_page().

However, the memslot requires specification of the size at the time when 
calling __x86_set_memory_region(). However, I can't seem to figure out 
where I can get the number of vcpus at the time when we creating VM. 
Therefore, I have to track the vcpu creation, and re-acquire larger 
memslot every time vcpu_create() is called.

I was not sure if this is the right approach, any suggestion for this part.

Thanks,
Suravee

  reply	other threads:[~2016-03-15 17:09 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-04 20:45 [PART1 RFC v2 00/10] KVM: x86: Introduce SVM AVIC support Suravee Suthikulpanit
2016-03-04 20:45 ` [PART1 RFC v2 01/10] KVM: x86: Misc LAPIC changes to exposes helper functions Suravee Suthikulpanit
2016-03-04 20:46 ` [PART1 RFC v2 02/10] KVM: x86: Introducing kvm_x86_ops VCPU blocking/unblocking Suravee Suthikulpanit
2016-03-07 15:42   ` Paolo Bonzini
2016-03-14  6:19     ` Suravee Suthikulpanit
2016-03-04 20:46 ` [PART1 RFC v2 03/10] svm: Introduce new AVIC VMCB registers Suravee Suthikulpanit
2016-03-07 15:44   ` Paolo Bonzini
2016-03-14  7:41     ` Suravee Suthikulpanit
2016-03-14 12:25       ` Paolo Bonzini
2016-03-15 12:51         ` Suravee Suthikulpanit
2016-03-04 20:46 ` [PART1 RFC v2 04/10] svm: clean up V_TPR, V_IRQ, V_INTR_PRIO, and V_INTR_MASKING Suravee Suthikulpanit
2016-03-04 20:46 ` [PART1 RFC v2 05/10] KVM: x86: Detect and Initialize AVIC support Suravee Suthikulpanit
2016-03-07 16:41   ` Paolo Bonzini
2016-03-15 17:09     ` Suravee Suthikulpanit [this message]
2016-03-15 17:22       ` Paolo Bonzini
2016-03-16  6:22         ` Suravee Suthikulpanit
2016-03-16  7:20           ` Paolo Bonzini
2016-03-16  8:21             ` Suravee Suthikulpanit
2016-03-16 11:12               ` Paolo Bonzini
2016-03-04 20:46 ` [PART1 RFC v2 06/10] svm: Add interrupt injection via AVIC Suravee Suthikulpanit
2016-03-07 15:36   ` Paolo Bonzini
2016-03-08 21:54     ` Radim Krčmář
2016-03-09 11:10       ` Paolo Bonzini
2016-03-09 16:00         ` Radim Krčmář
2016-03-14  9:41           ` Suravee Suthikulpanit
2016-03-14 12:27             ` Paolo Bonzini
2016-03-14  9:50         ` Suravee Suthikulpanit
2016-03-14  5:25     ` Suravee Suthikulpanit
2016-03-14  8:54       ` Suravee Suthikulpanit
2016-03-04 20:46 ` [PART1 RFC v2 07/10] svm: Add VMEXIT handlers for AVIC Suravee Suthikulpanit
2016-03-07 15:58   ` Paolo Bonzini
2016-03-08 22:05     ` Radim Krčmář
2016-03-09 10:56       ` Paolo Bonzini
2016-03-09 20:55   ` Radim Krčmář
2016-03-10 19:34     ` Radim Krčmář
2016-03-10 19:54       ` Paolo Bonzini
2016-03-10 20:44         ` Radim Krčmář
2016-03-17  3:58     ` Suravee Suthikulpanit
2016-03-17  9:35       ` Paolo Bonzini
2016-03-17 19:44     ` Suravee Suthikulpanit
2016-03-17 20:27       ` [PATCH] KVM: split kvm_vcpu_wake_up from kvm_vcpu_kick Radim Krčmář
2016-03-18  5:13         ` Suravee Suthikulpanit
2016-03-04 20:46 ` [PART1 RFC v2 08/10] svm: Do not expose x2APIC when enable AVIC Suravee Suthikulpanit
2016-03-04 20:46 ` [PART1 RFC v2 09/10] svm: Do not intercept CR8 " Suravee Suthikulpanit
2016-03-07 15:39   ` Paolo Bonzini
2016-03-14  6:09     ` Suravee Suthikulpanit
2016-03-14 12:28       ` Paolo Bonzini
2016-03-04 20:46 ` [PART1 RFC v2 10/10] svm: Manage vcpu load/unload " Suravee Suthikulpanit
2016-03-09 21:46   ` Radim Krčmář
2016-03-10 14:01     ` Radim Krčmář
2016-03-14 11:58       ` Suravee Suthikulpanit
2016-03-14 16:54         ` Radim Krčmář
2016-03-14 11:48     ` Suravee Suthikulpanit
2016-03-14 16:40       ` Radim Krčmář

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