* [PATCH 1/2] amdgpu: create only one IB for "all compute queues" tests
@ 2016-03-16 12:54 Christian König
2016-03-16 12:55 ` [PATCH 2/2] amdgpu: add amdgpu_create_bo_from_userptr() v2 Christian König
2016-03-16 12:56 ` [PATCH 1/2] amdgpu: create only one IB for "all compute queues" tests Christian König
0 siblings, 2 replies; 5+ messages in thread
From: Christian König @ 2016-03-16 12:54 UTC (permalink / raw)
To: dri-devel
From: Christian König <christian.koenig@amd.com>
It's simpler and allows us to test VMID sharing between
between the compute queues as well.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
tests/amdgpu/basic_tests.c | 40 ++++++++++++++++++++--------------------
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 4ef6014..d2086ce 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -620,25 +620,25 @@ static void amdgpu_command_submission_compute(void)
r = amdgpu_cs_ctx_create(device_handle, &context_handle);
CU_ASSERT_EQUAL(r, 0);
- for (instance = 0; instance < 8; instance++) {
- r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096,
- AMDGPU_GEM_DOMAIN_GTT, 0,
- &ib_result_handle, &ib_result_cpu,
- &ib_result_mc_address, &va_handle);
- CU_ASSERT_EQUAL(r, 0);
+ r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096,
+ AMDGPU_GEM_DOMAIN_GTT, 0,
+ &ib_result_handle, &ib_result_cpu,
+ &ib_result_mc_address, &va_handle);
+ CU_ASSERT_EQUAL(r, 0);
- r = amdgpu_get_bo_list(device_handle, ib_result_handle, NULL,
+ r = amdgpu_get_bo_list(device_handle, ib_result_handle, NULL,
&bo_list);
- CU_ASSERT_EQUAL(r, 0);
+ CU_ASSERT_EQUAL(r, 0);
- ptr = ib_result_cpu;
- for (i = 0; i < 16; ++i)
- ptr[i] = 0xffff1000;
+ ptr = ib_result_cpu;
+ for (i = 0; i < 16; ++i)
+ ptr[i] = 0xffff1000;
- memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info));
- ib_info.ib_mc_address = ib_result_mc_address;
- ib_info.size = 16;
+ memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info));
+ ib_info.ib_mc_address = ib_result_mc_address;
+ ib_info.size = 16;
+ for (instance = 0; instance < 8; instance++) {
memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
ibs_request.ip_type = AMDGPU_HW_IP_COMPUTE;
ibs_request.ring = instance;
@@ -660,14 +660,14 @@ static void amdgpu_command_submission_compute(void)
AMDGPU_TIMEOUT_INFINITE,
0, &expired);
CU_ASSERT_EQUAL(r, 0);
+ }
- r = amdgpu_bo_list_destroy(bo_list);
- CU_ASSERT_EQUAL(r, 0);
+ r = amdgpu_bo_list_destroy(bo_list);
+ CU_ASSERT_EQUAL(r, 0);
- r = amdgpu_bo_unmap_and_free(ib_result_handle, va_handle,
- ib_result_mc_address, 4096);
- CU_ASSERT_EQUAL(r, 0);
- }
+ r = amdgpu_bo_unmap_and_free(ib_result_handle, va_handle,
+ ib_result_mc_address, 4096);
+ CU_ASSERT_EQUAL(r, 0);
r = amdgpu_cs_ctx_free(context_handle);
CU_ASSERT_EQUAL(r, 0);
--
2.5.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 2/2] amdgpu: add amdgpu_create_bo_from_userptr() v2
2016-03-16 12:54 [PATCH 1/2] amdgpu: create only one IB for "all compute queues" tests Christian König
@ 2016-03-16 12:55 ` Christian König
2016-03-16 12:56 ` [PATCH 1/2] amdgpu: create only one IB for "all compute queues" tests Christian König
1 sibling, 0 replies; 5+ messages in thread
From: Christian König @ 2016-03-16 12:55 UTC (permalink / raw)
To: dri-devel
From: Christian König <christian.koenig@amd.com>
We somehow forgot the flags paramter in amdgpu_create_bo_from_user_mem(). Fix
that with a new function.
v2: fix typo in function name
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v1)
---
amdgpu/amdgpu.h | 8 ++++++++
amdgpu/amdgpu_bo.c | 26 ++++++++++++++++++--------
2 files changed, 26 insertions(+), 8 deletions(-)
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 0851306..be7b924 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -637,6 +637,7 @@ int amdgpu_bo_import(amdgpu_device_handle dev,
* want to map to GPU address space (make GPU accessible)
* (This address must be correctly aligned).
* \param size - [in] Size of allocation (must be correctly aligned)
+ * \param flags - [in] AMDGPU_GEM_USERPTR_* flags for userptr
* \param buf_handle - [out] Buffer handle for the userptr memory
* resource on submission and be used in other operations.
*
@@ -660,6 +661,13 @@ int amdgpu_bo_import(amdgpu_device_handle dev,
* It is responsibility of caller to correctly specify access rights
* on VA assignment.
*/
+int amdgpu_create_bo_from_userptr(amdgpu_device_handle dev,
+ void *cpu, uint64_t size, uint32_t flags,
+ amdgpu_bo_handle *buf_handle);
+
+/**
+ * Deprecated, don't use for new implementations
+ */
int amdgpu_create_bo_from_user_mem(amdgpu_device_handle dev,
void *cpu, uint64_t size,
amdgpu_bo_handle *buf_handle);
diff --git a/amdgpu/amdgpu_bo.c b/amdgpu/amdgpu_bo.c
index d30fd1e..e150376 100644
--- a/amdgpu/amdgpu_bo.c
+++ b/amdgpu/amdgpu_bo.c
@@ -529,18 +529,16 @@ int amdgpu_bo_wait_for_idle(amdgpu_bo_handle bo,
}
}
-int amdgpu_create_bo_from_user_mem(amdgpu_device_handle dev,
- void *cpu,
- uint64_t size,
- amdgpu_bo_handle *buf_handle)
+int amdgpu_create_bo_from_userptr(amdgpu_device_handle dev,
+ void *cpu, uint64_t size, uint32_t flags,
+ amdgpu_bo_handle *buf_handle)
{
- int r;
- struct amdgpu_bo *bo;
struct drm_amdgpu_gem_userptr args;
+ struct amdgpu_bo *bo;
+ int r;
args.addr = (uintptr_t)cpu;
- args.flags = AMDGPU_GEM_USERPTR_ANONONLY | AMDGPU_GEM_USERPTR_REGISTER |
- AMDGPU_GEM_USERPTR_VALIDATE;
+ args.flags = flags;
args.size = size;
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_USERPTR,
&args, sizeof(args));
@@ -561,6 +559,18 @@ int amdgpu_create_bo_from_user_mem(amdgpu_device_handle dev,
return r;
}
+int amdgpu_create_bo_from_user_mem(amdgpu_device_handle dev,
+ void *cpu, uint64_t size,
+ amdgpu_bo_handle *buf_handle)
+{
+ uint32_t flags = AMDGPU_GEM_USERPTR_ANONONLY |
+ AMDGPU_GEM_USERPTR_REGISTER |
+ AMDGPU_GEM_USERPTR_VALIDATE;
+
+ return amdgpu_create_bo_from_userptr(dev, cpu, size,
+ flags, buf_handle);
+}
+
int amdgpu_bo_list_create(amdgpu_device_handle dev,
uint32_t number_of_resources,
amdgpu_bo_handle *resources,
--
2.5.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 1/2] amdgpu: create only one IB for "all compute queues" tests
2016-03-16 12:54 [PATCH 1/2] amdgpu: create only one IB for "all compute queues" tests Christian König
2016-03-16 12:55 ` [PATCH 2/2] amdgpu: add amdgpu_create_bo_from_userptr() v2 Christian König
@ 2016-03-16 12:56 ` Christian König
2016-03-18 6:03 ` Michel Dänzer
1 sibling, 1 reply; 5+ messages in thread
From: Christian König @ 2016-03-16 12:56 UTC (permalink / raw)
To: dri-devel, Alex Deucher, Michel Dänzer
Can somebody with commit access push those two patches after the review?
I don't have write permission for libdrm.
Thanks in advance,
Christian.
Am 16.03.2016 um 13:54 schrieb Christian König:
> From: Christian König <christian.koenig@amd.com>
>
> It's simpler and allows us to test VMID sharing between
> between the compute queues as well.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
> tests/amdgpu/basic_tests.c | 40 ++++++++++++++++++++--------------------
> 1 file changed, 20 insertions(+), 20 deletions(-)
>
> diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
> index 4ef6014..d2086ce 100644
> --- a/tests/amdgpu/basic_tests.c
> +++ b/tests/amdgpu/basic_tests.c
> @@ -620,25 +620,25 @@ static void amdgpu_command_submission_compute(void)
> r = amdgpu_cs_ctx_create(device_handle, &context_handle);
> CU_ASSERT_EQUAL(r, 0);
>
> - for (instance = 0; instance < 8; instance++) {
> - r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096,
> - AMDGPU_GEM_DOMAIN_GTT, 0,
> - &ib_result_handle, &ib_result_cpu,
> - &ib_result_mc_address, &va_handle);
> - CU_ASSERT_EQUAL(r, 0);
> + r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096,
> + AMDGPU_GEM_DOMAIN_GTT, 0,
> + &ib_result_handle, &ib_result_cpu,
> + &ib_result_mc_address, &va_handle);
> + CU_ASSERT_EQUAL(r, 0);
>
> - r = amdgpu_get_bo_list(device_handle, ib_result_handle, NULL,
> + r = amdgpu_get_bo_list(device_handle, ib_result_handle, NULL,
> &bo_list);
> - CU_ASSERT_EQUAL(r, 0);
> + CU_ASSERT_EQUAL(r, 0);
>
> - ptr = ib_result_cpu;
> - for (i = 0; i < 16; ++i)
> - ptr[i] = 0xffff1000;
> + ptr = ib_result_cpu;
> + for (i = 0; i < 16; ++i)
> + ptr[i] = 0xffff1000;
>
> - memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info));
> - ib_info.ib_mc_address = ib_result_mc_address;
> - ib_info.size = 16;
> + memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info));
> + ib_info.ib_mc_address = ib_result_mc_address;
> + ib_info.size = 16;
>
> + for (instance = 0; instance < 8; instance++) {
> memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
> ibs_request.ip_type = AMDGPU_HW_IP_COMPUTE;
> ibs_request.ring = instance;
> @@ -660,14 +660,14 @@ static void amdgpu_command_submission_compute(void)
> AMDGPU_TIMEOUT_INFINITE,
> 0, &expired);
> CU_ASSERT_EQUAL(r, 0);
> + }
>
> - r = amdgpu_bo_list_destroy(bo_list);
> - CU_ASSERT_EQUAL(r, 0);
> + r = amdgpu_bo_list_destroy(bo_list);
> + CU_ASSERT_EQUAL(r, 0);
>
> - r = amdgpu_bo_unmap_and_free(ib_result_handle, va_handle,
> - ib_result_mc_address, 4096);
> - CU_ASSERT_EQUAL(r, 0);
> - }
> + r = amdgpu_bo_unmap_and_free(ib_result_handle, va_handle,
> + ib_result_mc_address, 4096);
> + CU_ASSERT_EQUAL(r, 0);
>
> r = amdgpu_cs_ctx_free(context_handle);
> CU_ASSERT_EQUAL(r, 0);
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^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH 1/2] amdgpu: create only one IB for "all compute queues" tests
2016-03-16 12:56 ` [PATCH 1/2] amdgpu: create only one IB for "all compute queues" tests Christian König
@ 2016-03-18 6:03 ` Michel Dänzer
2016-03-23 2:37 ` Michel Dänzer
0 siblings, 1 reply; 5+ messages in thread
From: Michel Dänzer @ 2016-03-18 6:03 UTC (permalink / raw)
To: Christian König, Daniel Stone; +Cc: dri-devel
On 16.03.2016 21:56, Christian König wrote:
> Can somebody with commit access push those two patches after the review?
> I don't have write permission for libdrm.
Well, that should clearly get fixed. Daniel, can you add him, or who
should we ask for this?
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] amdgpu: create only one IB for "all compute queues" tests
2016-03-18 6:03 ` Michel Dänzer
@ 2016-03-23 2:37 ` Michel Dänzer
0 siblings, 0 replies; 5+ messages in thread
From: Michel Dänzer @ 2016-03-23 2:37 UTC (permalink / raw)
To: Christian König, Daniel Stone; +Cc: dri-devel
On 18.03.2016 15:03, Michel Dänzer wrote:
> On 16.03.2016 21:56, Christian König wrote:
>> Can somebody with commit access push those two patches after the review?
>> I don't have write permission for libdrm.
>
> Well, that should clearly get fixed. Daniel, can you add him, or who
> should we ask for this?
Daniel said on IRC that the libdrm repository uses the same group as the
Mesa one. Christian, what exactly is the problem when you try pushing to
the libdrm repository?
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
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^ permalink raw reply [flat|nested] 5+ messages in thread
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2016-03-16 12:54 [PATCH 1/2] amdgpu: create only one IB for "all compute queues" tests Christian König
2016-03-16 12:55 ` [PATCH 2/2] amdgpu: add amdgpu_create_bo_from_userptr() v2 Christian König
2016-03-16 12:56 ` [PATCH 1/2] amdgpu: create only one IB for "all compute queues" tests Christian König
2016-03-18 6:03 ` Michel Dänzer
2016-03-23 2:37 ` Michel Dänzer
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