From: Laurent Vivier <lvivier@redhat.com>
To: Alexander Graf <agraf@suse.de>, David Gibson <dgibson@redhat.com>
Cc: thuth@redhat.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] target-ppc: Multiple/String Word alignment exception
Date: Thu, 31 Mar 2016 09:06:18 +0200 [thread overview]
Message-ID: <56FCCC6A.7000002@redhat.com> (raw)
In-Reply-To: <56FCC99C.2030809@suse.de>
On 31/03/2016 08:54, Alexander Graf wrote:
>
>
> On 31.03.16 01:29, David Gibson wrote:
>> On Wed, 30 Mar 2016 19:13:00 +0200
>> Laurent Vivier <lvivier@redhat.com> wrote:
>>
>>> If the processor is in little-endian mode, an alignment interrupt must
>>> occur for the following instructions: lmw, stmw, lswi, lswx, stswi or stswx.
>>>
>>> This is what happens with KVM, so change TCG to do the same.
>>>
>>> As the instruction can be emulated by the kernel, enable the change
>>> only in softmmu mode.
>>>
>>> Signed-off-by: Laurent Vivier <lvivier@redhat.com>
>>
>> I guess this makes sense given the existing hardware behaviour, even
>> though it seems a bit perverse to me to make the emulator strictly less
>> functional.
>>
>> Alex, what do you think?
>
> In general we only implement strict checks if it breaks guests not to
> have them. Are you aware of any such case?
No, it does not break anything. The idea was to have the same behavior
with TCG as with a real CPU (or kvm). But if it is not the rule, we can
drop this patch.
Thanks,
Laurent
next prev parent reply other threads:[~2016-03-31 7:06 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-30 17:13 [Qemu-devel] [PATCH] target-ppc: Multiple/String Word alignment exception Laurent Vivier
2016-03-30 23:29 ` David Gibson
2016-03-31 0:53 ` Laurent Vivier
2016-03-31 6:54 ` Alexander Graf
2016-03-31 7:06 ` Laurent Vivier [this message]
2016-03-31 7:15 ` Alexander Graf
2016-03-31 7:39 ` Laurent Vivier
2016-03-31 8:50 ` Thomas Huth
2016-03-31 9:03 ` Alexander Graf
2016-03-31 9:18 ` Thomas Huth
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