From: Leon Alrae <leon.alrae@imgtec.com>
To: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>,
<qemu-devel@nongnu.org>
Cc: peter.maydell@linaro.org, ehabkost@redhat.com, proljc@gmail.com,
mark.cave-ayland@ilande.co.uk, agraf@suse.de,
kbastian@mail.uni-paderborn.de, petar.jovanovic@imgtec.com,
blauwirbel@gmail.com, jcmvbkbc@gmail.com,
miodrag.dinic@imgtec.com, qemu-arm@nongnu.org,
qemu-ppc@nongnu.org, edgar.iglesias@gmail.com,
pbonzini@redhat.com, gxt@mprc.pku.edu.cn, afaerber@suse.de,
aurelien@aurel32.net, rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH 2/2] target-mips: Implement IEEE 754-2008 functionality for R6 and MSA instructions
Date: Fri, 1 Apr 2016 20:07:28 +0100 [thread overview]
Message-ID: <56FEC6F0.9000803@imgtec.com> (raw)
In-Reply-To: <1458910214-12239-3-git-send-email-aleksandar.markovic@rt-rk.com>
On 25/03/16 12:50, Aleksandar Markovic wrote:
> +#define MSA_CLASS_SIGNALING_NAN 0x001
> +#define MSA_CLASS_QUIET_NAN 0x002
> +#define MSA_CLASS_NEGATIVE_INFINITY 0x004
> +#define MSA_CLASS_NEGATIVE_NORMAL 0x008
> +#define MSA_CLASS_NEGATIVE_SUBNORMAL 0x010
> +#define MSA_CLASS_NEGATIVE_ZERO 0x020
> +#define MSA_CLASS_POSITIVE_INFINITY 0x040
> +#define MSA_CLASS_POSITIVE_NORMAL 0x080
> +#define MSA_CLASS_POSITIVE_SUBNORMAL 0x100
> +#define MSA_CLASS_POSITIVE_ZERO 0x200
> +
> +#define MSA_CLASS(name, bits) \
> +uint ## bits ## _t helper_msa_ ## name (CPUMIPSState *env, \
> + uint ## bits ## _t arg) \
> +{ \
> + if (float ## bits ## _is_signaling_nan(arg, \
> + &env->active_tc.msa_fp_status)) { \
> + return MSA_CLASS_SIGNALING_NAN; \
> + } else if (float ## bits ## _is_quiet_nan(arg, \
> + &env->active_tc.msa_fp_status)) { \
> + return MSA_CLASS_QUIET_NAN; \
> + } else if (float ## bits ## _is_neg(arg)) { \
> + if (float ## bits ## _is_infinity(arg)) { \
> + return MSA_CLASS_NEGATIVE_INFINITY; \
> + } else if (float ## bits ## _is_zero(arg)) { \
> + return MSA_CLASS_NEGATIVE_ZERO; \
> + } else if (float ## bits ## _is_zero_or_denormal(arg)) { \
> + return MSA_CLASS_NEGATIVE_SUBNORMAL; \
> + } else { \
> + return MSA_CLASS_NEGATIVE_NORMAL; \
> + } \
> + } else { \
> + if (float ## bits ## _is_infinity(arg)) { \
> + return MSA_CLASS_POSITIVE_INFINITY; \
> + } else if (float ## bits ## _is_zero(arg)) { \
> + return MSA_CLASS_POSITIVE_ZERO; \
> + } else if (float ## bits ## _is_zero_or_denormal(arg)) { \
> + return MSA_CLASS_POSITIVE_SUBNORMAL; \
> + } else { \
> + return MSA_CLASS_POSITIVE_NORMAL; \
> + } \
> + } \
> +}
Duplicating the class operation is unnecessary. We can just have common
function for FPU and MSA which takes additional float_status argument.
Also I noticed that this patch series doesn't provide Flush Subnormals
(the FCSR.FS bit), but probably this functionality can come later...
Leon
WARNING: multiple messages have this Message-ID (diff)
From: Leon Alrae <leon.alrae@imgtec.com>
To: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>,
qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, ehabkost@redhat.com, proljc@gmail.com,
mark.cave-ayland@ilande.co.uk, agraf@suse.de,
kbastian@mail.uni-paderborn.de, petar.jovanovic@imgtec.com,
blauwirbel@gmail.com, jcmvbkbc@gmail.com,
miodrag.dinic@imgtec.com, qemu-arm@nongnu.org,
qemu-ppc@nongnu.org, edgar.iglesias@gmail.com,
pbonzini@redhat.com, gxt@mprc.pku.edu.cn, afaerber@suse.de,
aurelien@aurel32.net, rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH 2/2] target-mips: Implement IEEE 754-2008 functionality for R6 and MSA instructions
Date: Fri, 1 Apr 2016 20:07:28 +0100 [thread overview]
Message-ID: <56FEC6F0.9000803@imgtec.com> (raw)
In-Reply-To: <1458910214-12239-3-git-send-email-aleksandar.markovic@rt-rk.com>
On 25/03/16 12:50, Aleksandar Markovic wrote:
> +#define MSA_CLASS_SIGNALING_NAN 0x001
> +#define MSA_CLASS_QUIET_NAN 0x002
> +#define MSA_CLASS_NEGATIVE_INFINITY 0x004
> +#define MSA_CLASS_NEGATIVE_NORMAL 0x008
> +#define MSA_CLASS_NEGATIVE_SUBNORMAL 0x010
> +#define MSA_CLASS_NEGATIVE_ZERO 0x020
> +#define MSA_CLASS_POSITIVE_INFINITY 0x040
> +#define MSA_CLASS_POSITIVE_NORMAL 0x080
> +#define MSA_CLASS_POSITIVE_SUBNORMAL 0x100
> +#define MSA_CLASS_POSITIVE_ZERO 0x200
> +
> +#define MSA_CLASS(name, bits) \
> +uint ## bits ## _t helper_msa_ ## name (CPUMIPSState *env, \
> + uint ## bits ## _t arg) \
> +{ \
> + if (float ## bits ## _is_signaling_nan(arg, \
> + &env->active_tc.msa_fp_status)) { \
> + return MSA_CLASS_SIGNALING_NAN; \
> + } else if (float ## bits ## _is_quiet_nan(arg, \
> + &env->active_tc.msa_fp_status)) { \
> + return MSA_CLASS_QUIET_NAN; \
> + } else if (float ## bits ## _is_neg(arg)) { \
> + if (float ## bits ## _is_infinity(arg)) { \
> + return MSA_CLASS_NEGATIVE_INFINITY; \
> + } else if (float ## bits ## _is_zero(arg)) { \
> + return MSA_CLASS_NEGATIVE_ZERO; \
> + } else if (float ## bits ## _is_zero_or_denormal(arg)) { \
> + return MSA_CLASS_NEGATIVE_SUBNORMAL; \
> + } else { \
> + return MSA_CLASS_NEGATIVE_NORMAL; \
> + } \
> + } else { \
> + if (float ## bits ## _is_infinity(arg)) { \
> + return MSA_CLASS_POSITIVE_INFINITY; \
> + } else if (float ## bits ## _is_zero(arg)) { \
> + return MSA_CLASS_POSITIVE_ZERO; \
> + } else if (float ## bits ## _is_zero_or_denormal(arg)) { \
> + return MSA_CLASS_POSITIVE_SUBNORMAL; \
> + } else { \
> + return MSA_CLASS_POSITIVE_NORMAL; \
> + } \
> + } \
> +}
Duplicating the class operation is unnecessary. We can just have common
function for FPU and MSA which takes additional float_status argument.
Also I noticed that this patch series doesn't provide Flush Subnormals
(the FCSR.FS bit), but probably this functionality can come later...
Leon
next prev parent reply other threads:[~2016-04-01 19:08 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-25 12:50 [Qemu-arm] [PATCH 0/2] target-mips: Fix IEEE 754-2008-related issues Aleksandar Markovic
2016-03-25 12:50 ` [Qemu-devel] " Aleksandar Markovic
2016-03-25 12:50 ` [Qemu-arm] [PATCH 1/2] softfloat: Enable run-time-configurable meaning of signaling NaN bit Aleksandar Markovic
2016-03-25 12:50 ` [Qemu-devel] " Aleksandar Markovic
2016-03-28 21:36 ` [Qemu-arm] " Richard Henderson
2016-03-28 21:36 ` [Qemu-devel] " Richard Henderson
2016-04-04 13:21 ` [Qemu-arm] " Aleksandar Markovic
2016-04-04 13:21 ` Aleksandar Markovic
2016-04-04 13:31 ` [Qemu-arm] " Peter Maydell
2016-04-04 13:31 ` Peter Maydell
2016-04-04 19:37 ` [Qemu-arm] " Eduardo Habkost
2016-04-04 19:37 ` Eduardo Habkost
2016-04-04 19:38 ` [Qemu-arm] " Peter Maydell
2016-04-04 19:38 ` Peter Maydell
2016-04-04 19:42 ` [Qemu-arm] " Eduardo Habkost
2016-04-04 19:42 ` Eduardo Habkost
2016-04-04 19:46 ` Peter Maydell
2016-04-04 19:56 ` [Qemu-arm] " Eduardo Habkost
2016-04-04 19:56 ` Eduardo Habkost
2016-03-29 12:50 ` Bastian Koppelmann
2016-03-30 16:58 ` Aleksandar Markovic
2016-04-01 19:02 ` Leon Alrae
2016-04-01 19:02 ` Leon Alrae
2016-04-03 14:25 ` [Qemu-arm] " Aleksandar Markovic
2016-04-03 14:25 ` Aleksandar Markovic
2016-04-04 16:10 ` [Qemu-arm] " Leon Alrae
2016-04-04 16:10 ` Leon Alrae
2016-03-25 12:50 ` [Qemu-arm] [PATCH 2/2] target-mips: Implement IEEE 754-2008 functionality for R6 and MSA instructions Aleksandar Markovic
2016-03-25 12:50 ` [Qemu-devel] " Aleksandar Markovic
2016-03-28 21:49 ` [Qemu-arm] " Richard Henderson
2016-03-28 21:49 ` [Qemu-devel] " Richard Henderson
2016-03-30 19:28 ` [Qemu-arm] " Aleksandar Markovic
2016-03-30 19:28 ` Aleksandar Markovic
2016-03-31 11:55 ` [Qemu-arm] " Aleksandar Markovic
2016-03-31 11:55 ` Aleksandar Markovic
2016-03-31 16:30 ` [Qemu-arm] " Richard Henderson
2016-03-31 16:30 ` Richard Henderson
2016-04-01 19:07 ` Leon Alrae [this message]
2016-04-01 19:07 ` Leon Alrae
2016-04-03 15:05 ` [Qemu-arm] " Aleksandar Markovic
2016-04-03 15:05 ` [Qemu-devel] " Aleksandar Markovic
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