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* [PATCH libdrm 1/7] amdgpu: Fix spelling mistakes
@ 2016-04-03 18:48 Eric Engestrom
  2016-04-03 18:48 ` [PATCH libdrm 2/7] exynos: Fix spelling mistake Eric Engestrom
                   ` (6 more replies)
  0 siblings, 7 replies; 13+ messages in thread
From: Eric Engestrom @ 2016-04-03 18:48 UTC (permalink / raw)
  To: dri-devel; +Cc: Eric Engestrom

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
---
 amdgpu/amdgpu.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 0851306..5d5a2c6 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -685,7 +685,7 @@ int amdgpu_create_bo_from_user_mem(amdgpu_device_handle dev,
 int amdgpu_bo_free(amdgpu_bo_handle buf_handle);
 
 /**
- * Request CPU access to GPU accessable memory
+ * Request CPU access to GPU accessible memory
  *
  * \param   buf_handle - \c [in] Buffer handle
  * \param   cpu        - \c [out] CPU address to be used for access
@@ -851,7 +851,7 @@ int amdgpu_cs_query_reset_state(amdgpu_context_handle context,
  * order.
  *
  * The caller can specify the user fence buffer/location with the fence_info in the
- * cs_request.The sequence number is returned via the 'seq_no' paramter
+ * cs_request.The sequence number is returned via the 'seq_no' parameter
  * in ibs_request structure.
  *
  *
-- 
2.8.0

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^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [PATCH libdrm 2/7] exynos: Fix spelling mistake
  2016-04-03 18:48 [PATCH libdrm 1/7] amdgpu: Fix spelling mistakes Eric Engestrom
@ 2016-04-03 18:48 ` Eric Engestrom
  2016-04-03 18:48 ` [PATCH libdrm 3/7] freedreno: Fix spelling mistakes Eric Engestrom
                   ` (5 subsequent siblings)
  6 siblings, 0 replies; 13+ messages in thread
From: Eric Engestrom @ 2016-04-03 18:48 UTC (permalink / raw)
  To: dri-devel; +Cc: Eric Engestrom

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
---
 exynos/exynos_drm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/exynos/exynos_drm.c b/exynos/exynos_drm.c
index e689781..b961e52 100644
--- a/exynos/exynos_drm.c
+++ b/exynos/exynos_drm.c
@@ -347,7 +347,7 @@ exynos_prime_fd_to_handle(struct exynos_device *dev, int fd, uint32_t *handle)
  *
  * @dev: a exynos device object.
  * @connect: indicate whether connectoin or disconnection request.
- * @ext: indicate whether edid data includes extentions data or not.
+ * @ext: indicate whether edid data includes extensions data or not.
  * @edid: a pointer to edid data from Wireless Display device.
  *
  * this interface is used to request Virtual Display driver connection or
-- 
2.8.0

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^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [PATCH libdrm 3/7] freedreno: Fix spelling mistakes
  2016-04-03 18:48 [PATCH libdrm 1/7] amdgpu: Fix spelling mistakes Eric Engestrom
  2016-04-03 18:48 ` [PATCH libdrm 2/7] exynos: Fix spelling mistake Eric Engestrom
@ 2016-04-03 18:48 ` Eric Engestrom
  2016-04-06 16:42   ` Emil Velikov
  2016-04-03 18:48 ` [PATCH libdrm 4/7] intel: " Eric Engestrom
                   ` (4 subsequent siblings)
  6 siblings, 1 reply; 13+ messages in thread
From: Eric Engestrom @ 2016-04-03 18:48 UTC (permalink / raw)
  To: dri-devel; +Cc: Eric Engestrom

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
---
 freedreno/kgsl/kgsl_drm.h | 2 +-
 freedreno/kgsl/msm_kgsl.h | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/freedreno/kgsl/kgsl_drm.h b/freedreno/kgsl/kgsl_drm.h
index f1c7f4e..281978e 100644
--- a/freedreno/kgsl/kgsl_drm.h
+++ b/freedreno/kgsl/kgsl_drm.h
@@ -81,7 +81,7 @@ struct drm_kgsl_gem_create_fd)
 /* Memory types - these define the source and caching policies
    of the GEM memory chunk */
 
-/* Legacy definitions left for compatability */
+/* Legacy definitions left for compatibility */
 
 #define DRM_KGSL_GEM_TYPE_EBI          0
 #define DRM_KGSL_GEM_TYPE_SMI          1
diff --git a/freedreno/kgsl/msm_kgsl.h b/freedreno/kgsl/msm_kgsl.h
index e67190f..5b36eeb 100644
--- a/freedreno/kgsl/msm_kgsl.h
+++ b/freedreno/kgsl/msm_kgsl.h
@@ -31,7 +31,7 @@
 #define KGSL_FLAGS_SOFT_RESET  0x00000100
 #define KGSL_FLAGS_PER_CONTEXT_TIMESTAMPS 0x00000200
 
-/* Clock flags to show which clocks should be controled by a given platform */
+/* Clock flags to show which clocks should be controlled by a given platform */
 #define KGSL_CLK_SRC	0x00000001
 #define KGSL_CLK_CORE	0x00000002
 #define KGSL_CLK_IFACE	0x00000004
@@ -295,7 +295,7 @@ struct kgsl_cmdstream_freememontimestamp {
 
 /* Previous versions of this header had incorrectly defined
    IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP as a read-only ioctl instead
-   of a write only ioctl.  To ensure binary compatability, the following
+   of a write only ioctl.  To ensure binary compatibility, the following
    #define will be used to intercept the incorrect ioctl
 */
 
-- 
2.8.0

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^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [PATCH libdrm 4/7] intel: Fix spelling mistakes
  2016-04-03 18:48 [PATCH libdrm 1/7] amdgpu: Fix spelling mistakes Eric Engestrom
  2016-04-03 18:48 ` [PATCH libdrm 2/7] exynos: Fix spelling mistake Eric Engestrom
  2016-04-03 18:48 ` [PATCH libdrm 3/7] freedreno: Fix spelling mistakes Eric Engestrom
@ 2016-04-03 18:48 ` Eric Engestrom
  2016-04-03 18:48 ` [PATCH libdrm 5/7] include: " Eric Engestrom
                   ` (3 subsequent siblings)
  6 siblings, 0 replies; 13+ messages in thread
From: Eric Engestrom @ 2016-04-03 18:48 UTC (permalink / raw)
  To: dri-devel; +Cc: Eric Engestrom

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
---
 intel/intel_bufmgr_fake.c         | 2 +-
 intel/intel_bufmgr_gem.c          | 2 +-
 intel/intel_decode.c              | 2 +-
 intel/tests/gen5-3d.batch-ref.txt | 2 +-
 intel/tests/gen6-3d.batch-ref.txt | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/intel/intel_bufmgr_fake.c b/intel/intel_bufmgr_fake.c
index 7f4c7b9..24b3732 100644
--- a/intel/intel_bufmgr_fake.c
+++ b/intel/intel_bufmgr_fake.c
@@ -312,7 +312,7 @@ _fence_wait_internal(drm_intel_bufmgr_fake *bufmgr_fake, int seq)
 	 *
 	 * Assume that in userland we treat sequence numbers as ints, which
 	 * makes some of the comparisons convenient, since the sequence
-	 * numbers are all postive signed integers.
+	 * numbers are all positive signed integers.
 	 *
 	 * From this we get several cases we need to handle.  Here's a timeline.
 	 * 0x2   0x7                                    0x7ffffff8   0x7ffffffd
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index dc28200..0a4012b 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -3379,7 +3379,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
 	    bufmgr_gem->gtt_size > 256*1024*1024) {
 		/* The unmappable part of gtt on gen 3 (i.e. above 256MB) can't
 		 * be used for tiled blits. To simplify the accounting, just
-		 * substract the unmappable part (fixed to 256MB on all known
+		 * subtract the unmappable part (fixed to 256MB on all known
 		 * gen3 devices) if the kernel advertises it. */
 		bufmgr_gem->gtt_size -= 256*1024*1024;
 	}
diff --git a/intel/intel_decode.c b/intel/intel_decode.c
index 287c342..803d202 100644
--- a/intel/intel_decode.c
+++ b/intel/intel_decode.c
@@ -3598,7 +3598,7 @@ decode_3d_965(struct drm_intel_decode *ctx)
 		instr_out(ctx, 0, "3DSTATE_DEPTH_BUFFER\n");
 		if (IS_GEN5(devid) || IS_GEN6(devid))
 			instr_out(ctx, 1,
-				  "%s, %s, pitch = %d bytes, %stiled, HiZ %d, Seperate Stencil %d\n",
+				  "%s, %s, pitch = %d bytes, %stiled, HiZ %d, Separate Stencil %d\n",
 				  get_965_surfacetype(data[1] >> 29),
 				  get_965_depthformat((data[1] >> 18) & 0x7),
 				  (data[1] & 0x0001ffff) + 1,
diff --git a/intel/tests/gen5-3d.batch-ref.txt b/intel/tests/gen5-3d.batch-ref.txt
index a0271ab..51dd85f 100644
--- a/intel/tests/gen5-3d.batch-ref.txt
+++ b/intel/tests/gen5-3d.batch-ref.txt
@@ -24,7 +24,7 @@
 0x1230005c:      0x00000000:    dword 3
 0x12300060:      0x00000000:    dword 4
 0x12300064:      0x79050004: 3DSTATE_DEPTH_BUFFER
-0x12300068:      0x2c0805ff:    2D, z24s8, pitch = 1536 bytes, tiled, HiZ 0, Seperate Stencil 0
+0x12300068:      0x2c0805ff:    2D, z24s8, pitch = 1536 bytes, tiled, HiZ 0, Separate Stencil 0
 0x1230006c:      0x00000000:    depth offset
 0x12300070:      0x09584ac0:    300x300
 0x12300074:      0x00000000:    volume depth
diff --git a/intel/tests/gen6-3d.batch-ref.txt b/intel/tests/gen6-3d.batch-ref.txt
index 9035663..04cbddc 100644
--- a/intel/tests/gen6-3d.batch-ref.txt
+++ b/intel/tests/gen6-3d.batch-ref.txt
@@ -140,7 +140,7 @@
 0x1230022c:      0x00000000:    
 0x12300230:      0x00000000:    
 0x12300234:      0x79050005: 3DSTATE_DEPTH_BUFFER
-0x12300238:      0x2c6c05ff:    2D, unknown, pitch = 1536 bytes, tiled, HiZ 1, Seperate Stencil 1
+0x12300238:      0x2c6c05ff:    2D, unknown, pitch = 1536 bytes, tiled, HiZ 1, Separate Stencil 1
 0x1230023c:      0x00000000:    depth offset
 0x12300240:      0x09584ac0:    300x300
 0x12300244:      0x00000000:    volume depth
-- 
2.8.0

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^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [PATCH libdrm 5/7] include: Fix spelling mistakes
  2016-04-03 18:48 [PATCH libdrm 1/7] amdgpu: Fix spelling mistakes Eric Engestrom
                   ` (2 preceding siblings ...)
  2016-04-03 18:48 ` [PATCH libdrm 4/7] intel: " Eric Engestrom
@ 2016-04-03 18:48 ` Eric Engestrom
  2016-04-06 16:39   ` Emil Velikov
  2016-04-03 18:48 ` [PATCH libdrm 6/7] tests: " Eric Engestrom
                   ` (2 subsequent siblings)
  6 siblings, 1 reply; 13+ messages in thread
From: Eric Engestrom @ 2016-04-03 18:48 UTC (permalink / raw)
  To: dri-devel; +Cc: Eric Engestrom

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
---
 include/drm/drm_mode.h   | 2 +-
 include/drm/i915_drm.h   | 2 +-
 include/drm/mga_drm.h    | 2 +-
 include/drm/savage_drm.h | 2 +-
 include/drm/vmwgfx_drm.h | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h
index 115f36e..06dd825 100644
--- a/include/drm/drm_mode.h
+++ b/include/drm/drm_mode.h
@@ -406,7 +406,7 @@ struct drm_mode_mode_cmd {
 #define DRM_MODE_CURSOR_MOVE	(1<<1)
 
 /*
- * depending on the value in flags diffrent members are used.
+ * depending on the value in flags different members are used.
  *
  * CURSOR_BO uses
  *    crtc
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 0e51d42..17a90fa 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -958,7 +958,7 @@ struct drm_i915_gem_madvise {
 	__u32 handle;
 
 	/* Advice: either the buffer will be needed again in the near future,
-	 *         or wont be and could be discarded under memory pressure.
+	 *         or won't be and could be discarded under memory pressure.
 	 */
 	__u32 madv;
 
diff --git a/include/drm/mga_drm.h b/include/drm/mga_drm.h
index b630e8f..b7cce73 100644
--- a/include/drm/mga_drm.h
+++ b/include/drm/mga_drm.h
@@ -107,7 +107,7 @@
  */
 #define MGA_NR_SAREA_CLIPRECTS	8
 
-/* 2 heaps (1 for card, 1 for agp), each divided into upto 128
+/* 2 heaps (1 for card, 1 for agp), each divided into up to 128
  * regions, subject to a minimum region size of (1<<16) == 64k.
  *
  * Clients may subdivide regions internally, but when sharing between
diff --git a/include/drm/savage_drm.h b/include/drm/savage_drm.h
index f7a75ef..e5e27b7 100644
--- a/include/drm/savage_drm.h
+++ b/include/drm/savage_drm.h
@@ -29,7 +29,7 @@
 #ifndef __SAVAGE_SAREA_DEFINES__
 #define __SAVAGE_SAREA_DEFINES__
 
-/* 2 heaps (1 for card, 1 for agp), each divided into upto 128
+/* 2 heaps (1 for card, 1 for agp), each divided into up to 128
  * regions, subject to a minimum region size of (1<<16) == 64k.
  *
  * Clients may subdivide regions internally, but when sharing between
diff --git a/include/drm/vmwgfx_drm.h b/include/drm/vmwgfx_drm.h
index 5b68b4d..16e7dd1 100644
--- a/include/drm/vmwgfx_drm.h
+++ b/include/drm/vmwgfx_drm.h
@@ -1025,7 +1025,7 @@ union drm_vmw_gb_surface_reference_arg {
  * for read-only.
  * @drm_vmw_synccpu_write: Sync for write. Block all command submissions
  * referencing this buffer.
- * @drm_vmw_synccpu_dontblock: Dont wait for GPU idle, but rather return
+ * @drm_vmw_synccpu_dontblock: Don't wait for GPU idle, but rather return
  * -EBUSY should the buffer be busy.
  * @drm_vmw_synccpu_allow_cs: Allow command submission that touches the buffer
  * while the buffer is synced for CPU. This is similar to the GEM bo idle
-- 
2.8.0

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^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [PATCH libdrm 6/7] tests: Fix spelling mistakes
  2016-04-03 18:48 [PATCH libdrm 1/7] amdgpu: Fix spelling mistakes Eric Engestrom
                   ` (3 preceding siblings ...)
  2016-04-03 18:48 ` [PATCH libdrm 5/7] include: " Eric Engestrom
@ 2016-04-03 18:48 ` Eric Engestrom
  2016-04-03 18:48 ` [PATCH libdrm 7/7] xf86drm: " Eric Engestrom
  2016-04-04  9:07 ` [PATCH libdrm 1/7] amdgpu: " Christian König
  6 siblings, 0 replies; 13+ messages in thread
From: Eric Engestrom @ 2016-04-03 18:48 UTC (permalink / raw)
  To: dri-devel; +Cc: Eric Engestrom

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
---
 tests/amdgpu/basic_tests.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 4ef6014..599c090 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -803,7 +803,7 @@ static void amdgpu_command_submission_write_linear_helper(unsigned ip_type)
 
 		resources[0] = bo;
 
-		/* fullfill PM4: test DMA write-linear */
+		/* fulfill PM4: test DMA write-linear */
 		i = j = 0;
 		if (ip_type == AMDGPU_HW_IP_DMA) {
 			pm4[i++] = SDMA_PACKET(SDMA_OPCODE_WRITE,
@@ -902,7 +902,7 @@ static void amdgpu_command_submission_const_fill_helper(unsigned ip_type)
 
 		resources[0] = bo;
 
-		/* fullfill PM4: test DMA const fill */
+		/* fulfill PM4: test DMA const fill */
 		i = j = 0;
 		if (ip_type == AMDGPU_HW_IP_DMA) {
 			pm4[i++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0,
@@ -1020,7 +1020,7 @@ static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type)
 			resources[0] = bo1;
 			resources[1] = bo2;
 
-			/* fullfill PM4: test DMA copy linear */
+			/* fulfill PM4: test DMA copy linear */
 			i = j = 0;
 			if (ip_type == AMDGPU_HW_IP_DMA) {
 				pm4[i++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0);
-- 
2.8.0

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^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [PATCH libdrm 7/7] xf86drm: Fix spelling mistakes
  2016-04-03 18:48 [PATCH libdrm 1/7] amdgpu: Fix spelling mistakes Eric Engestrom
                   ` (4 preceding siblings ...)
  2016-04-03 18:48 ` [PATCH libdrm 6/7] tests: " Eric Engestrom
@ 2016-04-03 18:48 ` Eric Engestrom
  2016-04-04  9:07 ` [PATCH libdrm 1/7] amdgpu: " Christian König
  6 siblings, 0 replies; 13+ messages in thread
From: Eric Engestrom @ 2016-04-03 18:48 UTC (permalink / raw)
  To: dri-devel; +Cc: Eric Engestrom

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
---
 xf86drm.c     | 2 +-
 xf86drmMode.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/xf86drm.c b/xf86drm.c
index 5f587d9..45aa5fc 100644
--- a/xf86drm.c
+++ b/xf86drm.c
@@ -2942,7 +2942,7 @@ static int drmGetMaxNodeName(void)
            MAX3(sizeof(DRM_PRIMARY_MINOR_NAME),
                 sizeof(DRM_CONTROL_MINOR_NAME),
                 sizeof(DRM_RENDER_MINOR_NAME)) +
-           3 /* lenght of the node number */;
+           3 /* length of the node number */;
 }
 
 static int drmParsePciDeviceInfo(const char *d_name,
diff --git a/xf86drmMode.c b/xf86drmMode.c
index 7710061..f7b5948 100644
--- a/xf86drmMode.c
+++ b/xf86drmMode.c
@@ -34,7 +34,7 @@
  */
 
 /*
- * TODO the types we are after are defined in diffrent headers on diffrent
+ * TODO the types we are after are defined in different headers on different
  * platforms find which headers to include to get uint32_t
  */
 
-- 
2.8.0

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^ permalink raw reply related	[flat|nested] 13+ messages in thread

* Re: [PATCH libdrm 1/7] amdgpu: Fix spelling mistakes
  2016-04-03 18:48 [PATCH libdrm 1/7] amdgpu: Fix spelling mistakes Eric Engestrom
                   ` (5 preceding siblings ...)
  2016-04-03 18:48 ` [PATCH libdrm 7/7] xf86drm: " Eric Engestrom
@ 2016-04-04  9:07 ` Christian König
  6 siblings, 0 replies; 13+ messages in thread
From: Christian König @ 2016-04-04  9:07 UTC (permalink / raw)
  To: Eric Engestrom, dri-devel

Am 03.04.2016 um 20:48 schrieb Eric Engestrom:
> Signed-off-by: Eric Engestrom <eric@engestrom.ch>

For this one Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>   amdgpu/amdgpu.h | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
> index 0851306..5d5a2c6 100644
> --- a/amdgpu/amdgpu.h
> +++ b/amdgpu/amdgpu.h
> @@ -685,7 +685,7 @@ int amdgpu_create_bo_from_user_mem(amdgpu_device_handle dev,
>   int amdgpu_bo_free(amdgpu_bo_handle buf_handle);
>   
>   /**
> - * Request CPU access to GPU accessable memory
> + * Request CPU access to GPU accessible memory
>    *
>    * \param   buf_handle - \c [in] Buffer handle
>    * \param   cpu        - \c [out] CPU address to be used for access
> @@ -851,7 +851,7 @@ int amdgpu_cs_query_reset_state(amdgpu_context_handle context,
>    * order.
>    *
>    * The caller can specify the user fence buffer/location with the fence_info in the
> - * cs_request.The sequence number is returned via the 'seq_no' paramter
> + * cs_request.The sequence number is returned via the 'seq_no' parameter
>    * in ibs_request structure.
>    *
>    *

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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH libdrm 5/7] include: Fix spelling mistakes
  2016-04-03 18:48 ` [PATCH libdrm 5/7] include: " Eric Engestrom
@ 2016-04-06 16:39   ` Emil Velikov
  0 siblings, 0 replies; 13+ messages in thread
From: Emil Velikov @ 2016-04-06 16:39 UTC (permalink / raw)
  To: Eric Engestrom; +Cc: ML dri-devel

Hi Eric,

On 3 April 2016 at 19:48, Eric Engestrom <eric@engestrom.ch> wrote:
> Signed-off-by: Eric Engestrom <eric@engestrom.ch>
> ---
>  include/drm/drm_mode.h   | 2 +-
>  include/drm/i915_drm.h   | 2 +-
>  include/drm/mga_drm.h    | 2 +-
>  include/drm/savage_drm.h | 2 +-
>  include/drm/vmwgfx_drm.h | 2 +-
>  5 files changed, 5 insertions(+), 5 deletions(-)
>
Can you please re-spin this patch against the kernel UAPI headers ?

These files are meant to be imported from there, so things will end up
badly next time we do.

Thanks
Emil
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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH libdrm 3/7] freedreno: Fix spelling mistakes
  2016-04-03 18:48 ` [PATCH libdrm 3/7] freedreno: Fix spelling mistakes Eric Engestrom
@ 2016-04-06 16:42   ` Emil Velikov
  2016-04-06 16:45     ` Emil Velikov
  2016-04-07  0:04     ` Rob Clark
  0 siblings, 2 replies; 13+ messages in thread
From: Emil Velikov @ 2016-04-06 16:42 UTC (permalink / raw)
  To: Eric Engestrom, Rob Clark; +Cc: ML dri-devel

Hi Eric,

On 3 April 2016 at 19:48, Eric Engestrom <eric@engestrom.ch> wrote:
> Signed-off-by: Eric Engestrom <eric@engestrom.ch>
> ---
>  freedreno/kgsl/kgsl_drm.h | 2 +-
>  freedreno/kgsl/msm_kgsl.h | 4 ++--

Not 100% sure how Rob deals with these. Although I'm suspecting that
they come from a kernel (similar to the ones in PATCH 5/7).

Rob, is any of the above true - are they from a upstream/downstream
kernel somewhere ? If so should we update them here, or in the
'master' project ?

Thanks
Emil
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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH libdrm 3/7] freedreno: Fix spelling mistakes
  2016-04-06 16:42   ` Emil Velikov
@ 2016-04-06 16:45     ` Emil Velikov
  2016-04-07  0:04     ` Rob Clark
  1 sibling, 0 replies; 13+ messages in thread
From: Emil Velikov @ 2016-04-06 16:45 UTC (permalink / raw)
  To: Eric Engestrom, Rob Clark; +Cc: ML dri-devel

On 6 April 2016 at 17:42, Emil Velikov <emil.l.velikov@gmail.com> wrote:
> Hi Eric,
>
> On 3 April 2016 at 19:48, Eric Engestrom <eric@engestrom.ch> wrote:
>> Signed-off-by: Eric Engestrom <eric@engestrom.ch>
>> ---
>>  freedreno/kgsl/kgsl_drm.h | 2 +-
>>  freedreno/kgsl/msm_kgsl.h | 4 ++--
>
> Not 100% sure how Rob deals with these. Although I'm suspecting that
> they come from a kernel (similar to the ones in PATCH 5/7).
>
> Rob, is any of the above true - are they from a upstream/downstream
> kernel somewhere ? If so should we update them here, or in the
> 'master' project ?
>
Completely forgot:

I'll pull the lot (without 5/7 and optionally this one) as we hear from Rob.

Thank for the patches Eric. Some of these are a bit hard to spot ;-)

-Emil
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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH libdrm 3/7] freedreno: Fix spelling mistakes
  2016-04-06 16:42   ` Emil Velikov
  2016-04-06 16:45     ` Emil Velikov
@ 2016-04-07  0:04     ` Rob Clark
  2016-04-07 17:31       ` Emil Velikov
  1 sibling, 1 reply; 13+ messages in thread
From: Rob Clark @ 2016-04-07  0:04 UTC (permalink / raw)
  To: Emil Velikov; +Cc: Eric Engestrom, ML dri-devel

On Wed, Apr 6, 2016 at 12:42 PM, Emil Velikov <emil.l.velikov@gmail.com> wrote:
> Hi Eric,
>
> On 3 April 2016 at 19:48, Eric Engestrom <eric@engestrom.ch> wrote:
>> Signed-off-by: Eric Engestrom <eric@engestrom.ch>
>> ---
>>  freedreno/kgsl/kgsl_drm.h | 2 +-
>>  freedreno/kgsl/msm_kgsl.h | 4 ++--
>
> Not 100% sure how Rob deals with these. Although I'm suspecting that
> they come from a kernel (similar to the ones in PATCH 5/7).
>
> Rob, is any of the above true - are they from a upstream/downstream
> kernel somewhere ? If so should we update them here, or in the
> 'master' project ?

these come from kernel.. but from non-upstream vendor fork, and
probably aren't even up to date w/ more recent vendor kernel branches.
So I guess, meh?  let's just fix it downstream and not worry about it?

BR,
-R

> Thanks
> Emil
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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [PATCH libdrm 3/7] freedreno: Fix spelling mistakes
  2016-04-07  0:04     ` Rob Clark
@ 2016-04-07 17:31       ` Emil Velikov
  0 siblings, 0 replies; 13+ messages in thread
From: Emil Velikov @ 2016-04-07 17:31 UTC (permalink / raw)
  To: Rob Clark; +Cc: Eric Engestrom, ML dri-devel

On 7 April 2016 at 01:04, Rob Clark <robdclark@gmail.com> wrote:
> On Wed, Apr 6, 2016 at 12:42 PM, Emil Velikov <emil.l.velikov@gmail.com> wrote:
>> Hi Eric,
>>
>> On 3 April 2016 at 19:48, Eric Engestrom <eric@engestrom.ch> wrote:
>>> Signed-off-by: Eric Engestrom <eric@engestrom.ch>
>>> ---
>>>  freedreno/kgsl/kgsl_drm.h | 2 +-
>>>  freedreno/kgsl/msm_kgsl.h | 4 ++--
>>
>> Not 100% sure how Rob deals with these. Although I'm suspecting that
>> they come from a kernel (similar to the ones in PATCH 5/7).
>>
>> Rob, is any of the above true - are they from a upstream/downstream
>> kernel somewhere ? If so should we update them here, or in the
>> 'master' project ?
>
> these come from kernel.. but from non-upstream vendor fork, and
> probably aren't even up to date w/ more recent vendor kernel branches.
> So I guess, meh?  let's just fix it downstream and not worry about it?
>
So it's even messier than expected.

Eric, everything but 5/7 is in master now. I'll respin the latter
against the kernel and send it over with a few related changes.

Thanks gents,
Emil
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^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2016-04-07 17:31 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-04-03 18:48 [PATCH libdrm 1/7] amdgpu: Fix spelling mistakes Eric Engestrom
2016-04-03 18:48 ` [PATCH libdrm 2/7] exynos: Fix spelling mistake Eric Engestrom
2016-04-03 18:48 ` [PATCH libdrm 3/7] freedreno: Fix spelling mistakes Eric Engestrom
2016-04-06 16:42   ` Emil Velikov
2016-04-06 16:45     ` Emil Velikov
2016-04-07  0:04     ` Rob Clark
2016-04-07 17:31       ` Emil Velikov
2016-04-03 18:48 ` [PATCH libdrm 4/7] intel: " Eric Engestrom
2016-04-03 18:48 ` [PATCH libdrm 5/7] include: " Eric Engestrom
2016-04-06 16:39   ` Emil Velikov
2016-04-03 18:48 ` [PATCH libdrm 6/7] tests: " Eric Engestrom
2016-04-03 18:48 ` [PATCH libdrm 7/7] xf86drm: " Eric Engestrom
2016-04-04  9:07 ` [PATCH libdrm 1/7] amdgpu: " Christian König

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