[PATCH 0/3] drm/exynos: support HW trigger on i80 mode

[PATCH 0/3] drm/exynos: support HW trigger on i80 mode

[Inki Dae]

This patch series adds HW trigger on i80 mode, including one cleanup patch.

Until now, Exynos drm driver used SW trigger in case of i80 panel
and trigger mode setting of DECON HDMI was not reasonable because
the trigger mode is related to only i80 mode so also corrects it.

With this patch series, HW trigger mode will be used in default if
SoC suppots HW trigger - Exynos3250, 3472, 4415, 5260 5410, 5420 and 5422.

P.s. HW trigger support for Exynos 7 series will be added later.

Thanks,
Inki Dae

Inki Dae (3):
  drm/exynos: clean up wait_for_vblank
  drm/exynos: fimd: add HW trigger support
  drm/exynos: decon: clean up interface type

 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 53 ++++++++++++++-------------
 drivers/gpu/drm/exynos/exynos7_drm_decon.c    |  1 -
 drivers/gpu/drm/exynos/exynos_drm_drv.h       |  3 --
 drivers/gpu/drm/exynos/exynos_drm_fimd.c      | 48 +++++++++++++++++++++++-
 drivers/gpu/drm/exynos/exynos_mixer.c         | 39 --------------------
 5 files changed, 74 insertions(+), 70 deletions(-)

-- 
1.9.1

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[PATCH 1/3] drm/exynos: clean up wait_for_vblank

[Inki Dae]

This patch cleans up wait_for_vblank relevant codes.
wait_for_vblank callback isn't used anymore in Exynos drm driver
so it removes relevant codes. However, display controllers -
FIMD and DECON - still use this function driver internally
to ensure shadow registers to be updated, which resolves
page fault issue so keep it.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
---
 drivers/gpu/drm/exynos/exynos7_drm_decon.c |  1 -
 drivers/gpu/drm/exynos/exynos_drm_drv.h    |  3 ---
 drivers/gpu/drm/exynos/exynos_drm_fimd.c   |  1 -
 drivers/gpu/drm/exynos/exynos_mixer.c      | 39 ------------------------------
 4 files changed, 44 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index 9336107..f6223f9 100644
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -593,7 +593,6 @@ static const struct exynos_drm_crtc_ops decon_crtc_ops = {
 	.commit = decon_commit,
 	.enable_vblank = decon_enable_vblank,
 	.disable_vblank = decon_disable_vblank,
-	.wait_for_vblank = decon_wait_for_vblank,
 	.atomic_begin = decon_atomic_begin,
 	.update_plane = decon_update_plane,
 	.disable_plane = decon_disable_plane,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 502f750..bfe835a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -120,8 +120,6 @@ struct exynos_drm_plane_config {
  * @commit: set current hw specific display mode to hw.
  * @enable_vblank: specific driver callback for enabling vblank interrupt.
  * @disable_vblank: specific driver callback for disabling vblank interrupt.
- * @wait_for_vblank: wait for vblank interrupt to make sure that
- *	hardware overlay is updated.
  * @atomic_check: validate state
  * @atomic_begin: prepare device to receive an update
  * @atomic_flush: mark the end of device update
@@ -141,7 +139,6 @@ struct exynos_drm_crtc_ops {
 	void (*commit)(struct exynos_drm_crtc *crtc);
 	int (*enable_vblank)(struct exynos_drm_crtc *crtc);
 	void (*disable_vblank)(struct exynos_drm_crtc *crtc);
-	void (*wait_for_vblank)(struct exynos_drm_crtc *crtc);
 	int (*atomic_check)(struct exynos_drm_crtc *crtc,
 			    struct drm_crtc_state *state);
 	void (*atomic_begin)(struct exynos_drm_crtc *crtc);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 51d484a..752c6b0 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -902,7 +902,6 @@ static const struct exynos_drm_crtc_ops fimd_crtc_ops = {
 	.commit = fimd_commit,
 	.enable_vblank = fimd_enable_vblank,
 	.disable_vblank = fimd_disable_vblank,
-	.wait_for_vblank = fimd_wait_for_vblank,
 	.atomic_begin = fimd_atomic_begin,
 	.update_plane = fimd_update_plane,
 	.disable_plane = fimd_disable_plane,
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index 0a5a600..f272417 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -103,8 +103,6 @@ struct mixer_context {
 
 	struct mixer_resources	mixer_res;
 	enum mixer_version_id	mxr_ver;
-	wait_queue_head_t	wait_vsync_queue;
-	atomic_t		wait_vsync_event;
 };
 
 struct mixer_drv_data {
@@ -787,12 +785,6 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg)
 
 			exynos_drm_crtc_finish_update(ctx->crtc, plane);
 		}
-
-		/* set wait vsync event to zero and wake up queue. */
-		if (atomic_read(&ctx->wait_vsync_event)) {
-			atomic_set(&ctx->wait_vsync_event, 0);
-			wake_up(&ctx->wait_vsync_queue);
-		}
 	}
 
 out:
@@ -1027,34 +1019,6 @@ static void mixer_atomic_flush(struct exynos_drm_crtc *crtc)
 	mixer_vsync_set_update(mixer_ctx, true);
 }
 
-static void mixer_wait_for_vblank(struct exynos_drm_crtc *crtc)
-{
-	struct mixer_context *mixer_ctx = crtc->ctx;
-	int err;
-
-	if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags))
-		return;
-
-	err = drm_vblank_get(mixer_ctx->drm_dev, mixer_ctx->pipe);
-	if (err < 0) {
-		DRM_DEBUG_KMS("failed to acquire vblank counter\n");
-		return;
-	}
-
-	atomic_set(&mixer_ctx->wait_vsync_event, 1);
-
-	/*
-	 * wait for MIXER to signal VSYNC interrupt or return after
-	 * timeout which is set to 50ms (refresh rate of 20).
-	 */
-	if (!wait_event_timeout(mixer_ctx->wait_vsync_queue,
-				!atomic_read(&mixer_ctx->wait_vsync_event),
-				HZ/20))
-		DRM_DEBUG_KMS("vblank wait timed out.\n");
-
-	drm_vblank_put(mixer_ctx->drm_dev, mixer_ctx->pipe);
-}
-
 static void mixer_enable(struct exynos_drm_crtc *crtc)
 {
 	struct mixer_context *ctx = crtc->ctx;
@@ -1126,7 +1090,6 @@ static const struct exynos_drm_crtc_ops mixer_crtc_ops = {
 	.disable		= mixer_disable,
 	.enable_vblank		= mixer_enable_vblank,
 	.disable_vblank		= mixer_disable_vblank,
-	.wait_for_vblank	= mixer_wait_for_vblank,
 	.atomic_begin		= mixer_atomic_begin,
 	.update_plane		= mixer_update_plane,
 	.disable_plane		= mixer_disable_plane,
@@ -1268,8 +1231,6 @@ static int mixer_probe(struct platform_device *pdev)
 	ctx->vp_enabled = drv->is_vp_enabled;
 	ctx->has_sclk = drv->has_sclk;
 	ctx->mxr_ver = drv->version;
-	init_waitqueue_head(&ctx->wait_vsync_queue);
-	atomic_set(&ctx->wait_vsync_event, 0);
 
 	platform_set_drvdata(pdev, ctx);
 
-- 
1.9.1

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[PATCH 2/3] drm/exynos: fimd: add HW trigger support

[Inki Dae]

This patch adds HW trigger support on i80 mode.

Until now, Exynos DRM only supported SW trigger which was set
SWTRGCMD bit of TRIGCON register by CPU to transfer scanout
buffer to Display bus device or panel.

With this patch, the transmission to Display bus device or
panel will be initiated by FIMD controller.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_drm_fimd.c | 47 ++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 752c6b0..c4cd16a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -72,6 +72,11 @@
 #define TRIGCON				0x1A4
 #define TRGMODE_I80_RGB_ENABLE_I80	(1 << 0)
 #define SWTRGCMD_I80_RGB_ENABLE		(1 << 1)
+/* Exynos3250, 3472, 4415, 5260 5410, 5420 and 5422 only supported. */
+#define HWTRGEN_I80_RGB_ENABLE		(1 << 3)
+#define HWTRGMASK_I80_RGB_ENABLE	(1 << 4)
+/* Exynos3250, 3472, 4415, 5260, 5420 and 5422 only supported. */
+#define HWTRIGEN_PER_RGB_ENABLE		(1 << 31)
 
 /* display mode change control register except exynos4 */
 #define VIDOUT_CON			0x000
@@ -89,12 +94,16 @@
 /* FIMD has totally five hardware windows. */
 #define WINDOWS_NR	5
 
+/* HW trigger flag on i80 panel. */
+#define I80_HW_TRG     (1 << 1)
+
 struct fimd_driver_data {
 	unsigned int timing_base;
 	unsigned int lcdblk_offset;
 	unsigned int lcdblk_vt_shift;
 	unsigned int lcdblk_bypass_shift;
 	unsigned int lcdblk_mic_bypass_shift;
+	unsigned int trg_type;
 
 	unsigned int has_shadowcon:1;
 	unsigned int has_clksel:1;
@@ -102,6 +111,8 @@ struct fimd_driver_data {
 	unsigned int has_vidoutcon:1;
 	unsigned int has_vtsel:1;
 	unsigned int has_mic_bypass:1;
+	unsigned int has_hw_trigger:1;
+	unsigned int has_trigger_per_te:1;
 };
 
 static struct fimd_driver_data s3c64xx_fimd_driver_data = {
@@ -114,8 +125,10 @@ static struct fimd_driver_data exynos3_fimd_driver_data = {
 	.timing_base = 0x20000,
 	.lcdblk_offset = 0x210,
 	.lcdblk_bypass_shift = 1,
+	.trg_type = I80_HW_TRG,
 	.has_shadowcon = 1,
 	.has_vidoutcon = 1,
+	.has_trigger_per_te = 1,
 };
 
 static struct fimd_driver_data exynos4_fimd_driver_data = {
@@ -132,9 +145,11 @@ static struct fimd_driver_data exynos4415_fimd_driver_data = {
 	.lcdblk_offset = 0x210,
 	.lcdblk_vt_shift = 10,
 	.lcdblk_bypass_shift = 1,
+	.trg_type = I80_HW_TRG,
 	.has_shadowcon = 1,
 	.has_vidoutcon = 1,
 	.has_vtsel = 1,
+	.has_trigger_per_te = 1,
 };
 
 static struct fimd_driver_data exynos5_fimd_driver_data = {
@@ -145,6 +160,7 @@ static struct fimd_driver_data exynos5_fimd_driver_data = {
 	.has_shadowcon = 1,
 	.has_vidoutcon = 1,
 	.has_vtsel = 1,
+	.has_hw_trigger = 1,
 };
 
 static struct fimd_driver_data exynos5420_fimd_driver_data = {
@@ -153,10 +169,13 @@ static struct fimd_driver_data exynos5420_fimd_driver_data = {
 	.lcdblk_vt_shift = 24,
 	.lcdblk_bypass_shift = 15,
 	.lcdblk_mic_bypass_shift = 11,
+	.trg_type = I80_HW_TRG,
 	.has_shadowcon = 1,
 	.has_vidoutcon = 1,
 	.has_vtsel = 1,
 	.has_mic_bypass = 1,
+	.has_hw_trigger = 1,
+	.has_trigger_per_te = 1,
 };
 
 struct fimd_context {
@@ -400,6 +419,27 @@ static u32 fimd_calc_clkdiv(struct fimd_context *ctx,
 	return (clkdiv < 0x100) ? clkdiv : 0xff;
 }
 
+static void fimd_setup_trigger(struct fimd_context *ctx)
+{
+	void __iomem *timing_base = ctx->regs + ctx->driver_data->timing_base;
+	u32 trg_type = ctx->driver_data->trg_type;
+	u32 val = readl(timing_base + TRIGCON);
+
+	val &= ~(TRGMODE_I80_RGB_ENABLE_I80);
+
+	if (trg_type == I80_HW_TRG) {
+		if (ctx->driver_data->has_hw_trigger)
+			val |= HWTRGEN_I80_RGB_ENABLE |
+				HWTRGMASK_I80_RGB_ENABLE;
+		if (ctx->driver_data->has_trigger_per_te)
+			val |= HWTRIGEN_PER_RGB_ENABLE;
+	} else {
+		val |= TRGMODE_I80_RGB_ENABLE_I80;
+	}
+
+	writel(val, timing_base + TRIGCON);
+}
+
 static void fimd_commit(struct exynos_drm_crtc *crtc)
 {
 	struct fimd_context *ctx = crtc->ctx;
@@ -495,6 +535,8 @@ static void fimd_commit(struct exynos_drm_crtc *crtc)
 	       VIDTCON2_HOZVAL_E(mode->hdisplay - 1);
 	writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);
 
+	fimd_setup_trigger(ctx);
+
 	/*
 	 * fields of register with prefix '_F' would be updated
 	 * at vsync(same as dma start)
@@ -856,11 +898,15 @@ static void fimd_trigger(struct device *dev)
 static void fimd_te_handler(struct exynos_drm_crtc *crtc)
 {
 	struct fimd_context *ctx = crtc->ctx;
+	u32 trg_type = ctx->driver_data->trg_type;
 
 	/* Checks the crtc is detached already from encoder */
 	if (ctx->pipe < 0 || !ctx->drm_dev)
 		return;
 
+	if (trg_type == I80_HW_TRG)
+		goto out;
+
 	/*
 	 * If there is a page flip request, triggers and handles the page flip
 	 * event so that current fb can be updated into panel GRAM.
@@ -868,6 +914,7 @@ static void fimd_te_handler(struct exynos_drm_crtc *crtc)
 	if (atomic_add_unless(&ctx->win_updated, -1, 0))
 		fimd_trigger(ctx->dev);
 
+out:
 	/* Wakes up vsync event queue */
 	if (atomic_read(&ctx->wait_vsync_event)) {
 		atomic_set(&ctx->wait_vsync_event, 0);
-- 
1.9.1

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Re: [PATCH 2/3] drm/exynos: fimd: add HW trigger support

[Javier Martinez Canillas]

Hello Inki,

On 04/05/2016 04:27 AM, Inki Dae wrote:
> This patch adds HW trigger support on i80 mode.
> 
> Until now, Exynos DRM only supported SW trigger which was set
> SWTRGCMD bit of TRIGCON register by CPU to transfer scanout
> buffer to Display bus device or panel.
> 
> With this patch, the transmission to Display bus device or
> panel will be initiated by FIMD controller.
> 
> Signed-off-by: Inki Dae <inki.dae@samsung.com>
> ---

There is a regression for the Exynos5800 Peach Pi Chromebook display due
this patch. The display is blank and I noticed that it only happens when
HW start trigger is enabled, but works with SW trigger (as it was before).

So for example with the following diff on top of v4.7-rc1, display works
again. Do you have any hints about what could be the issue?

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 0444d7fc400d..8c62830e9514 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -171,7 +171,7 @@ static struct fimd_driver_data exynos5420_fimd_driver_data = {
 	.lcdblk_vt_shift = 24,
 	.lcdblk_bypass_shift = 15,
 	.lcdblk_mic_bypass_shift = 11,
-	.trg_type = I80_HW_TRG,
 	.has_shadowcon = 1,
 	.has_vidoutcon = 1,
 	.has_vtsel = 1,

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America
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Re: [PATCH 2/3] drm/exynos: fimd: add HW trigger support

[Marc Zyngier]

On 2016-05-30 23:58, Javier Martinez Canillas wrote:
> Hello Inki,
>
> On 04/05/2016 04:27 AM, Inki Dae wrote:
>> This patch adds HW trigger support on i80 mode.
>>
>> Until now, Exynos DRM only supported SW trigger which was set
>> SWTRGCMD bit of TRIGCON register by CPU to transfer scanout
>> buffer to Display bus device or panel.
>>
>> With this patch, the transmission to Display bus device or
>> panel will be initiated by FIMD controller.
>>
>> Signed-off-by: Inki Dae <inki.dae@samsung.com>
>> ---
>
> There is a regression for the Exynos5800 Peach Pi Chromebook display 
> due
> this patch. The display is blank and I noticed that it only happens 
> when
> HW start trigger is enabled, but works with SW trigger (as it was 
> before).
>
> So for example with the following diff on top of v4.7-rc1, display 
> works
> again. Do you have any hints about what could be the issue?
>
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> index 0444d7fc400d..8c62830e9514 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> @@ -171,7 +171,7 @@ static struct fimd_driver_data
> exynos5420_fimd_driver_data = {
>  	.lcdblk_vt_shift = 24,
>  	.lcdblk_bypass_shift = 15,
>  	.lcdblk_mic_bypass_shift = 11,
> -	.trg_type = I80_HW_TRG,
>  	.has_shadowcon = 1,
>  	.has_vidoutcon = 1,
>  	.has_vtsel = 1,
>
> Best regards,

On a related note, my Exynos5250 Chromebook (snow) has stopped working 
as well since -rc1 has landed. I haven't had time to bisect it yet, but 
the symptoms are vaguely similar (bright white screen).

I'm happy to test patches.

Thanks,

         M.
-- 
Who you jivin' with that Cosmik Debris?

Re: [PATCH 2/3] drm/exynos: fimd: add HW trigger support

[Inki Dae]

Hi Javier,

2016년 05월 31일 07:58에 Javier Martinez Canillas 이(가) 쓴 글:
> Hello Inki,
> 
> On 04/05/2016 04:27 AM, Inki Dae wrote:
>> This patch adds HW trigger support on i80 mode.
>>
>> Until now, Exynos DRM only supported SW trigger which was set
>> SWTRGCMD bit of TRIGCON register by CPU to transfer scanout
>> buffer to Display bus device or panel.
>>
>> With this patch, the transmission to Display bus device or
>> panel will be initiated by FIMD controller.
>>
>> Signed-off-by: Inki Dae <inki.dae@samsung.com>
>> ---
> 
> There is a regression for the Exynos5800 Peach Pi Chromebook display due
> this patch. The display is blank and I noticed that it only happens when
> HW start trigger is enabled, but works with SW trigger (as it was before).
> 
> So for example with the following diff on top of v4.7-rc1, display works
> again. Do you have any hints about what could be the issue?

Right, there is a regression on boards with i80 Panel and in case that bootloader set trigger mode to SW trigger. The current trigger mode should be changed to other one after entering into PSR mode of Panel device according to HW guy's saying. If the panel doesn't support the PSR mode, then the mode should be changed after Panel power off and on again. I don't understand exactly what is the PSR mode so I need more details about PSR mode.

I will fix it soon.

Thanks,
Inki Dae  


> 
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> index 0444d7fc400d..8c62830e9514 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> @@ -171,7 +171,7 @@ static struct fimd_driver_data exynos5420_fimd_driver_data = {
>  	.lcdblk_vt_shift = 24,
>  	.lcdblk_bypass_shift = 15,
>  	.lcdblk_mic_bypass_shift = 11,
> -	.trg_type = I80_HW_TRG,
>  	.has_shadowcon = 1,
>  	.has_vidoutcon = 1,
>  	.has_vtsel = 1,
> 
> Best regards,
> 

Re: [PATCH 2/3] drm/exynos: fimd: add HW trigger support

[Inki Dae]

Hi Javier,

2016년 05월 31일 07:58에 Javier Martinez Canillas 이(가) 쓴 글:
> Hello Inki,
> 
> On 04/05/2016 04:27 AM, Inki Dae wrote:
>> This patch adds HW trigger support on i80 mode.
>>
>> Until now, Exynos DRM only supported SW trigger which was set
>> SWTRGCMD bit of TRIGCON register by CPU to transfer scanout
>> buffer to Display bus device or panel.
>>
>> With this patch, the transmission to Display bus device or
>> panel will be initiated by FIMD controller.
>>
>> Signed-off-by: Inki Dae <inki.dae@samsung.com>
>> ---
> 
> There is a regression for the Exynos5800 Peach Pi Chromebook display due
> this patch. The display is blank and I noticed that it only happens when
> HW start trigger is enabled, but works with SW trigger (as it was before).

Posted below pathch,
[PATCH] drm/exynos: fimd: fix trigger mode change regression

Can you test it again with the patch? I have no HW to test it. :(

Thanks,
Inki Dae

> 
> So for example with the following diff on top of v4.7-rc1, display works
> again. Do you have any hints about what could be the issue?
> 
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> index 0444d7fc400d..8c62830e9514 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> @@ -171,7 +171,7 @@ static struct fimd_driver_data exynos5420_fimd_driver_data = {
>  	.lcdblk_vt_shift = 24,
>  	.lcdblk_bypass_shift = 15,
>  	.lcdblk_mic_bypass_shift = 11,
> -	.trg_type = I80_HW_TRG,
>  	.has_shadowcon = 1,
>  	.has_vidoutcon = 1,
>  	.has_vtsel = 1,
> 
> Best regards,
> 

Re: [PATCH 2/3] drm/exynos: fimd: add HW trigger support

[Javier Martinez Canillas]

Hello Inki,

On 06/01/2016 01:56 AM, Inki Dae wrote:
> Hi Javier,
> 
> 2016년 05월 31일 07:58에 Javier Martinez Canillas 이(가) 쓴 글:
>> Hello Inki,
>>
>> On 04/05/2016 04:27 AM, Inki Dae wrote:
>>> This patch adds HW trigger support on i80 mode.
>>>
>>> Until now, Exynos DRM only supported SW trigger which was set
>>> SWTRGCMD bit of TRIGCON register by CPU to transfer scanout
>>> buffer to Display bus device or panel.
>>>
>>> With this patch, the transmission to Display bus device or
>>> panel will be initiated by FIMD controller.
>>>
>>> Signed-off-by: Inki Dae <inki.dae@samsung.com>
>>> ---
>>
>> There is a regression for the Exynos5800 Peach Pi Chromebook display due
>> this patch. The display is blank and I noticed that it only happens when
>> HW start trigger is enabled, but works with SW trigger (as it was before).
> 
> Posted below pathch,
> [PATCH] drm/exynos: fimd: fix trigger mode change regression
>

Thanks, I noticed you forgot to cc me on that one though.
 
> Can you test it again with the patch? I have no HW to test it. :(
>

I gave a try to your patch but unfortunately it doesn't solve the issue
on the Peach Pi. I'll try to dig further on this.
 
> Thanks,
> Inki Dae
> 

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America
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[PATCH 3/3] drm/exynos: decon: clean up interface type

[Inki Dae]

This patch cleans up interface type relevant codes.

Trigger mode is determinded only by i80 mode, which isn't
related to Display types - HDMI or Display controller.
So this patch makes the trigger mode to be set only in case of
i80 mode.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 53 ++++++++++++++-------------
 1 file changed, 27 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 5245bc5..5922e99 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -28,6 +28,10 @@
 #define WINDOWS_NR	3
 #define MIN_FB_WIDTH_FOR_16WORD_BURST	128
 
+#define IFTYPE_I80	(1 << 0)
+#define I80_HW_TRG	(1 << 1)
+#define IFTYPE_HDMI	(1 << 2)
+
 static const char * const decon_clks_name[] = {
 	"pclk",
 	"aclk_decon",
@@ -38,12 +42,6 @@ static const char * const decon_clks_name[] = {
 	"sclk_decon_eclk",
 };
 
-enum decon_iftype {
-	IFTYPE_RGB,
-	IFTYPE_I80,
-	IFTYPE_HDMI
-};
-
 enum decon_flag_bits {
 	BIT_CLKS_ENABLED,
 	BIT_IRQS_ENABLED,
@@ -61,7 +59,7 @@ struct decon_context {
 	struct clk			*clks[ARRAY_SIZE(decon_clks_name)];
 	int				pipe;
 	unsigned long			flags;
-	enum decon_iftype		out_type;
+	unsigned int			out_type;
 	int				first_win;
 };
 
@@ -95,7 +93,7 @@ static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
 
 	if (!test_and_set_bit(BIT_IRQS_ENABLED, &ctx->flags)) {
 		val = VIDINTCON0_INTEN;
-		if (ctx->out_type == IFTYPE_I80)
+		if (ctx->out_type & IFTYPE_I80)
 			val |= VIDINTCON0_FRAMEDONE;
 		else
 			val |= VIDINTCON0_INTFRMEN;
@@ -119,7 +117,7 @@ static void decon_disable_vblank(struct exynos_drm_crtc *crtc)
 
 static void decon_setup_trigger(struct decon_context *ctx)
 {
-	u32 val = (ctx->out_type != IFTYPE_HDMI)
+	u32 val = !(ctx->out_type & I80_HW_TRG)
 		? TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
 		  TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN
 		: TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
@@ -136,7 +134,7 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
 	if (test_bit(BIT_SUSPENDED, &ctx->flags))
 		return;
 
-	if (ctx->out_type == IFTYPE_HDMI) {
+	if (ctx->out_type & IFTYPE_HDMI) {
 		m->crtc_hsync_start = m->crtc_hdisplay + 10;
 		m->crtc_hsync_end = m->crtc_htotal - 92;
 		m->crtc_vsync_start = m->crtc_vdisplay + 1;
@@ -151,17 +149,20 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
 
 	/* lcd on and use command if */
 	val = VIDOUT_LCD_ON;
-	if (ctx->out_type == IFTYPE_I80)
+	if (ctx->out_type & IFTYPE_I80) {
 		val |= VIDOUT_COMMAND_IF;
-	else
+		decon_setup_trigger(ctx);
+	} else {
 		val |= VIDOUT_RGB_IF;
+	}
+
 	writel(val, ctx->addr + DECON_VIDOUTCON0);
 
 	val = VIDTCON2_LINEVAL(m->vdisplay - 1) |
 		VIDTCON2_HOZVAL(m->hdisplay - 1);
 	writel(val, ctx->addr + DECON_VIDTCON2);
 
-	if (ctx->out_type != IFTYPE_I80) {
+	if (!(ctx->out_type & IFTYPE_I80)) {
 		val = VIDTCON00_VBPD_F(
 				m->crtc_vtotal - m->crtc_vsync_end - 1) |
 			VIDTCON00_VFPD_F(
@@ -183,8 +184,6 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
 		writel(val, ctx->addr + DECON_VIDTCON11);
 	}
 
-	decon_setup_trigger(ctx);
-
 	/* enable output and display signal */
 	decon_set_bits(ctx, DECON_VIDCON0, VIDCON0_ENVID | VIDCON0_ENVID_F, ~0);
 }
@@ -300,7 +299,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
 	val = dma_addr + pitch * state->src.h;
 	writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));
 
-	if (ctx->out_type != IFTYPE_HDMI)
+	if (!(ctx->out_type & IFTYPE_HDMI))
 		val = BIT_VAL(pitch - state->crtc.w * bpp, 27, 14)
 			| BIT_VAL(state->crtc.w * bpp, 13, 0);
 	else
@@ -348,7 +347,7 @@ static void decon_atomic_flush(struct exynos_drm_crtc *crtc)
 	for (i = ctx->first_win; i < WINDOWS_NR; i++)
 		decon_shadow_protect_win(ctx, i, false);
 
-	if (ctx->out_type == IFTYPE_I80)
+	if (ctx->out_type & IFTYPE_I80)
 		set_bit(BIT_WIN_UPDATED, &ctx->flags);
 }
 
@@ -374,7 +373,7 @@ static void decon_swreset(struct decon_context *ctx)
 
 	WARN(tries == 0, "failed to software reset DECON\n");
 
-	if (ctx->out_type != IFTYPE_HDMI)
+	if (!(ctx->out_type & IFTYPE_HDMI))
 		return;
 
 	writel(VIDCON0_CLKVALUP | VIDCON0_VLCKFREE, ctx->addr + DECON_VIDCON0);
@@ -383,7 +382,9 @@ static void decon_swreset(struct decon_context *ctx)
 	writel(VIDCON1_VCLK_RUN_VDEN_DISABLE, ctx->addr + DECON_VIDCON1);
 	writel(CRCCTRL_CRCEN | CRCCTRL_CRCSTART_F | CRCCTRL_CRCCLKEN,
 	       ctx->addr + DECON_CRCCTRL);
-	decon_setup_trigger(ctx);
+
+	if (ctx->out_type & IFTYPE_I80)
+		decon_setup_trigger(ctx);
 }
 
 static void decon_enable(struct exynos_drm_crtc *crtc)
@@ -509,7 +510,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
 	}
 
 	exynos_plane = &ctx->planes[ctx->first_win];
-	out_type = (ctx->out_type == IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI
+	out_type = (ctx->out_type & IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI
 						  : EXYNOS_DISPLAY_TYPE_LCD;
 	ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
 					ctx->pipe, out_type,
@@ -617,11 +618,11 @@ static const struct dev_pm_ops exynos5433_decon_pm_ops = {
 static const struct of_device_id exynos5433_decon_driver_dt_match[] = {
 	{
 		.compatible = "samsung,exynos5433-decon",
-		.data = (void *)IFTYPE_RGB
+		.data = (void *)I80_HW_TRG
 	},
 	{
 		.compatible = "samsung,exynos5433-decon-tv",
-		.data = (void *)IFTYPE_HDMI
+		.data = (void *)(I80_HW_TRG | IFTYPE_HDMI)
 	},
 	{},
 };
@@ -644,12 +645,12 @@ static int exynos5433_decon_probe(struct platform_device *pdev)
 	ctx->dev = dev;
 
 	of_id = of_match_device(exynos5433_decon_driver_dt_match, &pdev->dev);
-	ctx->out_type = (enum decon_iftype)of_id->data;
+	ctx->out_type = (unsigned int)of_id->data;
 
-	if (ctx->out_type == IFTYPE_HDMI)
+	if (ctx->out_type & IFTYPE_HDMI)
 		ctx->first_win = 1;
 	else if (of_get_child_by_name(dev->of_node, "i80-if-timings"))
-		ctx->out_type = IFTYPE_I80;
+		ctx->out_type |= IFTYPE_I80;
 
 	for (i = 0; i < ARRAY_SIZE(decon_clks_name); i++) {
 		struct clk *clk;
@@ -674,7 +675,7 @@ static int exynos5433_decon_probe(struct platform_device *pdev)
 	}
 
 	res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
-			(ctx->out_type == IFTYPE_I80) ? "lcd_sys" : "vsync");
+			(ctx->out_type & IFTYPE_I80) ? "lcd_sys" : "vsync");
 	if (!res) {
 		dev_err(dev, "cannot find IRQ resource\n");
 		return -ENXIO;
-- 
1.9.1

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Re: [PATCH 3/3] drm/exynos: decon: clean up interface type

[Andrzej Hajda]

Hi Inki,

On 04/05/2016 10:27 AM, Inki Dae wrote:
> This patch cleans up interface type relevant codes.
> 
> Trigger mode is determinded only by i80 mode, which isn't
> related to Display types - HDMI or Display controller.
> So this patch makes the trigger mode to be set only in case of
> i80 mode.

With this patch HDMI path image has serious synchronization problems.
Exynos5433 documentation says that HDMI Timing Generator generates VSYNC
signal which works as a hardware trigger for DECON-TV, so I guess
trigger is required.

Btw, I think it could be good to remove suffixes I80_RGV from
TRIGCON_HWTRIGEN_I80_RGB and TRIGCON_HWTRIGMASK_I80_RGB - they are
misleading and differ from documentation.

As far as I have tested I80 mode works OK on Decon5433.

Regards
Andrzej

> 
> Signed-off-by: Inki Dae <inki.dae@samsung.com>
> ---
>  drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 53 ++++++++++++++-------------
>  1 file changed, 27 insertions(+), 26 deletions(-)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
> index 5245bc5..5922e99 100644
> --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
> +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
> @@ -28,6 +28,10 @@
>  #define WINDOWS_NR	3
>  #define MIN_FB_WIDTH_FOR_16WORD_BURST	128
>  
> +#define IFTYPE_I80	(1 << 0)
> +#define I80_HW_TRG	(1 << 1)
> +#define IFTYPE_HDMI	(1 << 2)
> +
>  static const char * const decon_clks_name[] = {
>  	"pclk",
>  	"aclk_decon",
> @@ -38,12 +42,6 @@ static const char * const decon_clks_name[] = {
>  	"sclk_decon_eclk",
>  };
>  
> -enum decon_iftype {
> -	IFTYPE_RGB,
> -	IFTYPE_I80,
> -	IFTYPE_HDMI
> -};
> -
>  enum decon_flag_bits {
>  	BIT_CLKS_ENABLED,
>  	BIT_IRQS_ENABLED,
> @@ -61,7 +59,7 @@ struct decon_context {
>  	struct clk			*clks[ARRAY_SIZE(decon_clks_name)];
>  	int				pipe;
>  	unsigned long			flags;
> -	enum decon_iftype		out_type;
> +	unsigned int			out_type;
>  	int				first_win;
>  };
>  
> @@ -95,7 +93,7 @@ static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
>  
>  	if (!test_and_set_bit(BIT_IRQS_ENABLED, &ctx->flags)) {
>  		val = VIDINTCON0_INTEN;
> -		if (ctx->out_type == IFTYPE_I80)
> +		if (ctx->out_type & IFTYPE_I80)
>  			val |= VIDINTCON0_FRAMEDONE;
>  		else
>  			val |= VIDINTCON0_INTFRMEN;
> @@ -119,7 +117,7 @@ static void decon_disable_vblank(struct exynos_drm_crtc *crtc)
>  
>  static void decon_setup_trigger(struct decon_context *ctx)
>  {
> -	u32 val = (ctx->out_type != IFTYPE_HDMI)
> +	u32 val = !(ctx->out_type & I80_HW_TRG)
>  		? TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
>  		  TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN
>  		: TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
> @@ -136,7 +134,7 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>  	if (test_bit(BIT_SUSPENDED, &ctx->flags))
>  		return;
>  
> -	if (ctx->out_type == IFTYPE_HDMI) {
> +	if (ctx->out_type & IFTYPE_HDMI) {
>  		m->crtc_hsync_start = m->crtc_hdisplay + 10;
>  		m->crtc_hsync_end = m->crtc_htotal - 92;
>  		m->crtc_vsync_start = m->crtc_vdisplay + 1;
> @@ -151,17 +149,20 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>  
>  	/* lcd on and use command if */
>  	val = VIDOUT_LCD_ON;
> -	if (ctx->out_type == IFTYPE_I80)
> +	if (ctx->out_type & IFTYPE_I80) {
>  		val |= VIDOUT_COMMAND_IF;
> -	else
> +		decon_setup_trigger(ctx);
> +	} else {
>  		val |= VIDOUT_RGB_IF;
> +	}
> +
>  	writel(val, ctx->addr + DECON_VIDOUTCON0);
>  
>  	val = VIDTCON2_LINEVAL(m->vdisplay - 1) |
>  		VIDTCON2_HOZVAL(m->hdisplay - 1);
>  	writel(val, ctx->addr + DECON_VIDTCON2);
>  
> -	if (ctx->out_type != IFTYPE_I80) {
> +	if (!(ctx->out_type & IFTYPE_I80)) {
>  		val = VIDTCON00_VBPD_F(
>  				m->crtc_vtotal - m->crtc_vsync_end - 1) |
>  			VIDTCON00_VFPD_F(
> @@ -183,8 +184,6 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>  		writel(val, ctx->addr + DECON_VIDTCON11);
>  	}
>  
> -	decon_setup_trigger(ctx);
> -
>  	/* enable output and display signal */
>  	decon_set_bits(ctx, DECON_VIDCON0, VIDCON0_ENVID | VIDCON0_ENVID_F, ~0);
>  }
> @@ -300,7 +299,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
>  	val = dma_addr + pitch * state->src.h;
>  	writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));
>  
> -	if (ctx->out_type != IFTYPE_HDMI)
> +	if (!(ctx->out_type & IFTYPE_HDMI))
>  		val = BIT_VAL(pitch - state->crtc.w * bpp, 27, 14)
>  			| BIT_VAL(state->crtc.w * bpp, 13, 0);
>  	else
> @@ -348,7 +347,7 @@ static void decon_atomic_flush(struct exynos_drm_crtc *crtc)
>  	for (i = ctx->first_win; i < WINDOWS_NR; i++)
>  		decon_shadow_protect_win(ctx, i, false);
>  
> -	if (ctx->out_type == IFTYPE_I80)
> +	if (ctx->out_type & IFTYPE_I80)
>  		set_bit(BIT_WIN_UPDATED, &ctx->flags);
>  }
>  
> @@ -374,7 +373,7 @@ static void decon_swreset(struct decon_context *ctx)
>  
>  	WARN(tries == 0, "failed to software reset DECON\n");
>  
> -	if (ctx->out_type != IFTYPE_HDMI)
> +	if (!(ctx->out_type & IFTYPE_HDMI))
>  		return;
>  
>  	writel(VIDCON0_CLKVALUP | VIDCON0_VLCKFREE, ctx->addr + DECON_VIDCON0);
> @@ -383,7 +382,9 @@ static void decon_swreset(struct decon_context *ctx)
>  	writel(VIDCON1_VCLK_RUN_VDEN_DISABLE, ctx->addr + DECON_VIDCON1);
>  	writel(CRCCTRL_CRCEN | CRCCTRL_CRCSTART_F | CRCCTRL_CRCCLKEN,
>  	       ctx->addr + DECON_CRCCTRL);
> -	decon_setup_trigger(ctx);
> +
> +	if (ctx->out_type & IFTYPE_I80)
> +		decon_setup_trigger(ctx);
>  }
>  
>  static void decon_enable(struct exynos_drm_crtc *crtc)
> @@ -509,7 +510,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
>  	}
>  
>  	exynos_plane = &ctx->planes[ctx->first_win];
> -	out_type = (ctx->out_type == IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI
> +	out_type = (ctx->out_type & IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI
>  						  : EXYNOS_DISPLAY_TYPE_LCD;
>  	ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
>  					ctx->pipe, out_type,
> @@ -617,11 +618,11 @@ static const struct dev_pm_ops exynos5433_decon_pm_ops = {
>  static const struct of_device_id exynos5433_decon_driver_dt_match[] = {
>  	{
>  		.compatible = "samsung,exynos5433-decon",
> -		.data = (void *)IFTYPE_RGB
> +		.data = (void *)I80_HW_TRG
>  	},
>  	{
>  		.compatible = "samsung,exynos5433-decon-tv",
> -		.data = (void *)IFTYPE_HDMI
> +		.data = (void *)(I80_HW_TRG | IFTYPE_HDMI)
>  	},
>  	{},
>  };
> @@ -644,12 +645,12 @@ static int exynos5433_decon_probe(struct platform_device *pdev)
>  	ctx->dev = dev;
>  
>  	of_id = of_match_device(exynos5433_decon_driver_dt_match, &pdev->dev);
> -	ctx->out_type = (enum decon_iftype)of_id->data;
> +	ctx->out_type = (unsigned int)of_id->data;
>  
> -	if (ctx->out_type == IFTYPE_HDMI)
> +	if (ctx->out_type & IFTYPE_HDMI)
>  		ctx->first_win = 1;
>  	else if (of_get_child_by_name(dev->of_node, "i80-if-timings"))
> -		ctx->out_type = IFTYPE_I80;
> +		ctx->out_type |= IFTYPE_I80;
>  
>  	for (i = 0; i < ARRAY_SIZE(decon_clks_name); i++) {
>  		struct clk *clk;
> @@ -674,7 +675,7 @@ static int exynos5433_decon_probe(struct platform_device *pdev)
>  	}
>  
>  	res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
> -			(ctx->out_type == IFTYPE_I80) ? "lcd_sys" : "vsync");
> +			(ctx->out_type & IFTYPE_I80) ? "lcd_sys" : "vsync");
>  	if (!res) {
>  		dev_err(dev, "cannot find IRQ resource\n");
>  		return -ENXIO;
> 

Re: [PATCH 3/3] drm/exynos: decon: clean up interface type

[Inki Dae]

 Hi Andrzej,

2016-04-05 20:07 GMT+09:00 Andrzej Hajda <a.hajda@samsung.com>:
> Hi Inki,
>
> On 04/05/2016 10:27 AM, Inki Dae wrote:
>> This patch cleans up interface type relevant codes.
>>
>> Trigger mode is determinded only by i80 mode, which isn't
>> related to Display types - HDMI or Display controller.
>> So this patch makes the trigger mode to be set only in case of
>> i80 mode.
>
> With this patch HDMI path image has serious synchronization problems.
> Exynos5433 documentation says that HDMI Timing Generator generates VSYNC
> signal which works as a hardware trigger for DECON-TV, so I guess
> trigger is required.

Right. One I missed. For DECON-TV, seems that HW trigger mode is mandatory.

>
> Btw, I think it could be good to remove suffixes I80_RGV from
> TRIGCON_HWTRIGEN_I80_RGB and TRIGCON_HWTRIGMASK_I80_RGB - they are
> misleading and differ from documentation.

Indeed. Looked strange when I wrote the suffixes.

>
> As far as I have tested I80 mode works OK on Decon5433.

Thanks for testing.
Inki Dae

>
> Regards
> Andrzej
>
>>
>> Signed-off-by: Inki Dae <inki.dae@samsung.com>
>> ---
>>  drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 53 ++++++++++++++-------------
>>  1 file changed, 27 insertions(+), 26 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>> index 5245bc5..5922e99 100644
>> --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>> +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>> @@ -28,6 +28,10 @@
>>  #define WINDOWS_NR   3
>>  #define MIN_FB_WIDTH_FOR_16WORD_BURST        128
>>
>> +#define IFTYPE_I80   (1 << 0)
>> +#define I80_HW_TRG   (1 << 1)
>> +#define IFTYPE_HDMI  (1 << 2)
>> +
>>  static const char * const decon_clks_name[] = {
>>       "pclk",
>>       "aclk_decon",
>> @@ -38,12 +42,6 @@ static const char * const decon_clks_name[] = {
>>       "sclk_decon_eclk",
>>  };
>>
>> -enum decon_iftype {
>> -     IFTYPE_RGB,
>> -     IFTYPE_I80,
>> -     IFTYPE_HDMI
>> -};
>> -
>>  enum decon_flag_bits {
>>       BIT_CLKS_ENABLED,
>>       BIT_IRQS_ENABLED,
>> @@ -61,7 +59,7 @@ struct decon_context {
>>       struct clk                      *clks[ARRAY_SIZE(decon_clks_name)];
>>       int                             pipe;
>>       unsigned long                   flags;
>> -     enum decon_iftype               out_type;
>> +     unsigned int                    out_type;
>>       int                             first_win;
>>  };
>>
>> @@ -95,7 +93,7 @@ static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
>>
>>       if (!test_and_set_bit(BIT_IRQS_ENABLED, &ctx->flags)) {
>>               val = VIDINTCON0_INTEN;
>> -             if (ctx->out_type == IFTYPE_I80)
>> +             if (ctx->out_type & IFTYPE_I80)
>>                       val |= VIDINTCON0_FRAMEDONE;
>>               else
>>                       val |= VIDINTCON0_INTFRMEN;
>> @@ -119,7 +117,7 @@ static void decon_disable_vblank(struct exynos_drm_crtc *crtc)
>>
>>  static void decon_setup_trigger(struct decon_context *ctx)
>>  {
>> -     u32 val = (ctx->out_type != IFTYPE_HDMI)
>> +     u32 val = !(ctx->out_type & I80_HW_TRG)
>>               ? TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
>>                 TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN
>>               : TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
>> @@ -136,7 +134,7 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>       if (test_bit(BIT_SUSPENDED, &ctx->flags))
>>               return;
>>
>> -     if (ctx->out_type == IFTYPE_HDMI) {
>> +     if (ctx->out_type & IFTYPE_HDMI) {
>>               m->crtc_hsync_start = m->crtc_hdisplay + 10;
>>               m->crtc_hsync_end = m->crtc_htotal - 92;
>>               m->crtc_vsync_start = m->crtc_vdisplay + 1;
>> @@ -151,17 +149,20 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>
>>       /* lcd on and use command if */
>>       val = VIDOUT_LCD_ON;
>> -     if (ctx->out_type == IFTYPE_I80)
>> +     if (ctx->out_type & IFTYPE_I80) {
>>               val |= VIDOUT_COMMAND_IF;
>> -     else
>> +             decon_setup_trigger(ctx);
>> +     } else {
>>               val |= VIDOUT_RGB_IF;
>> +     }
>> +
>>       writel(val, ctx->addr + DECON_VIDOUTCON0);
>>
>>       val = VIDTCON2_LINEVAL(m->vdisplay - 1) |
>>               VIDTCON2_HOZVAL(m->hdisplay - 1);
>>       writel(val, ctx->addr + DECON_VIDTCON2);
>>
>> -     if (ctx->out_type != IFTYPE_I80) {
>> +     if (!(ctx->out_type & IFTYPE_I80)) {
>>               val = VIDTCON00_VBPD_F(
>>                               m->crtc_vtotal - m->crtc_vsync_end - 1) |
>>                       VIDTCON00_VFPD_F(
>> @@ -183,8 +184,6 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>               writel(val, ctx->addr + DECON_VIDTCON11);
>>       }
>>
>> -     decon_setup_trigger(ctx);
>> -
>>       /* enable output and display signal */
>>       decon_set_bits(ctx, DECON_VIDCON0, VIDCON0_ENVID | VIDCON0_ENVID_F, ~0);
>>  }
>> @@ -300,7 +299,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
>>       val = dma_addr + pitch * state->src.h;
>>       writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));
>>
>> -     if (ctx->out_type != IFTYPE_HDMI)
>> +     if (!(ctx->out_type & IFTYPE_HDMI))
>>               val = BIT_VAL(pitch - state->crtc.w * bpp, 27, 14)
>>                       | BIT_VAL(state->crtc.w * bpp, 13, 0);
>>       else
>> @@ -348,7 +347,7 @@ static void decon_atomic_flush(struct exynos_drm_crtc *crtc)
>>       for (i = ctx->first_win; i < WINDOWS_NR; i++)
>>               decon_shadow_protect_win(ctx, i, false);
>>
>> -     if (ctx->out_type == IFTYPE_I80)
>> +     if (ctx->out_type & IFTYPE_I80)
>>               set_bit(BIT_WIN_UPDATED, &ctx->flags);
>>  }
>>
>> @@ -374,7 +373,7 @@ static void decon_swreset(struct decon_context *ctx)
>>
>>       WARN(tries == 0, "failed to software reset DECON\n");
>>
>> -     if (ctx->out_type != IFTYPE_HDMI)
>> +     if (!(ctx->out_type & IFTYPE_HDMI))
>>               return;
>>
>>       writel(VIDCON0_CLKVALUP | VIDCON0_VLCKFREE, ctx->addr + DECON_VIDCON0);
>> @@ -383,7 +382,9 @@ static void decon_swreset(struct decon_context *ctx)
>>       writel(VIDCON1_VCLK_RUN_VDEN_DISABLE, ctx->addr + DECON_VIDCON1);
>>       writel(CRCCTRL_CRCEN | CRCCTRL_CRCSTART_F | CRCCTRL_CRCCLKEN,
>>              ctx->addr + DECON_CRCCTRL);
>> -     decon_setup_trigger(ctx);
>> +
>> +     if (ctx->out_type & IFTYPE_I80)
>> +             decon_setup_trigger(ctx);
>>  }
>>
>>  static void decon_enable(struct exynos_drm_crtc *crtc)
>> @@ -509,7 +510,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
>>       }
>>
>>       exynos_plane = &ctx->planes[ctx->first_win];
>> -     out_type = (ctx->out_type == IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI
>> +     out_type = (ctx->out_type & IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI
>>                                                 : EXYNOS_DISPLAY_TYPE_LCD;
>>       ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
>>                                       ctx->pipe, out_type,
>> @@ -617,11 +618,11 @@ static const struct dev_pm_ops exynos5433_decon_pm_ops = {
>>  static const struct of_device_id exynos5433_decon_driver_dt_match[] = {
>>       {
>>               .compatible = "samsung,exynos5433-decon",
>> -             .data = (void *)IFTYPE_RGB
>> +             .data = (void *)I80_HW_TRG
>>       },
>>       {
>>               .compatible = "samsung,exynos5433-decon-tv",
>> -             .data = (void *)IFTYPE_HDMI
>> +             .data = (void *)(I80_HW_TRG | IFTYPE_HDMI)
>>       },
>>       {},
>>  };
>> @@ -644,12 +645,12 @@ static int exynos5433_decon_probe(struct platform_device *pdev)
>>       ctx->dev = dev;
>>
>>       of_id = of_match_device(exynos5433_decon_driver_dt_match, &pdev->dev);
>> -     ctx->out_type = (enum decon_iftype)of_id->data;
>> +     ctx->out_type = (unsigned int)of_id->data;
>>
>> -     if (ctx->out_type == IFTYPE_HDMI)
>> +     if (ctx->out_type & IFTYPE_HDMI)
>>               ctx->first_win = 1;
>>       else if (of_get_child_by_name(dev->of_node, "i80-if-timings"))
>> -             ctx->out_type = IFTYPE_I80;
>> +             ctx->out_type |= IFTYPE_I80;
>>
>>       for (i = 0; i < ARRAY_SIZE(decon_clks_name); i++) {
>>               struct clk *clk;
>> @@ -674,7 +675,7 @@ static int exynos5433_decon_probe(struct platform_device *pdev)
>>       }
>>
>>       res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
>> -                     (ctx->out_type == IFTYPE_I80) ? "lcd_sys" : "vsync");
>> +                     (ctx->out_type & IFTYPE_I80) ? "lcd_sys" : "vsync");
>>       if (!res) {
>>               dev_err(dev, "cannot find IRQ resource\n");
>>               return -ENXIO;
>>
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
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Re: [PATCH 3/3] drm/exynos: decon: clean up interface type

[Inki Dae]

Hi Andrzej,

2016년 04월 05일 21:52에 Inki Dae 이(가) 쓴 글:
>  Hi Andrzej,
> 
> 2016-04-05 20:07 GMT+09:00 Andrzej Hajda <a.hajda@samsung.com>:
>> Hi Inki,
>>
>> On 04/05/2016 10:27 AM, Inki Dae wrote:
>>> This patch cleans up interface type relevant codes.
>>>
>>> Trigger mode is determinded only by i80 mode, which isn't
>>> related to Display types - HDMI or Display controller.
>>> So this patch makes the trigger mode to be set only in case of
>>> i80 mode.
>>
>> With this patch HDMI path image has serious synchronization problems.
>> Exynos5433 documentation says that HDMI Timing Generator generates VSYNC
>> signal which works as a hardware trigger for DECON-TV, so I guess
>> trigger is required.
> 
> Right. One I missed. For DECON-TV, seems that HW trigger mode is mandatory.

Looks considered already. for DECON-TV, I80_HW_TRG flag is used mandatorily,
	.compatible = "samsung,exynos5433-decon-tv",
	.data = (void *)(I80_HW_TRG | IFTYPE_HDMI)

>>
>> Btw, I think it could be good to remove suffixes I80_RGV from
>> TRIGCON_HWTRIGEN_I80_RGB and TRIGCON_HWTRIGMASK_I80_RGB - they are
>> misleading and differ from documentation.
> 
> Indeed. Looked strange when I wrote the suffixes.

will send another cleanup patch.

Thanks,
Inki Dae

> 
>>
>> As far as I have tested I80 mode works OK on Decon5433.
> 
> Thanks for testing.
> Inki Dae
> 
>>
>> Regards
>> Andrzej
>>
>>>
>>> Signed-off-by: Inki Dae <inki.dae@samsung.com>
>>> ---
>>>  drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 53 ++++++++++++++-------------
>>>  1 file changed, 27 insertions(+), 26 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>>> index 5245bc5..5922e99 100644
>>> --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>>> +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>>> @@ -28,6 +28,10 @@
>>>  #define WINDOWS_NR   3
>>>  #define MIN_FB_WIDTH_FOR_16WORD_BURST        128
>>>
>>> +#define IFTYPE_I80   (1 << 0)
>>> +#define I80_HW_TRG   (1 << 1)
>>> +#define IFTYPE_HDMI  (1 << 2)
>>> +
>>>  static const char * const decon_clks_name[] = {
>>>       "pclk",
>>>       "aclk_decon",
>>> @@ -38,12 +42,6 @@ static const char * const decon_clks_name[] = {
>>>       "sclk_decon_eclk",
>>>  };
>>>
>>> -enum decon_iftype {
>>> -     IFTYPE_RGB,
>>> -     IFTYPE_I80,
>>> -     IFTYPE_HDMI
>>> -};
>>> -
>>>  enum decon_flag_bits {
>>>       BIT_CLKS_ENABLED,
>>>       BIT_IRQS_ENABLED,
>>> @@ -61,7 +59,7 @@ struct decon_context {
>>>       struct clk                      *clks[ARRAY_SIZE(decon_clks_name)];
>>>       int                             pipe;
>>>       unsigned long                   flags;
>>> -     enum decon_iftype               out_type;
>>> +     unsigned int                    out_type;
>>>       int                             first_win;
>>>  };
>>>
>>> @@ -95,7 +93,7 @@ static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
>>>
>>>       if (!test_and_set_bit(BIT_IRQS_ENABLED, &ctx->flags)) {
>>>               val = VIDINTCON0_INTEN;
>>> -             if (ctx->out_type == IFTYPE_I80)
>>> +             if (ctx->out_type & IFTYPE_I80)
>>>                       val |= VIDINTCON0_FRAMEDONE;
>>>               else
>>>                       val |= VIDINTCON0_INTFRMEN;
>>> @@ -119,7 +117,7 @@ static void decon_disable_vblank(struct exynos_drm_crtc *crtc)
>>>
>>>  static void decon_setup_trigger(struct decon_context *ctx)
>>>  {
>>> -     u32 val = (ctx->out_type != IFTYPE_HDMI)
>>> +     u32 val = !(ctx->out_type & I80_HW_TRG)
>>>               ? TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
>>>                 TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN
>>>               : TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
>>> @@ -136,7 +134,7 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>>       if (test_bit(BIT_SUSPENDED, &ctx->flags))
>>>               return;
>>>
>>> -     if (ctx->out_type == IFTYPE_HDMI) {
>>> +     if (ctx->out_type & IFTYPE_HDMI) {
>>>               m->crtc_hsync_start = m->crtc_hdisplay + 10;
>>>               m->crtc_hsync_end = m->crtc_htotal - 92;
>>>               m->crtc_vsync_start = m->crtc_vdisplay + 1;
>>> @@ -151,17 +149,20 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>>
>>>       /* lcd on and use command if */
>>>       val = VIDOUT_LCD_ON;
>>> -     if (ctx->out_type == IFTYPE_I80)
>>> +     if (ctx->out_type & IFTYPE_I80) {
>>>               val |= VIDOUT_COMMAND_IF;
>>> -     else
>>> +             decon_setup_trigger(ctx);
>>> +     } else {
>>>               val |= VIDOUT_RGB_IF;
>>> +     }
>>> +
>>>       writel(val, ctx->addr + DECON_VIDOUTCON0);
>>>
>>>       val = VIDTCON2_LINEVAL(m->vdisplay - 1) |
>>>               VIDTCON2_HOZVAL(m->hdisplay - 1);
>>>       writel(val, ctx->addr + DECON_VIDTCON2);
>>>
>>> -     if (ctx->out_type != IFTYPE_I80) {
>>> +     if (!(ctx->out_type & IFTYPE_I80)) {
>>>               val = VIDTCON00_VBPD_F(
>>>                               m->crtc_vtotal - m->crtc_vsync_end - 1) |
>>>                       VIDTCON00_VFPD_F(
>>> @@ -183,8 +184,6 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>>               writel(val, ctx->addr + DECON_VIDTCON11);
>>>       }
>>>
>>> -     decon_setup_trigger(ctx);
>>> -
>>>       /* enable output and display signal */
>>>       decon_set_bits(ctx, DECON_VIDCON0, VIDCON0_ENVID | VIDCON0_ENVID_F, ~0);
>>>  }
>>> @@ -300,7 +299,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
>>>       val = dma_addr + pitch * state->src.h;
>>>       writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));
>>>
>>> -     if (ctx->out_type != IFTYPE_HDMI)
>>> +     if (!(ctx->out_type & IFTYPE_HDMI))
>>>               val = BIT_VAL(pitch - state->crtc.w * bpp, 27, 14)
>>>                       | BIT_VAL(state->crtc.w * bpp, 13, 0);
>>>       else
>>> @@ -348,7 +347,7 @@ static void decon_atomic_flush(struct exynos_drm_crtc *crtc)
>>>       for (i = ctx->first_win; i < WINDOWS_NR; i++)
>>>               decon_shadow_protect_win(ctx, i, false);
>>>
>>> -     if (ctx->out_type == IFTYPE_I80)
>>> +     if (ctx->out_type & IFTYPE_I80)
>>>               set_bit(BIT_WIN_UPDATED, &ctx->flags);
>>>  }
>>>
>>> @@ -374,7 +373,7 @@ static void decon_swreset(struct decon_context *ctx)
>>>
>>>       WARN(tries == 0, "failed to software reset DECON\n");
>>>
>>> -     if (ctx->out_type != IFTYPE_HDMI)
>>> +     if (!(ctx->out_type & IFTYPE_HDMI))
>>>               return;
>>>
>>>       writel(VIDCON0_CLKVALUP | VIDCON0_VLCKFREE, ctx->addr + DECON_VIDCON0);
>>> @@ -383,7 +382,9 @@ static void decon_swreset(struct decon_context *ctx)
>>>       writel(VIDCON1_VCLK_RUN_VDEN_DISABLE, ctx->addr + DECON_VIDCON1);
>>>       writel(CRCCTRL_CRCEN | CRCCTRL_CRCSTART_F | CRCCTRL_CRCCLKEN,
>>>              ctx->addr + DECON_CRCCTRL);
>>> -     decon_setup_trigger(ctx);
>>> +
>>> +     if (ctx->out_type & IFTYPE_I80)
>>> +             decon_setup_trigger(ctx);
>>>  }
>>>
>>>  static void decon_enable(struct exynos_drm_crtc *crtc)
>>> @@ -509,7 +510,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
>>>       }
>>>
>>>       exynos_plane = &ctx->planes[ctx->first_win];
>>> -     out_type = (ctx->out_type == IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI
>>> +     out_type = (ctx->out_type & IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI
>>>                                                 : EXYNOS_DISPLAY_TYPE_LCD;
>>>       ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
>>>                                       ctx->pipe, out_type,
>>> @@ -617,11 +618,11 @@ static const struct dev_pm_ops exynos5433_decon_pm_ops = {
>>>  static const struct of_device_id exynos5433_decon_driver_dt_match[] = {
>>>       {
>>>               .compatible = "samsung,exynos5433-decon",
>>> -             .data = (void *)IFTYPE_RGB
>>> +             .data = (void *)I80_HW_TRG
>>>       },
>>>       {
>>>               .compatible = "samsung,exynos5433-decon-tv",
>>> -             .data = (void *)IFTYPE_HDMI
>>> +             .data = (void *)(I80_HW_TRG | IFTYPE_HDMI)
>>>       },
>>>       {},
>>>  };
>>> @@ -644,12 +645,12 @@ static int exynos5433_decon_probe(struct platform_device *pdev)
>>>       ctx->dev = dev;
>>>
>>>       of_id = of_match_device(exynos5433_decon_driver_dt_match, &pdev->dev);
>>> -     ctx->out_type = (enum decon_iftype)of_id->data;
>>> +     ctx->out_type = (unsigned int)of_id->data;
>>>
>>> -     if (ctx->out_type == IFTYPE_HDMI)
>>> +     if (ctx->out_type & IFTYPE_HDMI)
>>>               ctx->first_win = 1;
>>>       else if (of_get_child_by_name(dev->of_node, "i80-if-timings"))
>>> -             ctx->out_type = IFTYPE_I80;
>>> +             ctx->out_type |= IFTYPE_I80;
>>>
>>>       for (i = 0; i < ARRAY_SIZE(decon_clks_name); i++) {
>>>               struct clk *clk;
>>> @@ -674,7 +675,7 @@ static int exynos5433_decon_probe(struct platform_device *pdev)
>>>       }
>>>
>>>       res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
>>> -                     (ctx->out_type == IFTYPE_I80) ? "lcd_sys" : "vsync");
>>> +                     (ctx->out_type & IFTYPE_I80) ? "lcd_sys" : "vsync");
>>>       if (!res) {
>>>               dev_err(dev, "cannot find IRQ resource\n");
>>>               return -ENXIO;
>>>
>>
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>> https://lists.freedesktop.org/mailman/listinfo/dri-devel
> --
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> 
> 

Re: [PATCH 3/3] drm/exynos: decon: clean up interface type

[Andrzej Hajda]

Hi Inki,

On 04/12/2016 02:40 AM, Inki Dae wrote:
> Hi Andrzej,
>
> 2016년 04월 05일 21:52에 Inki Dae 이(가) 쓴 글:
>>  Hi Andrzej,
>>
>> 2016-04-05 20:07 GMT+09:00 Andrzej Hajda <a.hajda@samsung.com>:
>>> Hi Inki,
>>>
>>> On 04/05/2016 10:27 AM, Inki Dae wrote:
>>>> This patch cleans up interface type relevant codes.
>>>>
>>>> Trigger mode is determinded only by i80 mode, which isn't
>>>> related to Display types - HDMI or Display controller.
>>>> So this patch makes the trigger mode to be set only in case of
>>>> i80 mode.
>>> With this patch HDMI path image has serious synchronization problems.
>>> Exynos5433 documentation says that HDMI Timing Generator generates VSYNC
>>> signal which works as a hardware trigger for DECON-TV, so I guess
>>> trigger is required.
>> Right. One I missed. For DECON-TV, seems that HW trigger mode is mandatory.
> Looks considered already. for DECON-TV, I80_HW_TRG flag is used mandatorily,
> 	.compatible = "samsung,exynos5433-decon-tv",
> 	.data = (void *)(I80_HW_TRG | IFTYPE_HDMI)
Here it is OK, but there are other changes, see below for more details.
>
>>> Btw, I think it could be good to remove suffixes I80_RGV from
>>> TRIGCON_HWTRIGEN_I80_RGB and TRIGCON_HWTRIGMASK_I80_RGB - they are
>>> misleading and differ from documentation.
>> Indeed. Looked strange when I wrote the suffixes.
> will send another cleanup patch.
>
> Thanks,
> Inki Dae
>
>>> As far as I have tested I80 mode works OK on Decon5433.
>> Thanks for testing.
>> Inki Dae
>>
>>> Regards
>>> Andrzej
>>>
>>>> Signed-off-by: Inki Dae <inki.dae@samsung.com>
>>>> ---
>>>>  drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 53 ++++++++++++++-------------
>>>>  1 file changed, 27 insertions(+), 26 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>>>> index 5245bc5..5922e99 100644
>>>> --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>>>> +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>>>> @@ -28,6 +28,10 @@
>>>>  #define WINDOWS_NR   3
>>>>  #define MIN_FB_WIDTH_FOR_16WORD_BURST        128
>>>>
>>>> +#define IFTYPE_I80   (1 << 0)
>>>> +#define I80_HW_TRG   (1 << 1)
>>>> +#define IFTYPE_HDMI  (1 << 2)
>>>> +
>>>>  static const char * const decon_clks_name[] = {
>>>>       "pclk",
>>>>       "aclk_decon",
>>>> @@ -38,12 +42,6 @@ static const char * const decon_clks_name[] = {
>>>>       "sclk_decon_eclk",
>>>>  };
>>>>
>>>> -enum decon_iftype {
>>>> -     IFTYPE_RGB,
>>>> -     IFTYPE_I80,
>>>> -     IFTYPE_HDMI
>>>> -};
>>>> -
>>>>  enum decon_flag_bits {
>>>>       BIT_CLKS_ENABLED,
>>>>       BIT_IRQS_ENABLED,
>>>> @@ -61,7 +59,7 @@ struct decon_context {
>>>>       struct clk                      *clks[ARRAY_SIZE(decon_clks_name)];
>>>>       int                             pipe;
>>>>       unsigned long                   flags;
>>>> -     enum decon_iftype               out_type;
>>>> +     unsigned int                    out_type;
>>>>       int                             first_win;
>>>>  };
>>>>
>>>> @@ -95,7 +93,7 @@ static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
>>>>
>>>>       if (!test_and_set_bit(BIT_IRQS_ENABLED, &ctx->flags)) {
>>>>               val = VIDINTCON0_INTEN;
>>>> -             if (ctx->out_type == IFTYPE_I80)
>>>> +             if (ctx->out_type & IFTYPE_I80)
>>>>                       val |= VIDINTCON0_FRAMEDONE;
>>>>               else
>>>>                       val |= VIDINTCON0_INTFRMEN;
>>>> @@ -119,7 +117,7 @@ static void decon_disable_vblank(struct exynos_drm_crtc *crtc)
>>>>
>>>>  static void decon_setup_trigger(struct decon_context *ctx)
>>>>  {
>>>> -     u32 val = (ctx->out_type != IFTYPE_HDMI)
>>>> +     u32 val = !(ctx->out_type & I80_HW_TRG)
>>>>               ? TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
>>>>                 TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN
>>>>               : TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
>>>> @@ -136,7 +134,7 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>>>       if (test_bit(BIT_SUSPENDED, &ctx->flags))
>>>>               return;
>>>>
>>>> -     if (ctx->out_type == IFTYPE_HDMI) {
>>>> +     if (ctx->out_type & IFTYPE_HDMI) {
>>>>               m->crtc_hsync_start = m->crtc_hdisplay + 10;
>>>>               m->crtc_hsync_end = m->crtc_htotal - 92;
>>>>               m->crtc_vsync_start = m->crtc_vdisplay + 1;
>>>> @@ -151,17 +149,20 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>>>
>>>>       /* lcd on and use command if */
>>>>       val = VIDOUT_LCD_ON;
>>>> -     if (ctx->out_type == IFTYPE_I80)
>>>> +     if (ctx->out_type & IFTYPE_I80) {
>>>>               val |= VIDOUT_COMMAND_IF;
>>>> -     else
>>>> +             decon_setup_trigger(ctx);
>>>> +     } else {
>>>>               val |= VIDOUT_RGB_IF;
>>>> +     }
>>>> +
>>>>       writel(val, ctx->addr + DECON_VIDOUTCON0);
>>>>
>>>>       val = VIDTCON2_LINEVAL(m->vdisplay - 1) |
>>>>               VIDTCON2_HOZVAL(m->hdisplay - 1);
>>>>       writel(val, ctx->addr + DECON_VIDTCON2);
>>>>
>>>> -     if (ctx->out_type != IFTYPE_I80) {
>>>> +     if (!(ctx->out_type & IFTYPE_I80)) {
>>>>               val = VIDTCON00_VBPD_F(
>>>>                               m->crtc_vtotal - m->crtc_vsync_end - 1) |
>>>>                       VIDTCON00_VFPD_F(
>>>> @@ -183,8 +184,6 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>>>               writel(val, ctx->addr + DECON_VIDTCON11);
>>>>       }
>>>>
>>>> -     decon_setup_trigger(ctx);
>>>> -
>>>>       /* enable output and display signal */
>>>>       decon_set_bits(ctx, DECON_VIDCON0, VIDCON0_ENVID | VIDCON0_ENVID_F, ~0);
>>>>  }
>>>> @@ -300,7 +299,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
>>>>       val = dma_addr + pitch * state->src.h;
>>>>       writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));
>>>>
>>>> -     if (ctx->out_type != IFTYPE_HDMI)
>>>> +     if (!(ctx->out_type & IFTYPE_HDMI))
>>>>               val = BIT_VAL(pitch - state->crtc.w * bpp, 27, 14)
>>>>                       | BIT_VAL(state->crtc.w * bpp, 13, 0);
>>>>       else
>>>> @@ -348,7 +347,7 @@ static void decon_atomic_flush(struct exynos_drm_crtc *crtc)
>>>>       for (i = ctx->first_win; i < WINDOWS_NR; i++)
>>>>               decon_shadow_protect_win(ctx, i, false);
>>>>
>>>> -     if (ctx->out_type == IFTYPE_I80)
>>>> +     if (ctx->out_type & IFTYPE_I80)
>>>>               set_bit(BIT_WIN_UPDATED, &ctx->flags);
>>>>  }
>>>>
>>>> @@ -374,7 +373,7 @@ static void decon_swreset(struct decon_context *ctx)
>>>>
>>>>       WARN(tries == 0, "failed to software reset DECON\n");
>>>>
>>>> -     if (ctx->out_type != IFTYPE_HDMI)
>>>> +     if (!(ctx->out_type & IFTYPE_HDMI))
>>>>               return;
>>>>
>>>>       writel(VIDCON0_CLKVALUP | VIDCON0_VLCKFREE, ctx->addr + DECON_VIDCON0);
>>>> @@ -383,7 +382,9 @@ static void decon_swreset(struct decon_context *ctx)
>>>>       writel(VIDCON1_VCLK_RUN_VDEN_DISABLE, ctx->addr + DECON_VIDCON1);
>>>>       writel(CRCCTRL_CRCEN | CRCCTRL_CRCSTART_F | CRCCTRL_CRCCLKEN,
>>>>              ctx->addr + DECON_CRCCTRL);
>>>> -     decon_setup_trigger(ctx);
>>>> +
>>>> +     if (ctx->out_type & IFTYPE_I80)
>>>> +             decon_setup_trigger(ctx);

This one prevents setup trigger for HDMI.

>>>>  }
>>>>
>>>>  static void decon_enable(struct exynos_drm_crtc *crtc)
>>>> @@ -509,7 +510,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
>>>>       }
>>>>
>>>>       exynos_plane = &ctx->planes[ctx->first_win];
>>>> -     out_type = (ctx->out_type == IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI
>>>> +     out_type = (ctx->out_type & IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI
>>>>                                                 : EXYNOS_DISPLAY_TYPE_LCD;
>>>>       ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
>>>>                                       ctx->pipe, out_type,
>>>> @@ -617,11 +618,11 @@ static const struct dev_pm_ops exynos5433_decon_pm_ops = {
>>>>  static const struct of_device_id exynos5433_decon_driver_dt_match[] = {
>>>>       {
>>>>               .compatible = "samsung,exynos5433-decon",
>>>> -             .data = (void *)IFTYPE_RGB
>>>> +             .data = (void *)I80_HW_TRG
>>>>       },
>>>>       {
>>>>               .compatible = "samsung,exynos5433-decon-tv",
>>>> -             .data = (void *)IFTYPE_HDMI
>>>> +             .data = (void *)(I80_HW_TRG | IFTYPE_HDMI)
>>>>       },
>>>>       {},
>>>>  };
>>>> @@ -644,12 +645,12 @@ static int exynos5433_decon_probe(struct platform_device *pdev)
>>>>       ctx->dev = dev;
>>>>
>>>>       of_id = of_match_device(exynos5433_decon_driver_dt_match, &pdev->dev);
>>>> -     ctx->out_type = (enum decon_iftype)of_id->data;
>>>> +     ctx->out_type = (unsigned int)of_id->data;
And here gcc complains about conversion to shorter type.
    ctx->out_type = (unsigned long)of_id->data;
will silence it.

Regards
Andrzej

>>>>
>>>> -     if (ctx->out_type == IFTYPE_HDMI)
>>>> +     if (ctx->out_type & IFTYPE_HDMI)
>>>>               ctx->first_win = 1;
>>>>       else if (of_get_child_by_name(dev->of_node, "i80-if-timings"))
>>>> -             ctx->out_type = IFTYPE_I80;
>>>> +             ctx->out_type |= IFTYPE_I80;
>>>>
>>>>       for (i = 0; i < ARRAY_SIZE(decon_clks_name); i++) {
>>>>               struct clk *clk;
>>>> @@ -674,7 +675,7 @@ static int exynos5433_decon_probe(struct platform_device *pdev)
>>>>       }
>>>>
>>>>       res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
>>>> -                     (ctx->out_type == IFTYPE_I80) ? "lcd_sys" : "vsync");
>>>> +                     (ctx->out_type & IFTYPE_I80) ? "lcd_sys" : "vsync");
>>>>       if (!res) {
>>>>               dev_err(dev, "cannot find IRQ resource\n");
>>>>               return -ENXIO;
>>>>
>>> _______________________________________________
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>>> dri-devel@lists.freedesktop.org
>>> https://lists.freedesktop.org/mailman/listinfo/dri-devel
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
>> the body of a message to majordomo@vger.kernel.org
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>>
>>

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Re: [PATCH 3/3] drm/exynos: decon: clean up interface type

[Inki Dae]

2016년 04월 12일 14:55에 Andrzej Hajda 이(가) 쓴 글:
> Hi Inki,
> 
> On 04/12/2016 02:40 AM, Inki Dae wrote:
>> Hi Andrzej,
>>
>> 2016년 04월 05일 21:52에 Inki Dae 이(가) 쓴 글:
>>>  Hi Andrzej,
>>>
>>> 2016-04-05 20:07 GMT+09:00 Andrzej Hajda <a.hajda@samsung.com>:
>>>> Hi Inki,
>>>>
>>>> On 04/05/2016 10:27 AM, Inki Dae wrote:
>>>>> This patch cleans up interface type relevant codes.
>>>>>
>>>>> Trigger mode is determinded only by i80 mode, which isn't
>>>>> related to Display types - HDMI or Display controller.
>>>>> So this patch makes the trigger mode to be set only in case of
>>>>> i80 mode.
>>>> With this patch HDMI path image has serious synchronization problems.
>>>> Exynos5433 documentation says that HDMI Timing Generator generates VSYNC
>>>> signal which works as a hardware trigger for DECON-TV, so I guess
>>>> trigger is required.
>>> Right. One I missed. For DECON-TV, seems that HW trigger mode is mandatory.
>> Looks considered already. for DECON-TV, I80_HW_TRG flag is used mandatorily,
>> 	.compatible = "samsung,exynos5433-decon-tv",
>> 	.data = (void *)(I80_HW_TRG | IFTYPE_HDMI)
> Here it is OK, but there are other changes, see below for more details.
>>
>>>> Btw, I think it could be good to remove suffixes I80_RGV from
>>>> TRIGCON_HWTRIGEN_I80_RGB and TRIGCON_HWTRIGMASK_I80_RGB - they are
>>>> misleading and differ from documentation.
>>> Indeed. Looked strange when I wrote the suffixes.
>> will send another cleanup patch.
>>
>> Thanks,
>> Inki Dae
>>
>>>> As far as I have tested I80 mode works OK on Decon5433.
>>> Thanks for testing.
>>> Inki Dae
>>>
>>>> Regards
>>>> Andrzej
>>>>
>>>>> Signed-off-by: Inki Dae <inki.dae@samsung.com>
>>>>> ---
>>>>>  drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 53 ++++++++++++++-------------
>>>>>  1 file changed, 27 insertions(+), 26 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>>>>> index 5245bc5..5922e99 100644
>>>>> --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>>>>> +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>>>>> @@ -28,6 +28,10 @@
>>>>>  #define WINDOWS_NR   3
>>>>>  #define MIN_FB_WIDTH_FOR_16WORD_BURST        128
>>>>>
>>>>> +#define IFTYPE_I80   (1 << 0)
>>>>> +#define I80_HW_TRG   (1 << 1)
>>>>> +#define IFTYPE_HDMI  (1 << 2)
>>>>> +
>>>>>  static const char * const decon_clks_name[] = {
>>>>>       "pclk",
>>>>>       "aclk_decon",
>>>>> @@ -38,12 +42,6 @@ static const char * const decon_clks_name[] = {
>>>>>       "sclk_decon_eclk",
>>>>>  };
>>>>>
>>>>> -enum decon_iftype {
>>>>> -     IFTYPE_RGB,
>>>>> -     IFTYPE_I80,
>>>>> -     IFTYPE_HDMI
>>>>> -};
>>>>> -
>>>>>  enum decon_flag_bits {
>>>>>       BIT_CLKS_ENABLED,
>>>>>       BIT_IRQS_ENABLED,
>>>>> @@ -61,7 +59,7 @@ struct decon_context {
>>>>>       struct clk                      *clks[ARRAY_SIZE(decon_clks_name)];
>>>>>       int                             pipe;
>>>>>       unsigned long                   flags;
>>>>> -     enum decon_iftype               out_type;
>>>>> +     unsigned int                    out_type;
>>>>>       int                             first_win;
>>>>>  };
>>>>>
>>>>> @@ -95,7 +93,7 @@ static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
>>>>>
>>>>>       if (!test_and_set_bit(BIT_IRQS_ENABLED, &ctx->flags)) {
>>>>>               val = VIDINTCON0_INTEN;
>>>>> -             if (ctx->out_type == IFTYPE_I80)
>>>>> +             if (ctx->out_type & IFTYPE_I80)
>>>>>                       val |= VIDINTCON0_FRAMEDONE;
>>>>>               else
>>>>>                       val |= VIDINTCON0_INTFRMEN;
>>>>> @@ -119,7 +117,7 @@ static void decon_disable_vblank(struct exynos_drm_crtc *crtc)
>>>>>
>>>>>  static void decon_setup_trigger(struct decon_context *ctx)
>>>>>  {
>>>>> -     u32 val = (ctx->out_type != IFTYPE_HDMI)
>>>>> +     u32 val = !(ctx->out_type & I80_HW_TRG)
>>>>>               ? TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
>>>>>                 TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN
>>>>>               : TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
>>>>> @@ -136,7 +134,7 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>>>>       if (test_bit(BIT_SUSPENDED, &ctx->flags))
>>>>>               return;
>>>>>
>>>>> -     if (ctx->out_type == IFTYPE_HDMI) {
>>>>> +     if (ctx->out_type & IFTYPE_HDMI) {
>>>>>               m->crtc_hsync_start = m->crtc_hdisplay + 10;
>>>>>               m->crtc_hsync_end = m->crtc_htotal - 92;
>>>>>               m->crtc_vsync_start = m->crtc_vdisplay + 1;
>>>>> @@ -151,17 +149,20 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>>>>
>>>>>       /* lcd on and use command if */
>>>>>       val = VIDOUT_LCD_ON;
>>>>> -     if (ctx->out_type == IFTYPE_I80)
>>>>> +     if (ctx->out_type & IFTYPE_I80) {
>>>>>               val |= VIDOUT_COMMAND_IF;
>>>>> -     else
>>>>> +             decon_setup_trigger(ctx);
>>>>> +     } else {
>>>>>               val |= VIDOUT_RGB_IF;
>>>>> +     }
>>>>> +
>>>>>       writel(val, ctx->addr + DECON_VIDOUTCON0);
>>>>>
>>>>>       val = VIDTCON2_LINEVAL(m->vdisplay - 1) |
>>>>>               VIDTCON2_HOZVAL(m->hdisplay - 1);
>>>>>       writel(val, ctx->addr + DECON_VIDTCON2);
>>>>>
>>>>> -     if (ctx->out_type != IFTYPE_I80) {
>>>>> +     if (!(ctx->out_type & IFTYPE_I80)) {
>>>>>               val = VIDTCON00_VBPD_F(
>>>>>                               m->crtc_vtotal - m->crtc_vsync_end - 1) |
>>>>>                       VIDTCON00_VFPD_F(
>>>>> @@ -183,8 +184,6 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>>>>               writel(val, ctx->addr + DECON_VIDTCON11);
>>>>>       }
>>>>>
>>>>> -     decon_setup_trigger(ctx);
>>>>> -
>>>>>       /* enable output and display signal */
>>>>>       decon_set_bits(ctx, DECON_VIDCON0, VIDCON0_ENVID | VIDCON0_ENVID_F, ~0);
>>>>>  }
>>>>> @@ -300,7 +299,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
>>>>>       val = dma_addr + pitch * state->src.h;
>>>>>       writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));
>>>>>
>>>>> -     if (ctx->out_type != IFTYPE_HDMI)
>>>>> +     if (!(ctx->out_type & IFTYPE_HDMI))
>>>>>               val = BIT_VAL(pitch - state->crtc.w * bpp, 27, 14)
>>>>>                       | BIT_VAL(state->crtc.w * bpp, 13, 0);
>>>>>       else
>>>>> @@ -348,7 +347,7 @@ static void decon_atomic_flush(struct exynos_drm_crtc *crtc)
>>>>>       for (i = ctx->first_win; i < WINDOWS_NR; i++)
>>>>>               decon_shadow_protect_win(ctx, i, false);
>>>>>
>>>>> -     if (ctx->out_type == IFTYPE_I80)
>>>>> +     if (ctx->out_type & IFTYPE_I80)
>>>>>               set_bit(BIT_WIN_UPDATED, &ctx->flags);
>>>>>  }
>>>>>
>>>>> @@ -374,7 +373,7 @@ static void decon_swreset(struct decon_context *ctx)
>>>>>
>>>>>       WARN(tries == 0, "failed to software reset DECON\n");
>>>>>
>>>>> -     if (ctx->out_type != IFTYPE_HDMI)
>>>>> +     if (!(ctx->out_type & IFTYPE_HDMI))
>>>>>               return;
>>>>>
>>>>>       writel(VIDCON0_CLKVALUP | VIDCON0_VLCKFREE, ctx->addr + DECON_VIDCON0);
>>>>> @@ -383,7 +382,9 @@ static void decon_swreset(struct decon_context *ctx)
>>>>>       writel(VIDCON1_VCLK_RUN_VDEN_DISABLE, ctx->addr + DECON_VIDCON1);
>>>>>       writel(CRCCTRL_CRCEN | CRCCTRL_CRCSTART_F | CRCCTRL_CRCCLKEN,
>>>>>              ctx->addr + DECON_CRCCTRL);
>>>>> -     decon_setup_trigger(ctx);
>>>>> +
>>>>> +     if (ctx->out_type & IFTYPE_I80)
>>>>> +             decon_setup_trigger(ctx);
> 
> This one prevents setup trigger for HDMI.

Ah, right. one bug hided. HW Trigger setup is required for HDMI.

Thanks,
Inki Dae

> 
>>>>>  }
>>>>>
>>>>>  static void decon_enable(struct exynos_drm_crtc *crtc)
>>>>> @@ -509,7 +510,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
>>>>>       }
>>>>>
>>>>>       exynos_plane = &ctx->planes[ctx->first_win];
>>>>> -     out_type = (ctx->out_type == IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI
>>>>> +     out_type = (ctx->out_type & IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI
>>>>>                                                 : EXYNOS_DISPLAY_TYPE_LCD;
>>>>>       ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
>>>>>                                       ctx->pipe, out_type,
>>>>> @@ -617,11 +618,11 @@ static const struct dev_pm_ops exynos5433_decon_pm_ops = {
>>>>>  static const struct of_device_id exynos5433_decon_driver_dt_match[] = {
>>>>>       {
>>>>>               .compatible = "samsung,exynos5433-decon",
>>>>> -             .data = (void *)IFTYPE_RGB
>>>>> +             .data = (void *)I80_HW_TRG
>>>>>       },
>>>>>       {
>>>>>               .compatible = "samsung,exynos5433-decon-tv",
>>>>> -             .data = (void *)IFTYPE_HDMI
>>>>> +             .data = (void *)(I80_HW_TRG | IFTYPE_HDMI)
>>>>>       },
>>>>>       {},
>>>>>  };
>>>>> @@ -644,12 +645,12 @@ static int exynos5433_decon_probe(struct platform_device *pdev)
>>>>>       ctx->dev = dev;
>>>>>
>>>>>       of_id = of_match_device(exynos5433_decon_driver_dt_match, &pdev->dev);
>>>>> -     ctx->out_type = (enum decon_iftype)of_id->data;
>>>>> +     ctx->out_type = (unsigned int)of_id->data;
> And here gcc complains about conversion to shorter type.
>     ctx->out_type = (unsigned long)of_id->data;
> will silence it.
> 
> Regards
> Andrzej
> 
>>>>>
>>>>> -     if (ctx->out_type == IFTYPE_HDMI)
>>>>> +     if (ctx->out_type & IFTYPE_HDMI)
>>>>>               ctx->first_win = 1;
>>>>>       else if (of_get_child_by_name(dev->of_node, "i80-if-timings"))
>>>>> -             ctx->out_type = IFTYPE_I80;
>>>>> +             ctx->out_type |= IFTYPE_I80;
>>>>>
>>>>>       for (i = 0; i < ARRAY_SIZE(decon_clks_name); i++) {
>>>>>               struct clk *clk;
>>>>> @@ -674,7 +675,7 @@ static int exynos5433_decon_probe(struct platform_device *pdev)
>>>>>       }
>>>>>
>>>>>       res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
>>>>> -                     (ctx->out_type == IFTYPE_I80) ? "lcd_sys" : "vsync");
>>>>> +                     (ctx->out_type & IFTYPE_I80) ? "lcd_sys" : "vsync");
>>>>>       if (!res) {
>>>>>               dev_err(dev, "cannot find IRQ resource\n");
>>>>>               return -ENXIO;
>>>>>
>>>> _______________________________________________
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>>>> https://lists.freedesktop.org/mailman/listinfo/dri-devel
>>> --
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>>> the body of a message to majordomo@vger.kernel.org
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>>>
>>>
> 
> --
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> 
> 
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