From: Stephen Warren <swarren@wwwdotorg.org>
To: Laxman Dewangan <ldewangan@nvidia.com>
Cc: linus.walleij@linaro.org, gnurou@gmail.com,
thierry.reding@gmail.com, linux-gpio@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V2 3/3] gpio: tegra: Add support for gpio debounce
Date: Tue, 19 Apr 2016 10:36:58 -0600 [thread overview]
Message-ID: <57165EAA.7080304@wwwdotorg.org> (raw)
In-Reply-To: <57165AAE.8050108@nvidia.com>
On 04/19/2016 10:19 AM, Laxman Dewangan wrote:
>
> On Tuesday 19 April 2016 09:41 PM, Stephen Warren wrote:
>> On 04/19/2016 03:43 AM, Laxman Dewangan wrote:
>>> NVIDIA's Tegra210 support the HW debounce in the GPIO
>>> controller for all its GPIO pins.
>>>
>>> Add support for setting debounce timing by implementing the
>>> set_debounce callback of gpiochip.
>>
>>> diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
>>
>>> @@ -327,6 +360,9 @@ static int tegra_gpio_resume(struct device *dev)
>>> tegra_gpio_writel(bank->oe[p], GPIO_OE(gpio));
>>> tegra_gpio_writel(bank->int_lvl[p], GPIO_INT_LVL(gpio));
>>> tegra_gpio_writel(bank->int_enb[p], GPIO_INT_ENB(gpio));
>>> + tegra_gpio_writel(bank->dbc_cnt[p], GPIO_DBC_CNT(gpio));
>>> + tegra_gpio_writel(bank->dbc_enb[p],
>>> + GPIO_MSK_DBC_EN(gpio));
>>
>> Why not just write to the "regular" register rather than the mask
>> register here...
>
> There is no regular register for enabling debounce. Only masked register
> exist.
Sigh. Ignore that comment then:-)
next prev parent reply other threads:[~2016-04-19 16:37 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-19 9:43 [PATCH V2 1/3] gpio: tegra: Don't open code of_device_get_match_data() Laxman Dewangan
2016-04-19 9:43 ` Laxman Dewangan
2016-04-19 9:43 ` [PATCH V2 2/3] gpio: tegra: Remove the need of keeping device handle for gpio driver Laxman Dewangan
2016-04-19 9:43 ` Laxman Dewangan
2016-04-19 12:33 ` Thierry Reding
2016-04-19 12:43 ` Laxman Dewangan
2016-04-19 12:43 ` Laxman Dewangan
[not found] ` <571627F5.7000307-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-19 16:04 ` Stephen Warren
2016-04-19 16:04 ` Stephen Warren
2016-04-19 9:43 ` [PATCH V2 3/3] gpio: tegra: Add support for gpio debounce Laxman Dewangan
2016-04-19 9:43 ` Laxman Dewangan
[not found] ` <1461059020-25373-3-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-19 10:43 ` Jon Hunter
2016-04-19 10:43 ` Jon Hunter
2016-04-19 12:36 ` Thierry Reding
2016-04-19 12:37 ` Thierry Reding
2016-04-19 12:45 ` Laxman Dewangan
2016-04-19 12:45 ` Laxman Dewangan
2016-04-19 16:11 ` Stephen Warren
[not found] ` <571658CE.1040306-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-04-19 16:19 ` Laxman Dewangan
2016-04-19 16:19 ` Laxman Dewangan
2016-04-19 16:36 ` Stephen Warren [this message]
2016-04-19 12:06 ` [PATCH V2 1/3] gpio: tegra: Don't open code of_device_get_match_data() Thierry Reding
2016-04-29 8:56 ` Linus Walleij
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=57165EAA.7080304@wwwdotorg.org \
--to=swarren@wwwdotorg.org \
--cc=gnurou@gmail.com \
--cc=ldewangan@nvidia.com \
--cc=linus.walleij@linaro.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=thierry.reding@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.