From: Shannon Zhao <zhaoshenglong@huawei.com>
To: Andrew Jones <drjones@redhat.com>
Cc: peter.maydell@linaro.org, shannon.zhao@linaro.org,
qemu-arm@nongnu.org, qemu-devel@nongnu.org,
peter.huangpeng@huawei.com
Subject: Re: [Qemu-arm] [PATCH v2 2/3] hw/arm/virt: Add PMU node for virt machine
Date: Mon, 25 Apr 2016 14:52:45 +0800 [thread overview]
Message-ID: <571DBEBD.5060001@huawei.com> (raw)
In-Reply-To: <20160424172827.x5pmdjnsgdkivktc@hawk.localdomain>
On 2016/4/25 1:28, Andrew Jones wrote:
> On Sat, Apr 23, 2016 at 06:04:14PM +0800, Shannon Zhao wrote:
>> > From: Shannon Zhao <shannon.zhao@linaro.org>
>> >
>> > Add a virtual PMU device for virt machine while use PPI 7 for PMU
>> > overflow interrupt number.
>> >
>> > Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
>> > ---
>> > hw/arm/virt.c | 31 +++++++++++++++++++++++++++++++
>> > include/hw/arm/virt.h | 4 ++++
>> > include/sysemu/kvm.h | 1 +
>> > stubs/kvm.c | 5 +++++
>> > target-arm/kvm64.c | 39 +++++++++++++++++++++++++++++++++++++++
>> > 5 files changed, 80 insertions(+)
>> >
>> > diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>> > index 56d35c7..d77b314 100644
>> > --- a/hw/arm/virt.c
>> > +++ b/hw/arm/virt.c
>> > @@ -428,6 +428,35 @@ static void fdt_add_gic_node(VirtBoardInfo *vbi, int type)
>> > qemu_fdt_setprop_cell(vbi->fdt, "/intc", "phandle", vbi->gic_phandle);
>> > }
>> >
>> > +static void fdt_add_pmu_nodes(const VirtBoardInfo *vbi)
>> > +{
>> > + CPUState *cpu;
>> > + ARMCPU *armcpu;
>> > + uint32_t irqflags = GIC_FDT_IRQ_FLAGS_LEVEL_HI;
>> > +
>> > + CPU_FOREACH(cpu) {
>> > + armcpu = ARM_CPU(cpu);
>> > + if (!armcpu->has_pmu) {
>> > + return;
>> > + }
>> > +
>> > + kvm_arm_pmu_create(cpu, PPI(VIRTUAL_PMU_IRQ));
>> > + }
>> > +
>> > + irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START,
>> > + GIC_FDT_IRQ_PPI_CPU_WIDTH, (1 << vbi->smp_cpus) - 1);
> The shift will overflow when configuring a machine to have more than
> 32 cpus. You should confirm smp_cpus is <= GIC_FDT_IRQ_PPI_CPU_WIDTH
> before generating a mask this way, otherwise you can just pass in 0xff.
>
Ah, right. So it could check the gictype like what we do in
fdt_add_timer_nodes.
Thanks,
--
Shannon
WARNING: multiple messages have this Message-ID (diff)
From: Shannon Zhao <zhaoshenglong@huawei.com>
To: Andrew Jones <drjones@redhat.com>
Cc: qemu-arm@nongnu.org, peter.maydell@linaro.org,
qemu-devel@nongnu.org, peter.huangpeng@huawei.com,
shannon.zhao@linaro.org
Subject: Re: [Qemu-devel] [PATCH v2 2/3] hw/arm/virt: Add PMU node for virt machine
Date: Mon, 25 Apr 2016 14:52:45 +0800 [thread overview]
Message-ID: <571DBEBD.5060001@huawei.com> (raw)
In-Reply-To: <20160424172827.x5pmdjnsgdkivktc@hawk.localdomain>
On 2016/4/25 1:28, Andrew Jones wrote:
> On Sat, Apr 23, 2016 at 06:04:14PM +0800, Shannon Zhao wrote:
>> > From: Shannon Zhao <shannon.zhao@linaro.org>
>> >
>> > Add a virtual PMU device for virt machine while use PPI 7 for PMU
>> > overflow interrupt number.
>> >
>> > Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
>> > ---
>> > hw/arm/virt.c | 31 +++++++++++++++++++++++++++++++
>> > include/hw/arm/virt.h | 4 ++++
>> > include/sysemu/kvm.h | 1 +
>> > stubs/kvm.c | 5 +++++
>> > target-arm/kvm64.c | 39 +++++++++++++++++++++++++++++++++++++++
>> > 5 files changed, 80 insertions(+)
>> >
>> > diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>> > index 56d35c7..d77b314 100644
>> > --- a/hw/arm/virt.c
>> > +++ b/hw/arm/virt.c
>> > @@ -428,6 +428,35 @@ static void fdt_add_gic_node(VirtBoardInfo *vbi, int type)
>> > qemu_fdt_setprop_cell(vbi->fdt, "/intc", "phandle", vbi->gic_phandle);
>> > }
>> >
>> > +static void fdt_add_pmu_nodes(const VirtBoardInfo *vbi)
>> > +{
>> > + CPUState *cpu;
>> > + ARMCPU *armcpu;
>> > + uint32_t irqflags = GIC_FDT_IRQ_FLAGS_LEVEL_HI;
>> > +
>> > + CPU_FOREACH(cpu) {
>> > + armcpu = ARM_CPU(cpu);
>> > + if (!armcpu->has_pmu) {
>> > + return;
>> > + }
>> > +
>> > + kvm_arm_pmu_create(cpu, PPI(VIRTUAL_PMU_IRQ));
>> > + }
>> > +
>> > + irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START,
>> > + GIC_FDT_IRQ_PPI_CPU_WIDTH, (1 << vbi->smp_cpus) - 1);
> The shift will overflow when configuring a machine to have more than
> 32 cpus. You should confirm smp_cpus is <= GIC_FDT_IRQ_PPI_CPU_WIDTH
> before generating a mask this way, otherwise you can just pass in 0xff.
>
Ah, right. So it could check the gictype like what we do in
fdt_add_timer_nodes.
Thanks,
--
Shannon
next prev parent reply other threads:[~2016-04-25 6:56 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-23 10:04 [Qemu-arm] [PATCH v2 0/3] Add guest PMU in machine virt Shannon Zhao
2016-04-23 10:04 ` [Qemu-devel] " Shannon Zhao
2016-04-23 10:04 ` [Qemu-arm] [PATCH v2 1/3] target-arm: kvm64: set guest PMUv3 feature bit if supported Shannon Zhao
2016-04-23 10:04 ` [Qemu-devel] " Shannon Zhao
2016-04-24 17:17 ` [Qemu-arm] " Andrew Jones
2016-04-24 17:17 ` [Qemu-devel] " Andrew Jones
2016-04-23 10:04 ` [Qemu-arm] [PATCH v2 2/3] hw/arm/virt: Add PMU node for virt machine Shannon Zhao
2016-04-23 10:04 ` [Qemu-devel] " Shannon Zhao
2016-04-24 17:28 ` [Qemu-arm] " Andrew Jones
2016-04-24 17:28 ` [Qemu-devel] " Andrew Jones
2016-04-25 6:52 ` Shannon Zhao [this message]
2016-04-25 6:52 ` Shannon Zhao
2016-04-25 9:05 ` [Qemu-arm] " Andrew Jones
2016-04-25 9:05 ` Andrew Jones
2016-04-23 10:04 ` [Qemu-devel] [PATCH v2 3/3] hw/arm/virt-acpi-build: Add PMU IRQ number in ACPI table Shannon Zhao
2016-04-23 10:04 ` Shannon Zhao
2016-04-24 17:29 ` [Qemu-arm] " Andrew Jones
2016-04-24 17:29 ` Andrew Jones
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=571DBEBD.5060001@huawei.com \
--to=zhaoshenglong@huawei.com \
--cc=drjones@redhat.com \
--cc=peter.huangpeng@huawei.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=shannon.zhao@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.