From: Lan Tianyu <tianyu.lan@intel.com>
To: "Radim Krčmář" <rkrcmar@redhat.com>,
"Jan Kiszka" <jan.kiszka@siemens.com>
Cc: pbonzini@redhat.com, kvm@vger.kernel.org,
yang.zhang.wz@gmail.com, tglx@linutronix.de, gleb@redhat.com,
mst@redhat.com, x86@kernel.org, Peter Xu <peterx@redhat.com>,
Igor Mammedov <imammedo@redhat.com>
Subject: Re: Enable more than 255 VCPU support without irq remapping function in the guest
Date: Wed, 27 Apr 2016 13:39:02 +0800 [thread overview]
Message-ID: <57205076.3000300@intel.com> (raw)
In-Reply-To: <20160426164939.GA18900@potion>
Hi Radim:
On 2016年04月27日 00:49, Radim Krčmář wrote:
> 2016-04-26 18:17+0200, Jan Kiszka:
>> On 2016-04-26 18:14, Lan, Tianyu wrote:
>>> Hi All:
>>>
>>> Recently I am working on extending max vcpu to more than 256 on the both
>>> KVM/Xen. For some HPC cases, it needs many vcpus. The job requires to
>>> use X2APIC in the guest which supports 32-bit APIC id. Linux kernel
>>> requires irq remapping function during enabling X2APIC when max APIC id
>>> is more than 255(More detail please see try_to_enable_x2apic()).
>
> Our of curiosity, how many VCPUs are you aiming at?
I think it's 1024.
In the short term, we hope hypervisor at least supports 288 vcpus
because Xeon phi chip already supports 288 logical cpus. As hardware
development, there will be more logical cpus and we hope one guest can
totally uses all cpu resources on the chip to meet HPC requirement.
>
>>> The irq remapping function helps to deliver irq to cpu 255~. IOAPIC just
>>> supports 8-bit target APIC id field and only can deliver irq to
>>> cpu 0~255.
>>>
>>> So far both KVM/Xen doesn't enable irq remapping function. If enable the
>>> function, it seems a huge job which need to rework IO-APIC, local APIC,
>>> MSI parts and add virtual VTD support in the KVM.
>>>
>>> Other quick way to enable more than 256 VCPUs is to eliminate the
>>> dependency between irq remapping and X2APIC in the guest linux kernel.
>>> So far I can boot the guest after removing the dependency.
>>> The side effect I thought is that irq only can deliver to 0~255 vcpus
>>> but 256 vcpus seem enough to balance irq requests in the guest. In the
>>> most cases, there are fewer devices in the guest.
>>>
>>> I wonder whether it's feasible. There maybe some other side effects I
>>> didn't think of. Very appreciate for your comments.
>>
>> Radim is working on the KVM side already, Peter is currently driving the
>> VT-d interrupt emulation topic in QEMU. It's in reach, I would say. :)
>
> + Igor extends QEMU to support more than 255 in internal structures and
> ACPI. What remains mostly untracked is Seabios/OVMF.
Thanks for you information. How about KVM X2APIC part? Do you have patch
to extend KVM X2APIC to support 32-bit APIC ID?
>
>> PS: Please no PV mess, at least without good reasons.
>
> Seconded.
>
> (If we designed all related devices as virtware, then it would not be
> that bad, but slightly modifying and putting hardware drivers into
> situations that cannot happen in hardware, not even in the spec, and
> then juggling the KVM side to make them work, is a road to hell.)
>
--
Best regards
Tianyu Lan
next prev parent reply other threads:[~2016-04-27 5:46 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-26 16:14 Enable more than 255 VCPU support without irq remapping function in the guest Lan, Tianyu
2016-04-26 16:17 ` Jan Kiszka
2016-04-26 16:49 ` Radim Krčmář
2016-04-27 4:10 ` Yang Zhang
2016-04-27 5:24 ` Jan Kiszka
2016-04-27 6:24 ` Lan Tianyu
2016-04-27 6:56 ` Jan Kiszka
2016-04-27 9:39 ` Yang Zhang
2016-04-27 9:45 ` Jan Kiszka
2016-04-28 1:11 ` Yang Zhang
2016-04-28 6:54 ` Jan Kiszka
2016-04-28 15:32 ` Radim Krčmář
2016-04-29 2:09 ` Yang Zhang
2016-04-29 3:01 ` Nadav Amit
2016-05-03 1:34 ` Yang Zhang
2016-04-29 4:59 ` Jan Kiszka
2016-05-03 1:52 ` Yang Zhang
2016-05-03 2:03 ` Nadav Amit
2016-05-03 4:55 ` Jan Kiszka
2016-05-04 1:46 ` Yang Zhang
2016-05-04 1:56 ` Nadav Amit
2016-05-04 5:38 ` Jan Kiszka
2016-04-27 5:39 ` Lan Tianyu [this message]
2016-04-27 14:38 ` Radim Krčmář
2016-04-27 5:15 ` Lan Tianyu
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