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From: Lan Tianyu <tianyu.lan@intel.com>
To: "Jan Kiszka" <jan.kiszka@siemens.com>,
	"Yang Zhang" <yang.zhang.wz@gmail.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>
Cc: pbonzini@redhat.com, kvm@vger.kernel.org, tglx@linutronix.de,
	gleb@redhat.com, mst@redhat.com, x86@kernel.org,
	Peter Xu <peterx@redhat.com>, Igor Mammedov <imammedo@redhat.com>
Subject: Re: Enable more than 255 VCPU support without irq remapping function in the guest
Date: Wed, 27 Apr 2016 14:24:18 +0800	[thread overview]
Message-ID: <57205B12.6070003@intel.com> (raw)
In-Reply-To: <57204D28.4070706@siemens.com>

On 2016年04月27日 13:24, Jan Kiszka wrote:
>> > If we don't want the interrupt from internal device delivers to CPU
>>> >>255, do we still need the VT-d interrupt remapping emulation? I think
>> > firmware is able to send IPI to wakeup APs even without IR and OS is
>> > able to do it too. So basically, only KVM and Qemu's support is enough.

Yes, just starting more than 255 APs doesn't need IR.

> What are "internal devices" for you? And which OS do you know that would
> handle such artificial setups without prio massive patching?
> 
> We do need VT-d IR emulation in order to present our guest a well
> specified and support architecture for running > 255 CPUs.

Changing guest kernel will be big concern. I found commit ce69a784 did
optimization to use X2APIC without IR in the guest when APIC id is less
than 256 and so I proposed my idea to see everyone's feedback. Whether
it's possible to relax the IR requirement when APIC id > 255 in the guest.

commit ce69a784504222c3ab6f1b3c357d09ec5772127a
Author: Gleb Natapov <gleb@redhat.com>
Date:   Mon Jul 20 15:24:17 2009 +0300

    x86/apic: Enable x2APIC without interrupt remapping under KVM

    KVM would like to provide x2APIC interface to a guest without emulating
    interrupt remapping device. The reason KVM prefers guest to use x2APIC
    is that x2APIC interface is better virtualizable and provides better
    performance than mmio xAPIC interface:

     - msr exits are faster than mmio (no page table walk, emulation)
     - no need to read back ICR to look at the busy bit
     - one 64 bit ICR write instead of two 32 bit writes
     - shared code with the Hyper-V paravirt interface

    Included patch changes x2APIC enabling logic to enable it even if IR
    initialization failed, but kernel runs under KVM and no apic id is
    greater than 255 (if there is one spec requires BIOS to move to
x2apic mode before starting an OS).

It's great to know Peter already worked on the IR.

-- 
Best regards
Tianyu Lan

  reply	other threads:[~2016-04-27  6:32 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-26 16:14 Enable more than 255 VCPU support without irq remapping function in the guest Lan, Tianyu
2016-04-26 16:17 ` Jan Kiszka
2016-04-26 16:49   ` Radim Krčmář
2016-04-27  4:10     ` Yang Zhang
2016-04-27  5:24       ` Jan Kiszka
2016-04-27  6:24         ` Lan Tianyu [this message]
2016-04-27  6:56           ` Jan Kiszka
2016-04-27  9:39         ` Yang Zhang
2016-04-27  9:45           ` Jan Kiszka
2016-04-28  1:11             ` Yang Zhang
2016-04-28  6:54               ` Jan Kiszka
2016-04-28 15:32                 ` Radim Krčmář
2016-04-29  2:09                   ` Yang Zhang
2016-04-29  3:01                     ` Nadav Amit
2016-05-03  1:34                       ` Yang Zhang
2016-04-29  4:59                     ` Jan Kiszka
2016-05-03  1:52                       ` Yang Zhang
2016-05-03  2:03                         ` Nadav Amit
2016-05-03  4:55                           ` Jan Kiszka
2016-05-04  1:46                             ` Yang Zhang
2016-05-04  1:56                               ` Nadav Amit
2016-05-04  5:38                               ` Jan Kiszka
2016-04-27  5:39     ` Lan Tianyu
2016-04-27 14:38       ` Radim Krčmář
2016-04-27  5:15   ` Lan Tianyu

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