All of lore.kernel.org
 help / color / mirror / Atom feed
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 03/10] drm/i915: Fix gen8 semaphores id for legacy mode
Date: Fri, 29 Apr 2016 09:36:37 +0100	[thread overview]
Message-ID: <57231D15.10503@linux.intel.com> (raw)
In-Reply-To: <1461860672-12623-3-git-send-email-chris@chris-wilson.co.uk>


On 28/04/16 17:24, Chris Wilson wrote:
> With the introduction of a distinct engine->id vs the hardware id, we need
> to fix up the value we use for selecting the target engine when signaling
> a semaphore. Note that these values can be merged with engine->guc_id.

So I broke something more with the decoupling, did not realize. I 
suppose it was still worth it. This at least wasn't being used.

Regards,

Tvrtko


> Fixes: de1add360522c876c25ef2bbbbab1c94bdb509ab
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/intel_ringbuffer.c | 9 +++++++--
>   drivers/gpu/drm/i915/intel_ringbuffer.h | 3 ++-
>   2 files changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 138afed82682..9761443bcfdf 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1308,7 +1308,7 @@ static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req,
>   		intel_ring_emit(signaller, seqno);
>   		intel_ring_emit(signaller, 0);
>   		intel_ring_emit(signaller, MI_SEMAPHORE_SIGNAL |
> -					   MI_SEMAPHORE_TARGET(waiter->id));
> +					   MI_SEMAPHORE_TARGET(waiter->hw_id));
>   		intel_ring_emit(signaller, 0);
>   	}
>
> @@ -1348,7 +1348,7 @@ static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req,
>   		intel_ring_emit(signaller, upper_32_bits(gtt_offset));
>   		intel_ring_emit(signaller, seqno);
>   		intel_ring_emit(signaller, MI_SEMAPHORE_SIGNAL |
> -					   MI_SEMAPHORE_TARGET(waiter->id));
> +					   MI_SEMAPHORE_TARGET(waiter->hw_id));
>   		intel_ring_emit(signaller, 0);
>   	}
>
> @@ -2759,6 +2759,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
>   	engine->name = "render ring";
>   	engine->id = RCS;
>   	engine->exec_id = I915_EXEC_RENDER;
> +	engine->hw_id = 0;
>   	engine->mmio_base = RENDER_RING_BASE;
>
>   	if (INTEL_INFO(dev)->gen >= 8) {
> @@ -2909,6 +2910,7 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
>   	engine->name = "bsd ring";
>   	engine->id = VCS;
>   	engine->exec_id = I915_EXEC_BSD;
> +	engine->hw_id = 1;
>
>   	engine->write_tail = ring_write_tail;
>   	if (INTEL_INFO(dev)->gen >= 6) {
> @@ -2987,6 +2989,7 @@ int intel_init_bsd2_ring_buffer(struct drm_device *dev)
>   	engine->name = "bsd2 ring";
>   	engine->id = VCS2;
>   	engine->exec_id = I915_EXEC_BSD;
> +	engine->hw_id = 4;
>
>   	engine->write_tail = ring_write_tail;
>   	engine->mmio_base = GEN8_BSD2_RING_BASE;
> @@ -3019,6 +3022,7 @@ int intel_init_blt_ring_buffer(struct drm_device *dev)
>   	engine->name = "blitter ring";
>   	engine->id = BCS;
>   	engine->exec_id = I915_EXEC_BLT;
> +	engine->hw_id = 2;
>
>   	engine->mmio_base = BLT_RING_BASE;
>   	engine->write_tail = ring_write_tail;
> @@ -3078,6 +3082,7 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev)
>   	engine->name = "video enhancement ring";
>   	engine->id = VECS;
>   	engine->exec_id = I915_EXEC_VEBOX;
> +	engine->hw_id = 3;
>
>   	engine->mmio_base = VEBOX_RING_BASE;
>   	engine->write_tail = ring_write_tail;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 7023e88531b5..2651fd5263eb 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -153,7 +153,8 @@ struct  intel_engine_cs {
>   #define I915_NUM_ENGINES 5
>   #define _VCS(n) (VCS + (n))
>   	unsigned int exec_id;
> -	unsigned int guc_id;
> +	unsigned int hw_id;
> +	unsigned int guc_id; /* XXX same as hw_id? */
>   	u32		mmio_base;
>   	struct		drm_device *dev;
>   	struct intel_ringbuffer *buffer;
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2016-04-29  8:36 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-28 16:24 [PATCH 01/10] drm/i915: Apply strongly ordered RCS breadcrumb to gen8/legacy Chris Wilson
2016-04-28 16:24 ` [PATCH 02/10] drm/i915: Fix ordering of sanitize ppgtt and sanitize execlists Chris Wilson
2016-04-28 18:48   ` Dave Gordon
2016-04-29 10:59   ` Joonas Lahtinen
2016-04-28 16:24 ` [PATCH 03/10] drm/i915: Fix gen8 semaphores id for legacy mode Chris Wilson
2016-04-29  8:36   ` Tvrtko Ursulin [this message]
2016-04-29  8:49     ` Chris Wilson
2016-05-04 11:35       ` Dave Gordon
2016-05-04 11:44         ` Chris Wilson
2016-04-28 16:24 ` [PATCH 04/10] drm/i915: Fix serialisation of pipecontrol write vs semaphore signal Chris Wilson
2016-04-28 16:24 ` [PATCH 05/10] drm/i915: Reload PD tables after semaphore wait on gen8 Chris Wilson
2016-04-28 16:24 ` [PATCH 06/10] drm/i915: Bump reserved size for legacy gen8 semaphore emission Chris Wilson
2016-04-29  7:40   ` Joonas Lahtinen
2016-04-28 16:24 ` [PATCH 07/10] drm/i915: Trim the flush for the legacy request emission Chris Wilson
2016-04-29  7:43   ` Joonas Lahtinen
2016-04-28 16:24 ` [PATCH 08/10] drm/i915: Trim the flush for the execlists " Chris Wilson
2016-04-29  7:49   ` Joonas Lahtinen
2016-04-28 16:24 ` [PATCH 09/10] drm/i915: Enable semaphores for legacy submission on gen8 Chris Wilson
2016-05-02  8:56   ` Daniel Vetter
2016-04-28 16:24 ` [PATCH 10/10] drm/i915: Enable legacy/semaphores for CI Chris Wilson
2016-04-28 16:56 ` ✗ Fi.CI.BAT: failure for series starting with [01/10] drm/i915: Apply strongly ordered RCS breadcrumb to gen8/legacy Patchwork
2016-04-29  8:30 ` [PATCH 01/10] " Joonas Lahtinen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=57231D15.10503@linux.intel.com \
    --to=tvrtko.ursulin@linux.intel.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.