Re: [PATCH 1/1] ARM: dts: sunxi: Add a olinuxino-lime2-emmc

[Olliver Schinagl <oliver-dxLnbx3+1qmEVqv0pETR8A@public.gmane.org>]

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Hey Christo,

On 04-05-16 15:32, Christo Radev wrote:
> Hi Oliver,
>
> I do: that 
> http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7359
> The syntax error seen there was fixed and the result is: 
> http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7361
Nope, you are still forgetting and seeing an 'unsupported function' 
error because of it.

You forgot to add:

>>>/SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12), />>>/SUNXI_FUNCTION(0x0, "gpio_in"), />>>/SUNXI_FUNCTION(0x1, "gpio_out"), />>>/- SUNXI_FUNCTION(0x2, "nand0")), /* NDQ4 */ />>>/+ SUNXI_FUNCTION(0x2, "nand0"), /* NDQ4 */ />>>/+ SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */ />>>/SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13), />>>/SUNXI_FUNCTION(0x0, "gpio_in"), />>>/SUNXI_FUNCTION(0x1, "gpio_out"), />>>/- SUNXI_FUNCTION(0x2, "nand0")), /* NDQ5 */ />>>/+ SUNXI_FUNCTION(0x2, "nand0"), /* NDQ5 */ />>>/+ SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */ />>>/SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14), />>>/SUNXI_FUNCTION(0x0, "gpio_in"), />>>/SUNXI_FUNCTION(0x1, "gpio_out"), />>>/- SUNXI_FUNCTION(0x2, "nand0")), /* NDQ6 */ />>>/+ SUNXI_FUNCTION(0x2, "nand0"), /* NDQ6 */ />>>/+ SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */ />>>/SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15), />>>/SUNXI_FUNCTION(0x0, "gpio_in"), />>>/SUNXI_FUNCTION(0x1, "gpio_out"), />>>/- SUNXI_FUNCTION(0x2, "nand0")), /* NDQ7 */ />>>/+ SUNXI_FUNCTION(0x2, "nand0"), /* NDQ7 */ />>>/+ SUNXI_FUNCTION(0x3, "mmc2")), /* D7 *//


to actually get the pin functions.
>
> The same tests was done on legacy kernel 3.4.111 modifying fex file 
> and the result is the same: 
> http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7265
>
>
> Best regards
> Chris
>
>
> On Wednesday, May 4, 2016 at 4:19:20 PM UTC+3, Olliver Schinagl wrote:
>
>     Hey Christo,
>
>     On 04-05-16 15:07, Christo Radev wrote:
>>     Hi Olliver,
>>
>>     I have already test it a few weeks ago and definitely can say
>>     that 8-bit bus did not work on A20-Olinuxino-Lime2-eMMC with
>>     mainline kernel.
>>     See may post here
>>     <http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7361>.
>     I saw, but you forgot to define the pins for 4.x :)
>
>     See my patch from earlier:
>     http://lists.infradead.org/pipermail/linux-arm-kernel/2015-September/368887.html
>     <http://lists.infradead.org/pipermail/linux-arm-kernel/2015-September/368887.html>
>
>     Olliver
>
>>
>>     Best regards
>>
>>     Chris
>>
>>     On Wednesday, May 4, 2016 at 3:52:17 PM UTC+3, Olliver Schinagl
>>     wrote:
>>
>>         Hey Radoslav,
>>
>>         On 04-05-16 14:30, Radoslav Kolev wrote:
>>         > 2016-05-03 10:25 GMT+03:00 Chen-Yu Tsai <we...-jdAy2FN1RRM@public.gmane.org>:
>>         >> On Tue, May 3, 2016 at 3:21 PM, Olliver Schinagl
>>         <oli...-dxLnbx3+1qmEVqv0pETR8A@public.gmane.org> wrote:
>>         >>>>> +       bus-width = <4>;
>>         >>>> Only 4 bits? We normally see eMMC with 8 bits. 4 bits
>>         are some kind of
>>         >>>> embedded SD card.
>>         >>> On A20 as well? Our investigations so far have concluded
>>         that the A10 and
>>         >>> A20 have those pins not mapped out to pads. The IP does
>>         support it however
>>         >>> we assume.
>>         >> You're right. My bad. First time A10/A20 sees eMMC support.
>>         > I can't say anything about A10/A20, but I have a board with
>>         A13 and
>>         > the same eMMC chip and it works fine in 8 bit mode.
>>         Yep, sun5i actually brings them all out to pads, the A20
>>         however does
>>         not :( We first thought that the A20 would also be an
>>         8bitter, because
>>         the mmc IP appears to be the same as sun5i, but initial tests
>>         show it is
>>         not. As for A10, it has older IP and it might not even
>>         support 8 bit
>>         mode, let alone bring out the pins.
>>
>>         But with A20's + eMMC being available via the lime2, others
>>         may repeat
>>         my experiments! The lime2 is 8 bit connected.
>>
>>         Olliver
>>         >
>>         > Regards,
>>         > Radoslav
>>
>

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