From: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>,
Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
Thierry Reding
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Kevin Hilman <khilman-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Geert Uytterhoeven
<geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org>,
Grygorii Strashko
<grygorii.strashko-l0cyMroinI0@public.gmane.org>,
Lars-Peter Clausen <lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>,
Linus Walleij
<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH V3 16/17] irqchip/gic: Prepare for adding platform driver
Date: Fri, 6 May 2016 15:09:51 +0100 [thread overview]
Message-ID: <572CA5AF.7080504@nvidia.com> (raw)
In-Reply-To: <572B54F4.2080103-5wv7dgnIgG8@public.gmane.org>
Hi Marc,
On 05/05/16 15:13, Marc Zyngier wrote:
[...]
> Gahhh. No. Please. Last time we did that, it took 6 months to untangle
> the mess people made by adding their own hacks in this structure,
> so I definitely want to keep it completely private, forever. Same goes
> for the gic_{dist,cpu.pm}_init() functions.
OK.
> I've had a go at this, and came up with the following patch. I've only
> briefly tested it on a host and a VM, so it is likely to break some stuff
> somewhere, but you'll get the idea: The gic_chip_data struct is entirely
> opaque, allocated by the GIC driver itself, with a few new fields in
> it so that it becomes self-contained. This applies on top of your series.
>
> It should also make it easy to switch to a model where we allocate
> the structure dynamically instead of the old static crap.
>
> Thoughts?
Yes I have been doing some testing and with a couple tweaks we can make
something like this work. One thing that caught me out was ...
> +int gic_of_setup(struct device_node *node, struct device *dev,
> + struct gic_chip_data **gicp)
> +{
> + struct gic_chip_data *gic;
>
> - *cpu_base = of_iomap(node, 1);
> - if (WARN(!*cpu_base, "unable to map gic cpu registers\n")) {
> - iounmap(*dist_base);
> - return -ENOMEM;
> + if (!node || !gicp)
> + return -EINVAL;
> +
> + if (dev) {
> + *gicp = devm_kzalloc(dev, sizeof(*gic), GFP_KERNEL);
> + if (!*gicp)
> + return -ENOMEM;
> }
>
> - if (of_property_read_u32(node, "cpu-offset", percpu_offset))
> - *percpu_offset = 0;
> + gic = *gicp;
> +
> + gic->raw_dist_base = of_iomap(node, 0);
> + if (WARN(!gic->raw_dist_base, "unable to map gic dist registers\n"))
> + goto err;
> +
> + gic->raw_cpu_base = of_iomap(node, 1);
> + if (WARN(!gic->raw_cpu_base, "unable to map gic cpu registers\n"))
> + goto err;
> +
> + if (of_property_read_u32(node, "cpu-offset", &gic->percpu_offset))
> + gic->percpu_offset = 0;
>
> + gic->chip.parent_device = dev;
We can't initialise the device here as it gets overwritten in the
gic_init_bases. So I have had to re-organise things a bit. Good news is
that I have eliminated the call from the platform driver to
gic_init_bases so we only have a single call to initialise the GIC.
Cheers
Jon
WARNING: multiple messages have this Message-ID (diff)
From: Jon Hunter <jonathanh@nvidia.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Stephen Warren <swarren@wwwdotorg.org>,
Thierry Reding <thierry.reding@gmail.com>
Cc: Kevin Hilman <khilman@kernel.org>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Grygorii Strashko <grygorii.strashko@ti.com>,
Lars-Peter Clausen <lars@metafoo.de>,
Linus Walleij <linus.walleij@linaro.org>,
<linux-tegra@vger.kernel.org>, <linux-omap@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V3 16/17] irqchip/gic: Prepare for adding platform driver
Date: Fri, 6 May 2016 15:09:51 +0100 [thread overview]
Message-ID: <572CA5AF.7080504@nvidia.com> (raw)
In-Reply-To: <572B54F4.2080103@arm.com>
Hi Marc,
On 05/05/16 15:13, Marc Zyngier wrote:
[...]
> Gahhh. No. Please. Last time we did that, it took 6 months to untangle
> the mess people made by adding their own hacks in this structure,
> so I definitely want to keep it completely private, forever. Same goes
> for the gic_{dist,cpu.pm}_init() functions.
OK.
> I've had a go at this, and came up with the following patch. I've only
> briefly tested it on a host and a VM, so it is likely to break some stuff
> somewhere, but you'll get the idea: The gic_chip_data struct is entirely
> opaque, allocated by the GIC driver itself, with a few new fields in
> it so that it becomes self-contained. This applies on top of your series.
>
> It should also make it easy to switch to a model where we allocate
> the structure dynamically instead of the old static crap.
>
> Thoughts?
Yes I have been doing some testing and with a couple tweaks we can make
something like this work. One thing that caught me out was ...
> +int gic_of_setup(struct device_node *node, struct device *dev,
> + struct gic_chip_data **gicp)
> +{
> + struct gic_chip_data *gic;
>
> - *cpu_base = of_iomap(node, 1);
> - if (WARN(!*cpu_base, "unable to map gic cpu registers\n")) {
> - iounmap(*dist_base);
> - return -ENOMEM;
> + if (!node || !gicp)
> + return -EINVAL;
> +
> + if (dev) {
> + *gicp = devm_kzalloc(dev, sizeof(*gic), GFP_KERNEL);
> + if (!*gicp)
> + return -ENOMEM;
> }
>
> - if (of_property_read_u32(node, "cpu-offset", percpu_offset))
> - *percpu_offset = 0;
> + gic = *gicp;
> +
> + gic->raw_dist_base = of_iomap(node, 0);
> + if (WARN(!gic->raw_dist_base, "unable to map gic dist registers\n"))
> + goto err;
> +
> + gic->raw_cpu_base = of_iomap(node, 1);
> + if (WARN(!gic->raw_cpu_base, "unable to map gic cpu registers\n"))
> + goto err;
> +
> + if (of_property_read_u32(node, "cpu-offset", &gic->percpu_offset))
> + gic->percpu_offset = 0;
>
> + gic->chip.parent_device = dev;
We can't initialise the device here as it gets overwritten in the
gic_init_bases. So I have had to re-organise things a bit. Good news is
that I have eliminated the call from the platform driver to
gic_init_bases so we only have a single call to initialise the GIC.
Cheers
Jon
next prev parent reply other threads:[~2016-05-06 14:09 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-04 16:25 [PATCH V3 00/17] Add support for Tegra210 AGIC Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-04 16:25 ` [PATCH V3 01/17] irqchip/gic: Don't unnecessarily write the IRQ configuration Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-04 16:25 ` [PATCH V3 02/17] irqchip/gic: WARN if setting the interrupt type for a PPI fails Jon Hunter
2016-05-04 16:25 ` Jon Hunter
[not found] ` <1462379130-11742-3-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-05 12:06 ` Marc Zyngier
2016-05-05 12:06 ` Marc Zyngier
2016-05-05 13:22 ` Jon Hunter
2016-05-05 13:22 ` Jon Hunter
2016-05-05 13:40 ` Marc Zyngier
2016-05-05 13:40 ` Marc Zyngier
2016-05-05 14:41 ` Jon Hunter
2016-05-05 14:41 ` Jon Hunter
[not found] ` <1462379130-11742-1-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-04 16:25 ` [PATCH V3 03/17] irqchip: Mask the non-type/sense bits when translating an IRQ Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-04 16:25 ` [PATCH V3 16/17] irqchip/gic: Prepare for adding platform driver Jon Hunter
2016-05-04 16:25 ` Jon Hunter
[not found] ` <1462379130-11742-17-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-05 14:13 ` Marc Zyngier
2016-05-05 14:13 ` Marc Zyngier
[not found] ` <572B54F4.2080103-5wv7dgnIgG8@public.gmane.org>
2016-05-06 14:09 ` Jon Hunter [this message]
2016-05-06 14:09 ` Jon Hunter
[not found] ` <572CA5AF.7080504-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-06 14:27 ` Marc Zyngier
2016-05-06 14:27 ` Marc Zyngier
2016-05-04 16:25 ` [PATCH V3 04/17] irqdomain: Fix handling of type settings for existing mappings Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-04 16:25 ` [PATCH V3 05/17] genirq: Look-up trigger type if not specified by caller Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-04 16:25 ` [PATCH V3 06/17] irqdomain: Don't set type when mapping an IRQ Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-09 12:23 ` Marc Zyngier
[not found] ` <5730813B.7060206-5wv7dgnIgG8@public.gmane.org>
2016-05-09 13:13 ` Jon Hunter
2016-05-09 13:13 ` Jon Hunter
[not found] ` <57308D0D.4080800-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-09 15:10 ` Marc Zyngier
2016-05-09 15:10 ` Marc Zyngier
[not found] ` <5730A867.9070504-5wv7dgnIgG8@public.gmane.org>
2016-05-09 15:44 ` Jon Hunter
2016-05-09 15:44 ` Jon Hunter
[not found] ` <5730B078.8090908-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-10 12:20 ` Marc Zyngier
2016-05-10 12:20 ` Marc Zyngier
2016-05-04 16:25 ` [PATCH V3 07/17] genirq: Ensure IRQ descriptor is valid when setting-up the IRQ Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-04 16:25 ` [PATCH V3 08/17] genirq: Add runtime power management support for IRQ chips Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-04 16:25 ` [PATCH V3 09/17] irqchip/gic: Don't initialise chip if mapping IO space fails Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-04 16:25 ` [PATCH V3 10/17] irqchip/gic: Remove static irq_chip definition for eoimode1 Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-04 16:25 ` [PATCH V3 11/17] irqchip/gic: Return an error if GIC initialisation fails Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-04 16:25 ` [PATCH V3 12/17] irqchip/gic: Pass GIC pointer to save/restore functions Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-04 16:25 ` [PATCH V3 13/17] irqchip/gic: Don't allow early initialisation if GIC requires RPM Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-04 16:25 ` [PATCH V3 14/17] irqchip/gic: Add helper function for configuring a GIC via device-tree Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-04 16:25 ` [PATCH V3 15/17] irqchip/gic: Split GIC init in preparation for platform driver Jon Hunter
2016-05-04 16:25 ` Jon Hunter
2016-05-04 16:25 ` [PATCH V3 17/17] irqchip/gic: Add platform driver for non-root GICs that require RPM Jon Hunter
2016-05-04 16:25 ` Jon Hunter
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