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From: Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>
To: Douglas Anderson
	<dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	ulf.hansson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	xzy.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	pawel.moll-5wv7dgnIgG8@public.gmane.org,
	ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
	shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
	linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	adrian.hunter-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v2 08/11] Documentation: phy: Let the rockchip eMMC PHY get an exported card clock
Date: Mon, 20 Jun 2016 18:34:03 +0530	[thread overview]
Message-ID: <5767E9C3.40009@ti.com> (raw)
In-Reply-To: <1465859076-4868-9-git-send-email-dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>



On Tuesday 14 June 2016 04:34 AM, Douglas Anderson wrote:
> As of an earlier change in this series ("Documentation: mmc:
> sdhci-of-arasan: Add ability to export card clock") the SDHCI driver
> used on Rockchip SoCs can now expose its clock.  Let's now specify that
> the PHY can use it.
> 
> Letting the PHY get access to this clock means it can adjust
> phyctrl_frqsel field appropriately.  Although the Rockchip PHY appears
> slightly different than the reference Arasan one, you can see that the
> Arasan datasheet [1] had it defined as:
>   Select the frequency range of DLL operation:
>   3b'000 => 200MHz to 170 MHz
>   3b'001 => 170MHz to 140 MHz
>   3b'010 => 140MHz to 110 MHz
>   3b'011 => 110MHz to 80MHz
>   3b'100 => 80MHz to 50 MHz
>   3b'101 => 275Mhz to 250MHz
>   3b'110 => 250MHz to 225MHz
>   3b'111 => 225MHz to 200MHz
> 
> On the Rockchip version of the PHY we have less granularity but the idea
> is the same.
> 
> [1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf
> 
> Signed-off-by: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>

Acked-by: Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>
> ---
> Changes in v2:
> - List out clocks and clock names (Rob)
> 
>  Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
> index 555cb0f40690..e3ea55763b0a 100644
> --- a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
> +++ b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
> @@ -7,6 +7,13 @@ Required properties:
>   - reg: PHY register address offset and length in "general
>     register files"
>  
> +Optional clocks using the clock bindings (see ../clock/clock-bindings.txt),
> +specified by name:
> + - clock-names: Should contain "emmcclk".  Although this is listed as optional
> +		(because most boards can get basic functionality without having
> +		access to it), it is strongly suggested.
> + - clocks: Should have a phandle to the card clock exported by the SDHCI driver.
> +
>  Example:
>  
>  
> @@ -20,6 +27,8 @@ grf: syscon@ff770000 {
>  	emmcphy: phy@f780 {
>  		compatible = "rockchip,rk3399-emmc-phy";
>  		reg = <0xf780 0x20>;
> +		clocks = <&sdhci>;
> +		clock-names = "emmcclk";
>  		#phy-cells = <0>;
>  	};
>  };
> 

WARNING: multiple messages have this Message-ID (diff)
From: kishon@ti.com (Kishon Vijay Abraham I)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 08/11] Documentation: phy: Let the rockchip eMMC PHY get an exported card clock
Date: Mon, 20 Jun 2016 18:34:03 +0530	[thread overview]
Message-ID: <5767E9C3.40009@ti.com> (raw)
In-Reply-To: <1465859076-4868-9-git-send-email-dianders@chromium.org>



On Tuesday 14 June 2016 04:34 AM, Douglas Anderson wrote:
> As of an earlier change in this series ("Documentation: mmc:
> sdhci-of-arasan: Add ability to export card clock") the SDHCI driver
> used on Rockchip SoCs can now expose its clock.  Let's now specify that
> the PHY can use it.
> 
> Letting the PHY get access to this clock means it can adjust
> phyctrl_frqsel field appropriately.  Although the Rockchip PHY appears
> slightly different than the reference Arasan one, you can see that the
> Arasan datasheet [1] had it defined as:
>   Select the frequency range of DLL operation:
>   3b'000 => 200MHz to 170 MHz
>   3b'001 => 170MHz to 140 MHz
>   3b'010 => 140MHz to 110 MHz
>   3b'011 => 110MHz to 80MHz
>   3b'100 => 80MHz to 50 MHz
>   3b'101 => 275Mhz to 250MHz
>   3b'110 => 250MHz to 225MHz
>   3b'111 => 225MHz to 200MHz
> 
> On the Rockchip version of the PHY we have less granularity but the idea
> is the same.
> 
> [1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf
> 
> Signed-off-by: Douglas Anderson <dianders@chromium.org>

Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> Changes in v2:
> - List out clocks and clock names (Rob)
> 
>  Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
> index 555cb0f40690..e3ea55763b0a 100644
> --- a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
> +++ b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
> @@ -7,6 +7,13 @@ Required properties:
>   - reg: PHY register address offset and length in "general
>     register files"
>  
> +Optional clocks using the clock bindings (see ../clock/clock-bindings.txt),
> +specified by name:
> + - clock-names: Should contain "emmcclk".  Although this is listed as optional
> +		(because most boards can get basic functionality without having
> +		access to it), it is strongly suggested.
> + - clocks: Should have a phandle to the card clock exported by the SDHCI driver.
> +
>  Example:
>  
>  
> @@ -20,6 +27,8 @@ grf: syscon at ff770000 {
>  	emmcphy: phy at f780 {
>  		compatible = "rockchip,rk3399-emmc-phy";
>  		reg = <0xf780 0x20>;
> +		clocks = <&sdhci>;
> +		clock-names = "emmcclk";
>  		#phy-cells = <0>;
>  	};
>  };
> 

WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Douglas Anderson <dianders@chromium.org>,
	<ulf.hansson@linaro.org>, Heiko Stuebner <heiko@sntech.de>,
	<robh+dt@kernel.org>
Cc: <shawn.lin@rock-chips.com>, <xzy.xu@rock-chips.com>,
	<briannorris@chromium.org>, <adrian.hunter@intel.com>,
	<linux-rockchip@lists.infradead.org>, <linux-mmc@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <pawel.moll@arm.com>,
	<mark.rutland@arm.com>, <ijc+devicetree@hellion.org.uk>,
	<galak@codeaurora.org>, <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 08/11] Documentation: phy: Let the rockchip eMMC PHY get an exported card clock
Date: Mon, 20 Jun 2016 18:34:03 +0530	[thread overview]
Message-ID: <5767E9C3.40009@ti.com> (raw)
In-Reply-To: <1465859076-4868-9-git-send-email-dianders@chromium.org>



On Tuesday 14 June 2016 04:34 AM, Douglas Anderson wrote:
> As of an earlier change in this series ("Documentation: mmc:
> sdhci-of-arasan: Add ability to export card clock") the SDHCI driver
> used on Rockchip SoCs can now expose its clock.  Let's now specify that
> the PHY can use it.
> 
> Letting the PHY get access to this clock means it can adjust
> phyctrl_frqsel field appropriately.  Although the Rockchip PHY appears
> slightly different than the reference Arasan one, you can see that the
> Arasan datasheet [1] had it defined as:
>   Select the frequency range of DLL operation:
>   3b'000 => 200MHz to 170 MHz
>   3b'001 => 170MHz to 140 MHz
>   3b'010 => 140MHz to 110 MHz
>   3b'011 => 110MHz to 80MHz
>   3b'100 => 80MHz to 50 MHz
>   3b'101 => 275Mhz to 250MHz
>   3b'110 => 250MHz to 225MHz
>   3b'111 => 225MHz to 200MHz
> 
> On the Rockchip version of the PHY we have less granularity but the idea
> is the same.
> 
> [1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf
> 
> Signed-off-by: Douglas Anderson <dianders@chromium.org>

Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> Changes in v2:
> - List out clocks and clock names (Rob)
> 
>  Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
> index 555cb0f40690..e3ea55763b0a 100644
> --- a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
> +++ b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
> @@ -7,6 +7,13 @@ Required properties:
>   - reg: PHY register address offset and length in "general
>     register files"
>  
> +Optional clocks using the clock bindings (see ../clock/clock-bindings.txt),
> +specified by name:
> + - clock-names: Should contain "emmcclk".  Although this is listed as optional
> +		(because most boards can get basic functionality without having
> +		access to it), it is strongly suggested.
> + - clocks: Should have a phandle to the card clock exported by the SDHCI driver.
> +
>  Example:
>  
>  
> @@ -20,6 +27,8 @@ grf: syscon@ff770000 {
>  	emmcphy: phy@f780 {
>  		compatible = "rockchip,rk3399-emmc-phy";
>  		reg = <0xf780 0x20>;
> +		clocks = <&sdhci>;
> +		clock-names = "emmcclk";
>  		#phy-cells = <0>;
>  	};
>  };
> 

  parent reply	other threads:[~2016-06-20 13:04 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-13 23:04 [PATCH v2 0/11] Changes to support 150 MHz eMMC on rk3399 Douglas Anderson
2016-06-13 23:04 ` Douglas Anderson
2016-06-13 23:04 ` Douglas Anderson
2016-06-13 23:04 ` [PATCH v2 02/11] mmc: sdhci-of-arasan: Always power the PHY off/on when clock changes Douglas Anderson
2016-06-13 23:04   ` Douglas Anderson
2016-06-14  0:30   ` Shawn Lin
2016-06-14  0:30     ` Shawn Lin
     [not found] ` <1465859076-4868-1-git-send-email-dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2016-06-13 23:04   ` [PATCH v2 01/11] phy: rockchip-emmc: Increase lock time allowance Douglas Anderson
2016-06-13 23:04     ` Douglas Anderson
2016-06-13 23:04     ` Douglas Anderson
2016-06-14  0:28     ` Shawn Lin
2016-06-14  0:28       ` Shawn Lin
     [not found]     ` <1465859076-4868-2-git-send-email-dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2016-06-20 13:03       ` Kishon Vijay Abraham I
2016-06-20 13:03         ` Kishon Vijay Abraham I
2016-06-20 13:03         ` Kishon Vijay Abraham I
2016-06-13 23:04   ` [PATCH v2 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs Douglas Anderson
2016-06-13 23:04     ` Douglas Anderson
2016-06-14  0:33     ` Shawn Lin
2016-06-18 14:15     ` Heiko Stübner
2016-06-13 23:04   ` [PATCH v2 05/11] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 Douglas Anderson
2016-06-13 23:04     ` Douglas Anderson
2016-06-13 23:04     ` Douglas Anderson
2016-06-18 12:49     ` Heiko Stübner
2016-06-18 12:49       ` Heiko Stübner
2016-06-13 23:04   ` [PATCH v2 06/11] Documentation: mmc: sdhci-of-arasan: Add ability to export card clock Douglas Anderson
2016-06-13 23:04     ` Douglas Anderson
2016-06-18 18:02     ` Heiko Stuebner
2016-06-13 23:04   ` [PATCH v2 08/11] Documentation: phy: Let the rockchip eMMC PHY get an exported " Douglas Anderson
2016-06-13 23:04     ` Douglas Anderson
2016-06-13 23:04     ` Douglas Anderson
2016-06-16 18:42     ` Rob Herring
2016-06-16 18:42       ` Rob Herring
2016-06-18 21:48     ` Heiko Stübner
2016-06-18 21:48       ` Heiko Stübner
     [not found]     ` <1465859076-4868-9-git-send-email-dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2016-06-20 13:04       ` Kishon Vijay Abraham I [this message]
2016-06-20 13:04         ` Kishon Vijay Abraham I
2016-06-20 13:04         ` Kishon Vijay Abraham I
2016-06-13 23:04   ` [PATCH v2 10/11] phy: rockchip-emmc: Set phyctrl_frqsel based on " Douglas Anderson
2016-06-13 23:04     ` Douglas Anderson
2016-06-13 23:04     ` Douglas Anderson
     [not found]     ` <1465859076-4868-11-git-send-email-dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2016-06-18 12:20       ` Heiko Stübner
2016-06-18 12:20         ` Heiko Stübner
2016-06-18 12:20         ` Heiko Stübner
2016-06-20 16:48         ` Doug Anderson
2016-06-20 16:48           ` Doug Anderson
2016-06-20 16:48           ` Doug Anderson
2016-06-20 13:08       ` Kishon Vijay Abraham I
2016-06-20 13:08         ` Kishon Vijay Abraham I
2016-06-20 13:08         ` Kishon Vijay Abraham I
2016-06-13 23:04   ` [PATCH v2 11/11] arm64: dts: rockchip: Provide emmcclk to PHY for rk3399 Douglas Anderson
2016-06-13 23:04     ` Douglas Anderson
2016-06-13 23:04     ` Douglas Anderson
2016-06-18 12:07     ` Heiko Stübner
2016-06-18 12:07       ` Heiko Stübner
2016-06-17 12:39   ` [PATCH v2 0/11] Changes to support 150 MHz eMMC on rk3399 Kishon Vijay Abraham I
2016-06-17 12:39     ` Kishon Vijay Abraham I
2016-06-17 12:39     ` Kishon Vijay Abraham I
2016-06-17 15:37     ` Doug Anderson
2016-06-17 15:37       ` Doug Anderson
2016-06-17 15:37       ` Doug Anderson
2016-06-13 23:04 ` [PATCH v2 04/11] mmc: sdhci-of-arasan: Properly set corecfg_baseclkfreq " Douglas Anderson
2016-06-13 23:04   ` Douglas Anderson
2016-06-13 23:04   ` Douglas Anderson
2016-06-18 17:59   ` Heiko Stuebner
2016-06-18 17:59     ` Heiko Stuebner
2016-06-13 23:04 ` [PATCH v2 07/11] mmc: sdhci-of-arasan: Add ability to export card clock Douglas Anderson
2016-06-13 23:04   ` Douglas Anderson
2016-06-15 16:40   ` Doug Anderson
2016-06-15 16:40     ` Doug Anderson
2016-06-13 23:04 ` [PATCH v2 09/11] phy: rockchip-emmc: Minor code cleanup in rockchip_emmc_phy_power_on/off() Douglas Anderson
2016-06-13 23:04   ` Douglas Anderson
2016-06-14  0:36   ` Shawn Lin
2016-06-14  0:36     ` Shawn Lin
     [not found]   ` <1465859076-4868-10-git-send-email-dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2016-06-20 13:04     ` Kishon Vijay Abraham I
2016-06-20 13:04       ` Kishon Vijay Abraham I
2016-06-20 13:04       ` Kishon Vijay Abraham I
2016-06-16 23:39 ` [PATCH v2 0/11] Changes to support 150 MHz eMMC on rk3399 Heiko Stuebner
2016-06-16 23:39   ` Heiko Stuebner

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