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From: dinguyen@opensource.altera.com (Dinh Nguyen)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv5 8/8] ARM: dts: Add Arria10 Ethernet EDAC devicetree entry
Date: Mon, 27 Jun 2016 10:31:29 -0500	[thread overview]
Message-ID: <577146D1.40106@opensource.altera.com> (raw)
In-Reply-To: <1466603939-7526-9-git-send-email-tthayer@opensource.altera.com>

Hi Boris,

On 06/22/2016 08:58 AM, tthayer at opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
> 
> Add the device tree entries needed to support the Altera Ethernet
> FIFO buffer EDAC on the Arria10 chip.
> 
> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
> ---
> v2  No change
> v3  Add interrupts for SBERR and DBERR.
> v4  No change
> v5  Change "parent" phandle to "altr,ecc-parent"
> ---
>  arch/arm/boot/dts/socfpga_arria10.dtsi |   16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 

I've applied this patch and will take through the arm-soc tree.

Thanks,
Dinh

WARNING: multiple messages have this Message-ID (diff)
From: Dinh Nguyen <dinguyen@opensource.altera.com>
To: tthayer@opensource.altera.com, bp@alien8.de,
	dougthompson@xmission.com, m.chehab@samsung.com,
	robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
	ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
	linux@arm.linux.org.uk, grant.likely@linaro.org
Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, tthayer.linux@gmail.com
Subject: Re: [PATCHv5 8/8] ARM: dts: Add Arria10 Ethernet EDAC devicetree entry
Date: Mon, 27 Jun 2016 10:31:29 -0500	[thread overview]
Message-ID: <577146D1.40106@opensource.altera.com> (raw)
In-Reply-To: <1466603939-7526-9-git-send-email-tthayer@opensource.altera.com>

Hi Boris,

On 06/22/2016 08:58 AM, tthayer@opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
> 
> Add the device tree entries needed to support the Altera Ethernet
> FIFO buffer EDAC on the Arria10 chip.
> 
> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
> ---
> v2  No change
> v3  Add interrupts for SBERR and DBERR.
> v4  No change
> v5  Change "parent" phandle to "altr,ecc-parent"
> ---
>  arch/arm/boot/dts/socfpga_arria10.dtsi |   16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 

I've applied this patch and will take through the arm-soc tree.

Thanks,
Dinh


WARNING: multiple messages have this Message-ID (diff)
From: Dinh Nguyen <dinguyen@opensource.altera.com>
To: <tthayer@opensource.altera.com>, <bp@alien8.de>,
	<dougthompson@xmission.com>, <m.chehab@samsung.com>,
	<robh+dt@kernel.org>, <pawel.moll@arm.com>,
	<mark.rutland@arm.com>, <ijc+devicetree@hellion.org.uk>,
	<galak@codeaurora.org>, <linux@arm.linux.org.uk>,
	<grant.likely@linaro.org>
Cc: <devicetree@vger.kernel.org>, <linux-doc@vger.kernel.org>,
	<linux-edac@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <tthayer.linux@gmail.com>
Subject: Re: [PATCHv5 8/8] ARM: dts: Add Arria10 Ethernet EDAC devicetree entry
Date: Mon, 27 Jun 2016 10:31:29 -0500	[thread overview]
Message-ID: <577146D1.40106@opensource.altera.com> (raw)
In-Reply-To: <1466603939-7526-9-git-send-email-tthayer@opensource.altera.com>

Hi Boris,

On 06/22/2016 08:58 AM, tthayer@opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
> 
> Add the device tree entries needed to support the Altera Ethernet
> FIFO buffer EDAC on the Arria10 chip.
> 
> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
> ---
> v2  No change
> v3  Add interrupts for SBERR and DBERR.
> v4  No change
> v5  Change "parent" phandle to "altr,ecc-parent"
> ---
>  arch/arm/boot/dts/socfpga_arria10.dtsi |   16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 

I've applied this patch and will take through the arm-soc tree.

Thanks,
Dinh

  reply	other threads:[~2016-06-27 15:31 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-22 13:58 [PATCHv5 0/8] Add Ethernet EDAC & peripheral init functions tthayer at opensource.altera.com
2016-06-22 13:58 ` tthayer
2016-06-22 13:58 ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2016-06-22 13:58 ` [PATCHv5 1/8] EDAC, altera: Check parent status for Arria10 EDAC block tthayer at opensource.altera.com
2016-06-22 13:58   ` tthayer
2016-06-22 13:58   ` tthayer
2016-06-22 13:58 ` [PATCHv5 2/8] EDAC, altera: Add panic flag check to A10 IRQ tthayer at opensource.altera.com
2016-06-22 13:58   ` tthayer
2016-06-22 13:58   ` tthayer
2016-06-22 13:58 ` [PATCHv5 3/8] EDAC, altera: Make all private data structures static const tthayer at opensource.altera.com
2016-06-22 13:58   ` tthayer
2016-06-22 13:58   ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2016-06-22 13:58 ` [PATCHv5 4/8] EDAC, altera: Share Arria10 check_deps & IRQ functions tthayer at opensource.altera.com
2016-06-22 13:58   ` tthayer
2016-06-22 13:58   ` tthayer
2016-06-22 13:58 ` [PATCHv5 5/8] Documentation: dt: socfpga: Add Arria10 Ethernet binding tthayer at opensource.altera.com
2016-06-22 13:58   ` tthayer
2016-06-22 13:58   ` tthayer
2016-06-24 17:07   ` Rob Herring
2016-06-24 17:07     ` Rob Herring
2016-06-22 13:58 ` [PATCHv5 6/8] EDAC, altera: Add Arria10 ECC memory init functions tthayer at opensource.altera.com
2016-06-22 13:58   ` tthayer
2016-06-22 13:58   ` tthayer
2016-06-22 13:58 ` [PATCHv5 7/8] EDAC, altera: Add Arria10 Ethernet EDAC support tthayer at opensource.altera.com
2016-06-22 13:58   ` tthayer
2016-06-22 13:58   ` tthayer
2016-06-22 13:58 ` [PATCHv5 8/8] ARM: dts: Add Arria10 Ethernet EDAC devicetree entry tthayer at opensource.altera.com
2016-06-22 13:58   ` tthayer
2016-06-22 13:58   ` tthayer
2016-06-27 15:31   ` Dinh Nguyen [this message]
2016-06-27 15:31     ` Dinh Nguyen
2016-06-27 15:31     ` Dinh Nguyen
2016-06-27 16:18     ` Borislav Petkov
2016-06-27 16:18       ` Borislav Petkov
2016-06-27 16:13       ` Dinh Nguyen
2016-06-27 16:13         ` Dinh Nguyen
2016-06-27 16:13         ` Dinh Nguyen
2016-06-27 17:54         ` Borislav Petkov
2016-06-27 17:54           ` Borislav Petkov

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