From: Ziyuan Xu <xzy.xu@rock-chips.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 1/3] usb: rockchip-phy: implement USB2.0 phy control for Synopsys
Date: Wed, 06 Jul 2016 11:26:10 +0800 [thread overview]
Message-ID: <577C7A52.2080502@rock-chips.com> (raw)
In-Reply-To: <1556242.t62S0hit0z@phil>
On 2016?07?06? 06:01, Heiko Stuebner wrote:
> Am Dienstag, 5. Juli 2016, 10:05:52 schrieb Ziyuan Xu:
>> From: Xu Ziyuan <xzy.xu@rock-chips.com>
>>
>> So far, Rockchip SoCs have two kinds of USB2.0 phy, like Synopsys and
>> Innosilicon. This patch applys dwc2 usb driver framework to implement
>> phy_init and phy_off for Synopsys phy on Rockchip platform.
>>
>> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
>>
>> ---
>>
>> Changes in v2:
>> - Rename rk3288_usb_phy.c to rockchip_usb_syno_phy.c
>> - Rework the behaviour in otg_phy_init() and otg_phy_off()
>>
>> drivers/usb/phy/Makefile | 1 +
>> drivers/usb/phy/rockchip_usb_syno_phy.c | 48
>> +++++++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+)
>> create mode 100644 drivers/usb/phy/rockchip_usb_syno_phy.c
>>
>> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
>> index 93d147e..8002a18 100644
>> --- a/drivers/usb/phy/Makefile
>> +++ b/drivers/usb/phy/Makefile
>> @@ -7,3 +7,4 @@
>>
>> obj-$(CONFIG_TWL4030_USB) += twl4030.o
>> obj-$(CONFIG_OMAP_USB_PHY) += omap_usb_phy.o
>> +obj-$(CONFIG_ROCKCHIP_USB_SYNO_PHY) += rockchip_usb_syno_phy.o
>> diff --git a/drivers/usb/phy/rockchip_usb_syno_phy.c
>> b/drivers/usb/phy/rockchip_usb_syno_phy.c new file mode 100644
>> index 0000000..f79cb10
>> --- /dev/null
>> +++ b/drivers/usb/phy/rockchip_usb_syno_phy.c
>> @@ -0,0 +1,48 @@
>> +/*
>> + * Copyright 2016 Rockchip Electronics Co., Ltd
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#include <common.h>
>> +#include <asm/io.h>
>> +
>> +#include "../gadget/dwc2_udc_otg_priv.h"
>> +
>> +#define GRF_UOC0_CON0 0x320
> That isn't terrible future proof ... the GRF offsets are different for on
> every Rockchip soc using that phy.
>
> We do have the phy nodes in the devicetree, so shouldn't all that be
> readable from there somehow?
Yup, it makes sense to me.
dwc2 usb driver didn't apply the devicetree model in u-boot, it's too
prolix to get phy_offset from DT. hmm, I have fixed it, and pass it via
regs_phy field.
Thanks!
>
> Heiko
>
>
>
>
next prev parent reply other threads:[~2016-07-06 3:26 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-05 2:05 [U-Boot] [PATCH v2 0/3] rockchip: rk3288: add fastboot support Ziyuan Xu
2016-07-05 2:05 ` [U-Boot] [PATCH v2 1/3] usb: rockchip-phy: implement USB2.0 phy control for Synopsys Ziyuan Xu
2016-07-05 22:01 ` Heiko Stuebner
2016-07-06 3:26 ` Ziyuan Xu [this message]
2016-07-05 2:05 ` [U-Boot] [PATCH v2 2/3] usb: dwc2-otg: re-define fifo-size for Rockchip SoCs Ziyuan Xu
2016-07-05 2:05 ` [U-Boot] [PATCH v2 3/3] rockchip: rk3288: add fastboot support Ziyuan Xu
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