From: Shannon Zhao <zhaoshenglong@huawei.com>
To: Wei Huang <wei@redhat.com>, <qemu-arm@nongnu.org>
Cc: peter.maydell@linaro.org, drjones@redhat.com,
qemu-devel@nongnu.org, abologna@redhat.com,
shannon.zhao@linaro.org
Subject: Re: [Qemu-arm] [Qemu-devel] [PATCH RFC 1/1] arm64: add an option to turn on/off vpmu support
Date: Fri, 29 Jul 2016 08:59:58 +0800 [thread overview]
Message-ID: <579AAA8E.4060703@huawei.com> (raw)
In-Reply-To: <1469723896-28049-1-git-send-email-wei@redhat.com>
On 2016/7/29 0:38, Wei Huang wrote:
> This patch adds a pmu=[on/off] option to enable/disable vpmu support
> in guest vm. There are several reasons to justify this option. First
> vpmu can be problematic for cross-migration between different SoC as
> perf counters is architecture-dependent. It is more flexible to
> have an option to turn it on/off. Secondly it matches the -cpu pmu
> option in libivrt. This patch has been tested on both DT/ACPI modes.
>
> Signed-off-by: Wei Huang <wei@redhat.com>
Reviewed-by:Shannon Zhao <shannon.zhao@linaro.org>
> ---
> hw/arm/virt-acpi-build.c | 2 +-
> hw/arm/virt.c | 2 +-
> target-arm/cpu.c | 1 +
> target-arm/cpu.h | 5 +++--
> target-arm/kvm64.c | 10 +++++-----
> 5 files changed, 11 insertions(+), 9 deletions(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 28fc59c..dc5f66d 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -540,7 +540,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtGuestInfo *guest_info)
> gicc->uid = i;
> gicc->flags = cpu_to_le32(ACPI_GICC_ENABLED);
>
> - if (armcpu->has_pmu) {
> + if (armcpu->enable_pmu) {
> gicc->performance_interrupt = cpu_to_le32(PPI(VIRTUAL_PMU_IRQ));
> }
> }
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index a193b5a..6aea901 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -477,7 +477,7 @@ static void fdt_add_pmu_nodes(const VirtBoardInfo *vbi, int gictype)
>
> CPU_FOREACH(cpu) {
> armcpu = ARM_CPU(cpu);
> - if (!armcpu->has_pmu ||
> + if (!armcpu->enable_pmu ||
> !kvm_arm_pmu_create(cpu, PPI(VIRTUAL_PMU_IRQ))) {
> return;
> }
> diff --git a/target-arm/cpu.c b/target-arm/cpu.c
> index ce8b8f4..f7daf81 100644
> --- a/target-arm/cpu.c
> +++ b/target-arm/cpu.c
> @@ -1412,6 +1412,7 @@ static const ARMCPUInfo arm_cpus[] = {
> };
>
> static Property arm_cpu_properties[] = {
> + DEFINE_PROP_BOOL("pmu", ARMCPU, enable_pmu, true),
> DEFINE_PROP_BOOL("start-powered-off", ARMCPU, start_powered_off, false),
> DEFINE_PROP_UINT32("psci-conduit", ARMCPU, psci_conduit, 0),
> DEFINE_PROP_UINT32("midr", ARMCPU, midr, 0),
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index 76d824d..f2341c0 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -579,8 +579,9 @@ struct ARMCPU {
> bool powered_off;
> /* CPU has security extension */
> bool has_el3;
> - /* CPU has PMU (Performance Monitor Unit) */
> - bool has_pmu;
> +
> + /* CPU has vPMU (Performance Monitor Unit) support */
> + bool enable_pmu;
>
> /* CPU has memory protection unit */
> bool has_mpu;
> diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c
> index 5faa76c..ca21670 100644
> --- a/target-arm/kvm64.c
> +++ b/target-arm/kvm64.c
> @@ -501,11 +501,11 @@ int kvm_arch_init_vcpu(CPUState *cs)
> if (!arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
> cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_EL1_32BIT;
> }
> - if (kvm_irqchip_in_kernel() &&
> - kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PMU_V3)) {
> - cpu->has_pmu = true;
> - cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PMU_V3;
> - }
> +
> + /* enable vPMU based on KVM mode and hardware capability */
> + cpu->enable_pmu &= (kvm_irqchip_in_kernel() &&
> + kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PMU_V3));
> + cpu->kvm_init_features[0] |= cpu->enable_pmu << KVM_ARM_VCPU_PMU_V3;
>
> /* Do KVM_ARM_VCPU_INIT ioctl */
> ret = kvm_arm_vcpu_init(cs);
>
--
Shannon
WARNING: multiple messages have this Message-ID (diff)
From: Shannon Zhao <zhaoshenglong@huawei.com>
To: Wei Huang <wei@redhat.com>, qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org, peter.maydell@linaro.org,
drjones@redhat.com, shannon.zhao@linaro.org, abologna@redhat.com
Subject: Re: [Qemu-devel] [PATCH RFC 1/1] arm64: add an option to turn on/off vpmu support
Date: Fri, 29 Jul 2016 08:59:58 +0800 [thread overview]
Message-ID: <579AAA8E.4060703@huawei.com> (raw)
In-Reply-To: <1469723896-28049-1-git-send-email-wei@redhat.com>
On 2016/7/29 0:38, Wei Huang wrote:
> This patch adds a pmu=[on/off] option to enable/disable vpmu support
> in guest vm. There are several reasons to justify this option. First
> vpmu can be problematic for cross-migration between different SoC as
> perf counters is architecture-dependent. It is more flexible to
> have an option to turn it on/off. Secondly it matches the -cpu pmu
> option in libivrt. This patch has been tested on both DT/ACPI modes.
>
> Signed-off-by: Wei Huang <wei@redhat.com>
Reviewed-by:Shannon Zhao <shannon.zhao@linaro.org>
> ---
> hw/arm/virt-acpi-build.c | 2 +-
> hw/arm/virt.c | 2 +-
> target-arm/cpu.c | 1 +
> target-arm/cpu.h | 5 +++--
> target-arm/kvm64.c | 10 +++++-----
> 5 files changed, 11 insertions(+), 9 deletions(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 28fc59c..dc5f66d 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -540,7 +540,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtGuestInfo *guest_info)
> gicc->uid = i;
> gicc->flags = cpu_to_le32(ACPI_GICC_ENABLED);
>
> - if (armcpu->has_pmu) {
> + if (armcpu->enable_pmu) {
> gicc->performance_interrupt = cpu_to_le32(PPI(VIRTUAL_PMU_IRQ));
> }
> }
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index a193b5a..6aea901 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -477,7 +477,7 @@ static void fdt_add_pmu_nodes(const VirtBoardInfo *vbi, int gictype)
>
> CPU_FOREACH(cpu) {
> armcpu = ARM_CPU(cpu);
> - if (!armcpu->has_pmu ||
> + if (!armcpu->enable_pmu ||
> !kvm_arm_pmu_create(cpu, PPI(VIRTUAL_PMU_IRQ))) {
> return;
> }
> diff --git a/target-arm/cpu.c b/target-arm/cpu.c
> index ce8b8f4..f7daf81 100644
> --- a/target-arm/cpu.c
> +++ b/target-arm/cpu.c
> @@ -1412,6 +1412,7 @@ static const ARMCPUInfo arm_cpus[] = {
> };
>
> static Property arm_cpu_properties[] = {
> + DEFINE_PROP_BOOL("pmu", ARMCPU, enable_pmu, true),
> DEFINE_PROP_BOOL("start-powered-off", ARMCPU, start_powered_off, false),
> DEFINE_PROP_UINT32("psci-conduit", ARMCPU, psci_conduit, 0),
> DEFINE_PROP_UINT32("midr", ARMCPU, midr, 0),
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index 76d824d..f2341c0 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -579,8 +579,9 @@ struct ARMCPU {
> bool powered_off;
> /* CPU has security extension */
> bool has_el3;
> - /* CPU has PMU (Performance Monitor Unit) */
> - bool has_pmu;
> +
> + /* CPU has vPMU (Performance Monitor Unit) support */
> + bool enable_pmu;
>
> /* CPU has memory protection unit */
> bool has_mpu;
> diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c
> index 5faa76c..ca21670 100644
> --- a/target-arm/kvm64.c
> +++ b/target-arm/kvm64.c
> @@ -501,11 +501,11 @@ int kvm_arch_init_vcpu(CPUState *cs)
> if (!arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
> cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_EL1_32BIT;
> }
> - if (kvm_irqchip_in_kernel() &&
> - kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PMU_V3)) {
> - cpu->has_pmu = true;
> - cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PMU_V3;
> - }
> +
> + /* enable vPMU based on KVM mode and hardware capability */
> + cpu->enable_pmu &= (kvm_irqchip_in_kernel() &&
> + kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PMU_V3));
> + cpu->kvm_init_features[0] |= cpu->enable_pmu << KVM_ARM_VCPU_PMU_V3;
>
> /* Do KVM_ARM_VCPU_INIT ioctl */
> ret = kvm_arm_vcpu_init(cs);
>
--
Shannon
next prev parent reply other threads:[~2016-07-29 1:03 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-28 16:38 [Qemu-arm] [PATCH RFC 1/1] arm64: add an option to turn on/off vpmu support Wei Huang
2016-07-28 16:38 ` [Qemu-devel] " Wei Huang
2016-07-29 0:59 ` Shannon Zhao [this message]
2016-07-29 0:59 ` Shannon Zhao
2016-07-29 6:54 ` [Qemu-arm] " Andrew Jones
2016-07-29 6:54 ` Andrew Jones
2016-07-29 15:07 ` [Qemu-arm] " Wei Huang
2016-07-29 15:07 ` Wei Huang
2016-07-29 15:29 ` [Qemu-arm] " Peter Maydell
2016-07-29 15:29 ` Peter Maydell
2016-08-01 12:04 ` [Qemu-arm] " Andrea Bolognani
2016-08-01 12:04 ` Andrea Bolognani
2016-08-01 13:08 ` [Qemu-arm] " Andrew Jones
2016-08-01 13:08 ` Andrew Jones
2016-08-01 13:16 ` [Qemu-arm] " Peter Maydell
2016-08-01 13:16 ` Peter Maydell
2016-08-01 13:26 ` [Qemu-arm] " Andrea Bolognani
2016-08-01 13:26 ` Andrea Bolognani
2016-08-01 13:32 ` [Qemu-arm] " Peter Maydell
2016-08-01 13:32 ` Peter Maydell
2016-08-01 14:55 ` [Qemu-arm] " Andrea Bolognani
2016-08-01 14:55 ` Andrea Bolognani
2016-08-13 6:06 ` [Qemu-arm] " Wei Huang
2016-08-13 6:06 ` Wei Huang
2016-08-15 9:24 ` [Qemu-arm] " Andrea Bolognani
2016-08-15 9:24 ` Andrea Bolognani
2016-07-29 7:57 ` [Qemu-arm] " Peter Maydell
2016-07-29 7:57 ` [Qemu-devel] " Peter Maydell
2016-07-29 15:08 ` [Qemu-arm] " Wei Huang
2016-07-29 15:08 ` [Qemu-devel] " Wei Huang
2016-07-29 15:25 ` [Qemu-arm] " Peter Maydell
2016-07-29 15:25 ` [Qemu-devel] " Peter Maydell
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