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* Frame buffer access performance
@ 2016-08-05  2:35 Enrico Weigelt, metux IT consult
  2016-08-05  8:15 ` Daniel Vetter
  0 siblings, 1 reply; 4+ messages in thread
From: Enrico Weigelt, metux IT consult @ 2016-08-05  2:35 UTC (permalink / raw)
  To: dri devel

Hi folks,


when putting pixels into an DRM framebuffer, should I do that in
bursts/blocks instead of byte-per-byte ? (eg. explicitly using
aligned 32bit ops).


--mtx
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^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Frame buffer access performance
  2016-08-05  2:35 Frame buffer access performance Enrico Weigelt, metux IT consult
@ 2016-08-05  8:15 ` Daniel Vetter
  2016-08-05  9:04   ` Enrico Weigelt, metux IT consult
  0 siblings, 1 reply; 4+ messages in thread
From: Daniel Vetter @ 2016-08-05  8:15 UTC (permalink / raw)
  To: Enrico Weigelt, metux IT consult; +Cc: dri devel

On Fri, Aug 05, 2016 at 04:35:25AM +0200, Enrico Weigelt, metux IT consult wrote:
> Hi folks,
> 
> 
> when putting pixels into an DRM framebuffer, should I do that in
> bursts/blocks instead of byte-per-byte ? (eg. explicitly using
> aligned 32bit ops).

There's a driver cap DRM_CAP_DUMB_PREFER_SHADOW for this. If set, render
into a shadow buffer and copy over in bursts, otherwise you can assume
that the memory is fully cpu cached and fast with random access. Note that
this is just for dumb buffers, which are explicitly not meant as the
fastest memory, but the most convenient (i.e. untiled).
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Frame buffer access performance
  2016-08-05  8:15 ` Daniel Vetter
@ 2016-08-05  9:04   ` Enrico Weigelt, metux IT consult
  2016-08-05  9:23     ` Daniel Vetter
  0 siblings, 1 reply; 4+ messages in thread
From: Enrico Weigelt, metux IT consult @ 2016-08-05  9:04 UTC (permalink / raw)
  To: Daniel Vetter; +Cc: dri devel

On 05.08.2016 10:15, Daniel Vetter wrote:

Hi,

> There's a driver cap DRM_CAP_DUMB_PREFER_SHADOW for this. If set,
> render into a shadow buffer and copy over in bursts, otherwise you
> can assume that the memory is fully cpu cached and fast with random
> access.

aaaah!

nekrad@orion:~/src/linux$ git grep prefer_shadow drivers/gpu/drm/i915
drivers/gpu/drm/i915/intel_display.c:   dev->mode_config.prefer_shadow = 1;

IOW: i915 driver (my notebook here has an i915) sets that flag, so
it seems my guess is right.

Do we already have some suitable double-buffer helpers, which can detect
changed regions and copy over in bursts, so userland doesn't
need extra logic for that ? (hmm, maybe some cow + pagefault magic?)

... seems I need to give it some further thoughts ...


--mtx

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^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Frame buffer access performance
  2016-08-05  9:04   ` Enrico Weigelt, metux IT consult
@ 2016-08-05  9:23     ` Daniel Vetter
  0 siblings, 0 replies; 4+ messages in thread
From: Daniel Vetter @ 2016-08-05  9:23 UTC (permalink / raw)
  To: Enrico Weigelt, metux IT consult; +Cc: dri devel

On Fri, Aug 05, 2016 at 11:04:21AM +0200, Enrico Weigelt, metux IT consult wrote:
> On 05.08.2016 10:15, Daniel Vetter wrote:
> 
> Hi,
> 
> > There's a driver cap DRM_CAP_DUMB_PREFER_SHADOW for this. If set,
> > render into a shadow buffer and copy over in bursts, otherwise you
> > can assume that the memory is fully cpu cached and fast with random
> > access.
> 
> aaaah!
> 
> nekrad@orion:~/src/linux$ git grep prefer_shadow drivers/gpu/drm/i915
> drivers/gpu/drm/i915/intel_display.c:   dev->mode_config.prefer_shadow = 1;
> 
> IOW: i915 driver (my notebook here has an i915) sets that flag, so
> it seems my guess is right.
> 
> Do we already have some suitable double-buffer helpers, which can detect
> changed regions and copy over in bursts, so userland doesn't
> need extra logic for that ? (hmm, maybe some cow + pagefault magic?)
> 
> ... seems I need to give it some further thoughts ...

DIRTY_FB ioctl. But that's for other manual uplaod displays and similar
things.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2016-08-05  9:23 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-08-05  2:35 Frame buffer access performance Enrico Weigelt, metux IT consult
2016-08-05  8:15 ` Daniel Vetter
2016-08-05  9:04   ` Enrico Weigelt, metux IT consult
2016-08-05  9:23     ` Daniel Vetter

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