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From: Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>
To: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Wenrui Li <wenrui.li-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
	Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>,
	Brian Norris
	<briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Subject: Re: [PATCH v4 2/2] phy: add a driver for the Rockchip SoC internal PCIe PHY
Date: Fri, 19 Aug 2016 19:05:43 +0530	[thread overview]
Message-ID: <57B70B2F.5090302@ti.com> (raw)
In-Reply-To: <1469755326-10263-2-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

Hi,

On Friday 29 July 2016 06:52 AM, Shawn Lin wrote:
> This patch to add a generic PHY driver for rockchip PCIe PHY.
> Access the PHY via registers provided by GRF (general register
> files) module.
> 
> Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> 
> ---
> 
> Changes in v4:
> - remove laneoff symbol as we still fail to get a workable solution
>   except for exporting symbol. But I will be back with some other possible
>   routine once finished.
> 
> Changes in v3: None
> Changes in v2: None
> 
>  drivers/phy/Kconfig             |   7 +
>  drivers/phy/Makefile            |   1 +
>  drivers/phy/phy-rockchip-pcie.c | 357 ++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 365 insertions(+)
>  create mode 100644 drivers/phy/phy-rockchip-pcie.c
> 
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 02afc624..824b568 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -371,6 +371,13 @@ config PHY_ROCKCHIP_DP
>  	help
>  	  Enable this to support the Rockchip Display Port PHY.
>  
> +config PHY_ROCKCHIP_PCIE
> +	tristate "Rockchip PCIe PHY Driver"
> +	depends on ARCH_ROCKCHIP && OF

add COMPILE_TEST here. I'm planning to fix this for other drivers as well in
drivers/phy.
> +	select GENERIC_PHY

select MFD_SYSCON as well.

Thanks
Kishon

WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Shawn Lin <shawn.lin@rock-chips.com>
Cc: <linux-kernel@vger.kernel.org>,
	<linux-rockchip@lists.infradead.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Doug Anderson <dianders@chromium.org>,
	Brian Norris <briannorris@chromium.org>,
	Wenrui Li <wenrui.li@rock-chips.com>,
	Rob Herring <robh+dt@kernel.org>, <devicetree@vger.kernel.org>
Subject: Re: [PATCH v4 2/2] phy: add a driver for the Rockchip SoC internal PCIe PHY
Date: Fri, 19 Aug 2016 19:05:43 +0530	[thread overview]
Message-ID: <57B70B2F.5090302@ti.com> (raw)
In-Reply-To: <1469755326-10263-2-git-send-email-shawn.lin@rock-chips.com>

Hi,

On Friday 29 July 2016 06:52 AM, Shawn Lin wrote:
> This patch to add a generic PHY driver for rockchip PCIe PHY.
> Access the PHY via registers provided by GRF (general register
> files) module.
> 
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> 
> ---
> 
> Changes in v4:
> - remove laneoff symbol as we still fail to get a workable solution
>   except for exporting symbol. But I will be back with some other possible
>   routine once finished.
> 
> Changes in v3: None
> Changes in v2: None
> 
>  drivers/phy/Kconfig             |   7 +
>  drivers/phy/Makefile            |   1 +
>  drivers/phy/phy-rockchip-pcie.c | 357 ++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 365 insertions(+)
>  create mode 100644 drivers/phy/phy-rockchip-pcie.c
> 
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 02afc624..824b568 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -371,6 +371,13 @@ config PHY_ROCKCHIP_DP
>  	help
>  	  Enable this to support the Rockchip Display Port PHY.
>  
> +config PHY_ROCKCHIP_PCIE
> +	tristate "Rockchip PCIe PHY Driver"
> +	depends on ARCH_ROCKCHIP && OF

add COMPILE_TEST here. I'm planning to fix this for other drivers as well in
drivers/phy.
> +	select GENERIC_PHY

select MFD_SYSCON as well.

Thanks
Kishon

  parent reply	other threads:[~2016-08-19 13:35 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-29  1:22 [PATCH v4 1/2] Documentation: bindings: add dt documentation for Rockchip PCIe PHY Shawn Lin
     [not found] ` <1469755326-10263-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-07-29  1:22   ` [PATCH v4 2/2] phy: add a driver for the Rockchip SoC internal " Shawn Lin
2016-07-29  1:22     ` Shawn Lin
2016-08-17  8:12     ` Shawn Lin
     [not found]     ` <1469755326-10263-2-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-08-19 13:35       ` Kishon Vijay Abraham I [this message]
2016-08-19 13:35         ` Kishon Vijay Abraham I
2016-07-29 21:34   ` [PATCH v4 1/2] Documentation: bindings: add dt documentation for Rockchip " Rob Herring
2016-07-29 21:34     ` Rob Herring
2016-08-01  3:03     ` Shawn Lin
2016-08-01  3:03       ` Shawn Lin

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