[PATCH 1/5] drm/amdgpu:add switch buffer to end of CS

[PATCH 1/5] drm/amdgpu:add switch buffer to end of CS

[Monk Liu]

sync switch buffer scheme with windows kmd for gfx v8,
Now always and only insert one switch buffer to the
end of CS.

Change-Id: Ief8539b2ad91ccb38b9adbfb54e27d8282f3a3bd
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h    |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c |  2 ++
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 13 +++++++------
 3 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index cb0098a..a935831 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -338,6 +338,7 @@ struct amdgpu_ring_funcs {
 	void (*end_use)(struct amdgpu_ring *ring);
 	void (*emit_wreg) (struct amdgpu_ring *ring, uint32_t offset, uint32_t val);
 	void (*emit_rreg) (struct amdgpu_ring *ring, uint32_t offset);
+	void (*emit_switch_buffer) (struct amdgpu_ring *ring);
 };
 
 /*
@@ -2372,6 +2373,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
 #define amdgpu_ring_emit_hdp_invalidate(r) (r)->funcs->emit_hdp_invalidate((r))
 #define amdgpu_ring_emit_wreg(r, i, v) (r)->funcs->emit_wreg((r), (i), (v))
 #define amdgpu_ring_emit_rreg(r, i) (r)->funcs->emit_rreg((r), (i))
+#define amdgpu_ring_emit_switch_buffer(r) (r)->funcs->emit_switch_buffer((r))
 #define amdgpu_ring_pad_ib(r, ib) ((r)->funcs->pad_ib((r), (ib)))
 #define amdgpu_ring_init_cond_exec(r) (r)->funcs->init_cond_exec((r))
 #define amdgpu_ring_patch_cond_exec(r,o) (r)->funcs->patch_cond_exec((r),(o))
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index a31d7ef..029ee79 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -210,6 +210,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
 		amdgpu_ring_patch_cond_exec(ring, patch_offset);
 
 	ring->current_ctx = ctx;
+	if (ring->funcs->emit_switch_buffer)
+		amdgpu_ring_emit_switch_buffer(ring);
 	amdgpu_ring_commit(ring);
 	return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index dfa2288..26fced0 100755
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -5936,12 +5936,6 @@ static void gfx_v8_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
 {
 	u32 header, control = 0;
 
-	/* insert SWITCH_BUFFER packet before first IB in the ring frame */
-	if (ctx_switch) {
-		amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
-		amdgpu_ring_write(ring, 0);
-	}
-
 	if (ib->flags & AMDGPU_IB_FLAG_CE)
 		header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);
 	else
@@ -6170,6 +6164,12 @@ static void gfx_v8_0_ring_emit_wreg_kiq(struct amdgpu_ring *ring, u32 idx, u32 v
 	amdgpu_ring_write(ring, val);
 }
 
+static void gfx_v8_ring_emit_sb(struct amdgpu_ring *ring)
+{
+	amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
+	amdgpu_ring_write(ring, 0);
+}
+
 static void gfx_v8_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev,
 						 enum amdgpu_interrupt_state state)
 {
@@ -6477,6 +6477,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = {
 	.test_ib = gfx_v8_0_ring_test_ib,
 	.insert_nop = amdgpu_ring_insert_nop,
 	.pad_ib = amdgpu_ring_generic_pad_ib,
+	.emit_switch_buffer = gfx_v8_ring_emit_sb,
 };
 
 static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = {
-- 
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH 2/5] drm/amdgpu:new method to sync ce&de

[Monk Liu]

CE & DE can have most up to 128dw as the gap between them
so to sync CE nad DE we don't need double SWITCH_BUFFERs any
more, which is urgly and harm performance, we only need
insert 128NOP after VM flush to prevent CE vm fault.

Change-Id: Ibec954ce4c817ad7d3bce89c2bcb95b6c6bb5411
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 15 +++------------
 1 file changed, 3 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 26fced0..af354a8 100755
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -6005,14 +6005,6 @@ static void gfx_v8_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
 	amdgpu_ring_write(ring, seq);
 	amdgpu_ring_write(ring, 0xffffffff);
 	amdgpu_ring_write(ring, 4); /* poll interval */
-
-	if (usepfp) {
-		/* synce CE with ME to prevent CE fetch CEIB before context switch done */
-		amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
-		amdgpu_ring_write(ring, 0);
-		amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
-		amdgpu_ring_write(ring, 0);
-	}
 }
 
 static void gfx_v8_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
@@ -6059,11 +6051,10 @@ static void gfx_v8_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
 		/* sync PFP to ME, otherwise we might get invalid PFP reads */
 		amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
 		amdgpu_ring_write(ring, 0x0);
-		amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
-		amdgpu_ring_write(ring, 0);
-		amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
-		amdgpu_ring_write(ring, 0);
 	}
+
+	/* GFX8 emits 128 dw nop to prevent CE access VM before vm_flush finish */
+	amdgpu_ring_insert_nop(ring, 128);
 }
 
 static u32 gfx_v8_0_ring_get_rptr_compute(struct amdgpu_ring *ring)
-- 
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH 3/5] drm/amdgpu:fix RB cost calculator

[Monk Liu]

Change-Id: Ie3e4587ed49c487c562f45a99f236a76727ace1e
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 029ee79..6ad45fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -151,7 +151,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
 		return -EINVAL;
 	}
 
-	r = amdgpu_ring_alloc(ring, 256 * num_ibs);
+	r = amdgpu_ring_alloc(ring, 256 + (num_ibs << 4));
 	if (r) {
 		dev_err(adev->dev, "scheduling IB failed (%d).\n", r);
 		return r;
-- 
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 3/5] drm/amdgpu:fix RB cost calculator

[Andy Furniss]

This has just gone into drm-next-4.9-wip and caused lots of logging noise.

Seems to work OK though.

Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_fence_gfx [amdgpu]] 
*ERROR* amdgpu: writing more dwords to the ring than expected!
Sep 14 23:18:38 ph4 last message repeated 11 times
Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR* 
amdgpu: writing more dwords to the ring than expected!
Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR* 
amdgpu: writing more dwords to the ring than expected!
Sep 14 23:18:38 ph4 kernel: [drm:amdgpu_ring_insert_nop [amdgpu]] 
*ERROR* amdgpu: writing more dwords to the ring than expected!
Sep 14 23:18:38 ph4 last message repeated 10 times
Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_ib_gfx [amdgpu]] 
*ERROR* amdgpu: writing more dwords to the ring than expected!
Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_ib_gfx [amdgpu]] 
*ERROR* amdgpu: writing more dwords to the ring than expected!
Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_hdp_invalidate 
[amdgpu]] *ERROR* amdgpu: writing more dwords to the ring than expected!
Sep 14 23:18:38 ph4 last message repeated 4 times
Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_fence_gfx [amdgpu]] 
*ERROR* amdgpu: writing more dwords to the ring than expected!
Sep 14 23:18:38 ph4 last message repeated 11 times
Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR* 
amdgpu: writing more dwords to the ring than expected!
Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR* 
amdgpu: writing more dwords to the ring than expected!
Sep 14 23:18:38 ph4 kernel: [drm:amdgpu_ring_insert_nop [amdgpu]] 
*ERROR* amdgpu: writing more dwords to the ring than expected!
Sep 14 23:18:38 ph4 last message repeated 10 times

Monk Liu wrote:
> Change-Id: Ie3e4587ed49c487c562f45a99f236a76727ace1e
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> index 029ee79..6ad45fa 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> @@ -151,7 +151,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
>   		return -EINVAL;
>   	}
>
> -	r = amdgpu_ring_alloc(ring, 256 * num_ibs);
> +	r = amdgpu_ring_alloc(ring, 256 + (num_ibs << 4));
>   	if (r) {
>   		dev_err(adev->dev, "scheduling IB failed (%d).\n", r);
>   		return r;
>

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 3/5] drm/amdgpu:fix RB cost calculator

[Christian König]

256dw for the header are probably not enough.

Since we now uses NOPs for the CE/DE sync we only need 256dw for that 
alone. I suggest to raise that to 512.

Christian.

Am 15.09.2016 um 00:24 schrieb Andy Furniss:
> This has just gone into drm-next-4.9-wip and caused lots of logging 
> noise.
>
> Seems to work OK though.
>
> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_fence_gfx 
> [amdgpu]] *ERROR* amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 last message repeated 11 times
> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR* 
> amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR* 
> amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 kernel: [drm:amdgpu_ring_insert_nop [amdgpu]] 
> *ERROR* amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 last message repeated 10 times
> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_ib_gfx [amdgpu]] 
> *ERROR* amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_ib_gfx [amdgpu]] 
> *ERROR* amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_hdp_invalidate 
> [amdgpu]] *ERROR* amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 last message repeated 4 times
> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_fence_gfx 
> [amdgpu]] *ERROR* amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 last message repeated 11 times
> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR* 
> amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR* 
> amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 kernel: [drm:amdgpu_ring_insert_nop [amdgpu]] 
> *ERROR* amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 last message repeated 10 times
>
> Monk Liu wrote:
>> Change-Id: Ie3e4587ed49c487c562f45a99f236a76727ace1e
>> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> index 029ee79..6ad45fa 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> @@ -151,7 +151,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, 
>> unsigned num_ibs,
>>           return -EINVAL;
>>       }
>>
>> -    r = amdgpu_ring_alloc(ring, 256 * num_ibs);
>> +    r = amdgpu_ring_alloc(ring, 256 + (num_ibs << 4));
>>       if (r) {
>>           dev_err(adev->dev, "scheduling IB failed (%d).\n", r);
>>           return r;
>>
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx


_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

RE: [PATCH 3/5] drm/amdgpu:fix RB cost calculator

[Liu, Monk]

Is that applied to all ring ?

Cuz seems only GFX ring each lot of dw per submit ... 

BR Monk

-----Original Message-----
From: Christian König [mailto:deathsimple@vodafone.de] 
Sent: Thursday, September 15, 2016 3:24 PM
To: Andy Furniss <adf.lists@gmail.com>; Liu, Monk <Monk.Liu@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/5] drm/amdgpu:fix RB cost calculator

256dw for the header are probably not enough.

Since we now uses NOPs for the CE/DE sync we only need 256dw for that alone. I suggest to raise that to 512.

Christian.

Am 15.09.2016 um 00:24 schrieb Andy Furniss:
> This has just gone into drm-next-4.9-wip and caused lots of logging 
> noise.
>
> Seems to work OK though.
>
> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_fence_gfx 
> [amdgpu]] *ERROR* amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 last message repeated 11 times Sep 14 23:18:38 ph4 
> kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR*
> amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR*
> amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 kernel: [drm:amdgpu_ring_insert_nop [amdgpu]]
> *ERROR* amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 last message repeated 10 times Sep 14 23:18:38 ph4 
> kernel: [drm:gfx_v8_0_ring_emit_ib_gfx [amdgpu]]
> *ERROR* amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_ib_gfx [amdgpu]]
> *ERROR* amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_hdp_invalidate
> [amdgpu]] *ERROR* amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 last message repeated 4 times Sep 14 23:18:38 ph4 
> kernel: [drm:gfx_v8_0_ring_emit_fence_gfx [amdgpu]] *ERROR* amdgpu: 
> writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 last message repeated 11 times Sep 14 23:18:38 ph4 
> kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR*
> amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR*
> amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 kernel: [drm:amdgpu_ring_insert_nop [amdgpu]]
> *ERROR* amdgpu: writing more dwords to the ring than expected!
> Sep 14 23:18:38 ph4 last message repeated 10 times
>
> Monk Liu wrote:
>> Change-Id: Ie3e4587ed49c487c562f45a99f236a76727ace1e
>> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> index 029ee79..6ad45fa 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> @@ -151,7 +151,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, 
>> unsigned num_ibs,
>>           return -EINVAL;
>>       }
>>
>> -    r = amdgpu_ring_alloc(ring, 256 * num_ibs);
>> +    r = amdgpu_ring_alloc(ring, 256 + (num_ibs << 4));
>>       if (r) {
>>           dev_err(adev->dev, "scheduling IB failed (%d).\n", r);
>>           return r;
>>
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx


_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 3/5] drm/amdgpu:fix RB cost calculator

[Christian König]

Alex fixed this up in a rather complete series for all engines/rings.

Christian.

Am 18.09.2016 um 05:47 schrieb Liu, Monk:
> Is that applied to all ring ?
>
> Cuz seems only GFX ring each lot of dw per submit ...
>
> BR Monk
>
> -----Original Message-----
> From: Christian König [mailto:deathsimple@vodafone.de]
> Sent: Thursday, September 15, 2016 3:24 PM
> To: Andy Furniss <adf.lists@gmail.com>; Liu, Monk <Monk.Liu@amd.com>; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 3/5] drm/amdgpu:fix RB cost calculator
>
> 256dw for the header are probably not enough.
>
> Since we now uses NOPs for the CE/DE sync we only need 256dw for that alone. I suggest to raise that to 512.
>
> Christian.
>
> Am 15.09.2016 um 00:24 schrieb Andy Furniss:
>> This has just gone into drm-next-4.9-wip and caused lots of logging
>> noise.
>>
>> Seems to work OK though.
>>
>> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_fence_gfx
>> [amdgpu]] *ERROR* amdgpu: writing more dwords to the ring than expected!
>> Sep 14 23:18:38 ph4 last message repeated 11 times Sep 14 23:18:38 ph4
>> kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR*
>> amdgpu: writing more dwords to the ring than expected!
>> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR*
>> amdgpu: writing more dwords to the ring than expected!
>> Sep 14 23:18:38 ph4 kernel: [drm:amdgpu_ring_insert_nop [amdgpu]]
>> *ERROR* amdgpu: writing more dwords to the ring than expected!
>> Sep 14 23:18:38 ph4 last message repeated 10 times Sep 14 23:18:38 ph4
>> kernel: [drm:gfx_v8_0_ring_emit_ib_gfx [amdgpu]]
>> *ERROR* amdgpu: writing more dwords to the ring than expected!
>> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_ib_gfx [amdgpu]]
>> *ERROR* amdgpu: writing more dwords to the ring than expected!
>> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_0_ring_emit_hdp_invalidate
>> [amdgpu]] *ERROR* amdgpu: writing more dwords to the ring than expected!
>> Sep 14 23:18:38 ph4 last message repeated 4 times Sep 14 23:18:38 ph4
>> kernel: [drm:gfx_v8_0_ring_emit_fence_gfx [amdgpu]] *ERROR* amdgpu:
>> writing more dwords to the ring than expected!
>> Sep 14 23:18:38 ph4 last message repeated 11 times Sep 14 23:18:38 ph4
>> kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR*
>> amdgpu: writing more dwords to the ring than expected!
>> Sep 14 23:18:38 ph4 kernel: [drm:gfx_v8_ring_emit_sb [amdgpu]] *ERROR*
>> amdgpu: writing more dwords to the ring than expected!
>> Sep 14 23:18:38 ph4 kernel: [drm:amdgpu_ring_insert_nop [amdgpu]]
>> *ERROR* amdgpu: writing more dwords to the ring than expected!
>> Sep 14 23:18:38 ph4 last message repeated 10 times
>>
>> Monk Liu wrote:
>>> Change-Id: Ie3e4587ed49c487c562f45a99f236a76727ace1e
>>> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
>>> ---
>>>    drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
>>>    1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>>> index 029ee79..6ad45fa 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>>> @@ -151,7 +151,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring,
>>> unsigned num_ibs,
>>>            return -EINVAL;
>>>        }
>>>
>>> -    r = amdgpu_ring_alloc(ring, 256 * num_ibs);
>>> +    r = amdgpu_ring_alloc(ring, 256 + (num_ibs << 4));
>>>        if (r) {
>>>            dev_err(adev->dev, "scheduling IB failed (%d).\n", r);
>>>            return r;
>>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx


_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH 4/5] drm/amdgpu:change job->ctx field name

[Monk Liu]

job->ctx actually is a fence_context of the entity
it belongs to, naming it as ctx is too vague, and
we'll need add amdgpu_ctx into the job structure
later.

Change-Id: I71e73912e26372639ea44a18d9e36d58d936f19a
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c  | 12 ++++++------
 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c |  2 +-
 4 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index a935831..9132719 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1332,7 +1332,7 @@ struct amdgpu_job {
 	struct fence		*fence; /* the hw fence */
 	uint32_t		num_ibs;
 	void			*owner;
-	uint64_t		ctx;
+	uint64_t		fence_ctx; /* the fence_context this job uses */
 	bool                    vm_needs_flush;
 	unsigned		vm_id;
 	uint64_t		vm_pd_addr;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index d8fe582..78d3831 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -850,7 +850,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
 	}
 
 	job->owner = p->filp;
-	job->ctx = entity->fence_context;
+	job->fence_ctx = entity->fence_context;
 	p->fence = fence_get(&job->base.s_fence->finished);
 	cs->out.handle = amdgpu_ctx_add_fence(p->ctx, ring, p->fence);
 	job->uf_sequence = cs->out.handle;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 6ad45fa..9dffe36 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -124,7 +124,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
 	bool skip_preamble, need_ctx_switch;
 	unsigned patch_offset = ~0;
 	struct amdgpu_vm *vm;
-	uint64_t ctx;
+	uint64_t fence_ctx;
 
 	unsigned i;
 	int r = 0;
@@ -135,10 +135,10 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
 	/* ring tests don't use a job */
 	if (job) {
 		vm = job->vm;
-		ctx = job->ctx;
+		fence_ctx = job->fence_ctx;
 	} else {
 		vm = NULL;
-		ctx = 0;
+		fence_ctx = 0;
 	}
 
 	if (!ring->ready) {
@@ -174,8 +174,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
 	/* always set cond_exec_polling to CONTINUE */
 	*ring->cond_exe_cpu_addr = 1;
 
-	skip_preamble = ring->current_ctx == ctx;
-	need_ctx_switch = ring->current_ctx != ctx;
+	skip_preamble = ring->current_ctx == fence_ctx;
+	need_ctx_switch = ring->current_ctx != fence_ctx;
 	for (i = 0; i < num_ibs; ++i) {
 		ib = &ibs[i];
 
@@ -209,7 +209,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
 	if (patch_offset != ~0 && ring->funcs->patch_cond_exec)
 		amdgpu_ring_patch_cond_exec(ring, patch_offset);
 
-	ring->current_ctx = ctx;
+	ring->current_ctx = fence_ctx;
 	if (ring->funcs->emit_switch_buffer)
 		amdgpu_ring_emit_switch_buffer(ring);
 	amdgpu_ring_commit(ring);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index 6674d40..ac8d401 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -124,7 +124,7 @@ int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
 		return r;
 
 	job->owner = owner;
-	job->ctx = entity->fence_context;
+	job->fence_ctx = entity->fence_context;
 	*f = fence_get(&job->base.s_fence->finished);
 	amdgpu_job_free_resources(job);
 	amd_sched_entity_push_job(&job->base);
-- 
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 4/5] drm/amdgpu:change job->ctx field name

[Christian König]

Am 26.08.2016 um 08:39 schrieb Monk Liu:
> job->ctx actually is a fence_context of the entity
> it belongs to, naming it as ctx is too vague, and
> we'll need add amdgpu_ctx into the job structure
> later.
>
> Change-Id: I71e73912e26372639ea44a18d9e36d58d936f19a
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  2 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  |  2 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c  | 12 ++++++------
>   drivers/gpu/drm/amd/amdgpu/amdgpu_job.c |  2 +-
>   4 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index a935831..9132719 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1332,7 +1332,7 @@ struct amdgpu_job {
>   	struct fence		*fence; /* the hw fence */
>   	uint32_t		num_ibs;
>   	void			*owner;
> -	uint64_t		ctx;
> +	uint64_t		fence_ctx; /* the fence_context this job uses */
>   	bool                    vm_needs_flush;
>   	unsigned		vm_id;
>   	uint64_t		vm_pd_addr;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> index d8fe582..78d3831 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> @@ -850,7 +850,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
>   	}
>   
>   	job->owner = p->filp;
> -	job->ctx = entity->fence_context;
> +	job->fence_ctx = entity->fence_context;
>   	p->fence = fence_get(&job->base.s_fence->finished);
>   	cs->out.handle = amdgpu_ctx_add_fence(p->ctx, ring, p->fence);
>   	job->uf_sequence = cs->out.handle;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> index 6ad45fa..9dffe36 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> @@ -124,7 +124,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
>   	bool skip_preamble, need_ctx_switch;
>   	unsigned patch_offset = ~0;
>   	struct amdgpu_vm *vm;
> -	uint64_t ctx;
> +	uint64_t fence_ctx;
>   
>   	unsigned i;
>   	int r = 0;
> @@ -135,10 +135,10 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
>   	/* ring tests don't use a job */
>   	if (job) {
>   		vm = job->vm;
> -		ctx = job->ctx;
> +		fence_ctx = job->fence_ctx;
>   	} else {
>   		vm = NULL;
> -		ctx = 0;
> +		fence_ctx = 0;
>   	}
>   
>   	if (!ring->ready) {
> @@ -174,8 +174,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
>   	/* always set cond_exec_polling to CONTINUE */
>   	*ring->cond_exe_cpu_addr = 1;
>   
> -	skip_preamble = ring->current_ctx == ctx;
> -	need_ctx_switch = ring->current_ctx != ctx;
> +	skip_preamble = ring->current_ctx == fence_ctx;
> +	need_ctx_switch = ring->current_ctx != fence_ctx;
>   	for (i = 0; i < num_ibs; ++i) {
>   		ib = &ibs[i];
>   
> @@ -209,7 +209,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
>   	if (patch_offset != ~0 && ring->funcs->patch_cond_exec)
>   		amdgpu_ring_patch_cond_exec(ring, patch_offset);
>   
> -	ring->current_ctx = ctx;
> +	ring->current_ctx = fence_ctx;
>   	if (ring->funcs->emit_switch_buffer)
>   		amdgpu_ring_emit_switch_buffer(ring);
>   	amdgpu_ring_commit(ring);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> index 6674d40..ac8d401 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> @@ -124,7 +124,7 @@ int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
>   		return r;
>   
>   	job->owner = owner;
> -	job->ctx = entity->fence_context;
> +	job->fence_ctx = entity->fence_context;
>   	*f = fence_get(&job->base.s_fence->finished);
>   	amdgpu_job_free_resources(job);
>   	amd_sched_entity_push_job(&job->base);


_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH 5/5] drm/amdgpu:implement CONTEXT_CONTROL

[Monk Liu]

use CONTEXT_CONTROL package to dynamically skip
preamble IB and other load_xxx command in sequence.

Change-Id: I4b87ca84ea8c11ba4f7fb4c0e8a5be537ccde851
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h    |  9 +++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 12 ++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 16 +++++++++-------
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 32 ++++++++++++++++++++++++++++++++
 4 files changed, 62 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 9132719..a9dfeb5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -339,6 +339,7 @@ struct amdgpu_ring_funcs {
 	void (*emit_wreg) (struct amdgpu_ring *ring, uint32_t offset, uint32_t val);
 	void (*emit_rreg) (struct amdgpu_ring *ring, uint32_t offset);
 	void (*emit_switch_buffer) (struct amdgpu_ring *ring);
+	void (*emit_cntxcntl) (struct amdgpu_ring *ring, uint32_t flags);
 };
 
 /*
@@ -1050,6 +1051,7 @@ struct amdgpu_ctx {
 	spinlock_t		ring_lock;
 	struct fence            **fences;
 	struct amdgpu_ctx_ring	rings[AMDGPU_MAX_RINGS];
+	bool preamble_presented;
 };
 
 struct amdgpu_ctx_mgr {
@@ -1320,8 +1322,13 @@ struct amdgpu_cs_parser {
 
 	/* user fence */
 	struct amdgpu_bo_list_entry	uf_entry;
+	bool preamble_present; /* True means this command submit involves a preamble IB */
 };
 
+#define PREAMBLE_IB_PRESENT 		(1 << 0) /* bit set means command submit involves a preamble IB */
+#define PREAMBLE_IB_PRESENT_FIRST	(1 << 1) /* bit set means preamble IB is first presented in belonging context */
+#define HAVE_CTX_SWITCH		(1 << 2) /* bit set means context switch occured */
+
 struct amdgpu_job {
 	struct amd_sched_job    base;
 	struct amdgpu_device	*adev;
@@ -1330,6 +1337,7 @@ struct amdgpu_job {
 	struct amdgpu_sync	sync;
 	struct amdgpu_ib	*ibs;
 	struct fence		*fence; /* the hw fence */
+	uint32_t		preamble_status;
 	uint32_t		num_ibs;
 	void			*owner;
 	uint64_t		fence_ctx; /* the fence_context this job uses */
@@ -2374,6 +2382,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
 #define amdgpu_ring_emit_wreg(r, i, v) (r)->funcs->emit_wreg((r), (i), (v))
 #define amdgpu_ring_emit_rreg(r, i) (r)->funcs->emit_rreg((r), (i))
 #define amdgpu_ring_emit_switch_buffer(r) (r)->funcs->emit_switch_buffer((r))
+#define amdgpu_ring_emit_cntxcntl(r, d) (r)->funcs->emit_cntxcntl((r), (d))
 #define amdgpu_ring_pad_ib(r, ib) ((r)->funcs->pad_ib((r), (ib)))
 #define amdgpu_ring_init_cond_exec(r) (r)->funcs->init_cond_exec((r))
 #define amdgpu_ring_patch_cond_exec(r,o) (r)->funcs->patch_cond_exec((r),(o))
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 78d3831..f2d739a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -711,6 +711,9 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
 		if (r)
 			return r;
 
+		if (ib->flags & AMDGPU_IB_FLAG_PREAMBLE)
+			parser->preamble_present = true;
+
 		if (parser->job->ring && parser->job->ring != ring)
 			return -EINVAL;
 
@@ -849,6 +852,12 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
 		return r;
 	}
 
+	if (p->preamble_present) {
+		job->preamble_status |= PREAMBLE_IB_PRESENT;
+		if (!p->ctx->preamble_presented)
+			job->preamble_status |= PREAMBLE_IB_PRESENT_FIRST;
+	}
+
 	job->owner = p->filp;
 	job->fence_ctx = entity->fence_context;
 	p->fence = fence_get(&job->base.s_fence->finished);
@@ -859,6 +868,9 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
 	trace_amdgpu_cs_ioctl(job);
 	amd_sched_entity_push_job(&job->base);
 
+	if (p->preamble_present)
+		p->ctx->preamble_presented = true;
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 9dffe36..94281c3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -121,10 +121,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
 {
 	struct amdgpu_device *adev = ring->adev;
 	struct amdgpu_ib *ib = &ibs[0];
-	bool skip_preamble, need_ctx_switch;
+	bool need_ctx_switch;
 	unsigned patch_offset = ~0;
 	struct amdgpu_vm *vm;
 	uint64_t fence_ctx;
+	uint32_t status = 0;
 
 	unsigned i;
 	int r = 0;
@@ -174,15 +175,16 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
 	/* always set cond_exec_polling to CONTINUE */
 	*ring->cond_exe_cpu_addr = 1;
 
-	skip_preamble = ring->current_ctx == fence_ctx;
 	need_ctx_switch = ring->current_ctx != fence_ctx;
+	if (job && ring->funcs->emit_cntxcntl) {
+		if (need_ctx_switch)
+			status |= HAVE_CTX_SWITCH;
+		status |= job->preamble_status;
+		amdgpu_ring_emit_cntxcntl(ring, status);
+	}
+
 	for (i = 0; i < num_ibs; ++i) {
 		ib = &ibs[i];
-
-		/* drop preamble IBs if we don't have a context switch */
-		if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && skip_preamble)
-			continue;
-
 		amdgpu_ring_emit_ib(ring, ib, job ? job->vm_id : 0,
 				    need_ctx_switch);
 		need_ctx_switch = false;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index af354a8..c91c8a5 100755
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -6161,6 +6161,36 @@ static void gfx_v8_ring_emit_sb(struct amdgpu_ring *ring)
 	amdgpu_ring_write(ring, 0);
 }
 
+static void gfx_v8_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags)
+{
+	uint32_t dw2 = 0;
+
+	dw2 |= 0x80000000; /* set load_enable otherwise this package is just NOPs */
+	if (flags & HAVE_CTX_SWITCH) {
+		/* set load_global_config & load_global_uconfig */
+		dw2 |= 0x8001;
+		/* set load_cs_sh_regs */
+		dw2 |= 0x01000000;
+		/* set load_per_context_state & load_gfx_sh_regs for GFX */
+		if (ring->type != AMDGPU_RING_TYPE_COMPUTE)
+			dw2 |= 0x10002;
+
+		/* set load_ce_ram if preamble presented */
+		if (PREAMBLE_IB_PRESENT & flags)
+			dw2 |= 0x10000000;
+	} else {
+		/* still load_ce_ram if this is the first time preamble presented
+		 * although there is no context switch happens.
+		 */
+		if (PREAMBLE_IB_PRESENT_FIRST & flags)
+			dw2 |= 0x10000000;
+	}
+
+	amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
+	amdgpu_ring_write(ring, dw2);
+	amdgpu_ring_write(ring, 0);
+}
+
 static void gfx_v8_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev,
 						 enum amdgpu_interrupt_state state)
 {
@@ -6469,6 +6499,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = {
 	.insert_nop = amdgpu_ring_insert_nop,
 	.pad_ib = amdgpu_ring_generic_pad_ib,
 	.emit_switch_buffer = gfx_v8_ring_emit_sb,
+	.emit_cntxcntl = gfx_v8_ring_emit_cntxcntl,
 };
 
 static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = {
@@ -6487,6 +6518,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = {
 	.test_ib = gfx_v8_0_ring_test_ib,
 	.insert_nop = amdgpu_ring_insert_nop,
 	.pad_ib = amdgpu_ring_generic_pad_ib,
+	.emit_cntxcntl = gfx_v8_ring_emit_cntxcntl,
 };
 
 static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_kiq = {
-- 
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx