All of lore.kernel.org
 help / color / mirror / Atom feed
From: Hanjun Guo <guohanjun@huawei.com>
To: "Abdulhamid, Harb" <harba@codeaurora.org>,
	Hanjun Guo <hanjun.guo@linaro.org>,
	Tyler Baicar <tbaicar@codeaurora.org>,
	christoffer.dall@linaro.org, marc.zyngier@arm.com,
	pbonzini@redhat.com, rkrcmar@redhat.com, linux@armlinux.org.uk,
	catalin.marinas@arm.com, will.deacon@arm.com, rjw@rjwysocki.net,
	lenb@kernel.org, matt@codeblueprint.co.uk,
	robert.moore@intel.com, lv.zheng@intel.com, mark.rutland@arm.com,
	james.morse@arm.com, akpm@linux-foundation.org,
	sandeepa.s.prabhu@gmail.com, shijie.huang@arm.com,
	paul.gortmaker@windriver.com, tomasz.nowicki@linaro.org,
	fu.wei@linaro.org, rostedt@goodmis.org, bristot@redhat.com,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, Dkvm@vger.kernel.org, linux-kernel
Cc: Naveen Kaje <nkaje@codeaurora.org>,
	"Jonathan (Zhixiong) Zhang" <zjzhang@codeaurora.org>
Subject: Re: [PATCH V3 05/10] acpi: apei: handle SEA notification type for ARMv8
Date: Sun, 23 Oct 2016 17:13:28 +0800	[thread overview]
Message-ID: <580C7F38.4010301@huawei.com> (raw)
In-Reply-To: <1941586c-4c51-60d8-a77a-ad56fe5f3e3f@codeaurora.org>

Hi Harb,

On 2016/10/20 0:59, Abdulhamid, Harb wrote:
> On 10/18/2016 8:44 AM, Hanjun Guo wrote:
>> Hi Tyler,
>>
>> On 2016/10/8 5:31, Tyler Baicar wrote:
>>> ARM APEI extension proposal added SEA (Synchrounous External
>>> Abort) notification type for ARMv8.
>>> Add a new GHES error source handling function for SEA. If an error
>>> source's notification type is SEA, then this function can be registered
>>> into the SEA exception handler. That way GHES will parse and report
>>> SEA exceptions when they occur.
>> Does this SEA is replayed by the firmware (firmware first handling)
>> or directly triggered by the hardware when error is happened?
> Architecturally, an SEA must be synchronous and *precise*, so if you
> take an SEA on a particular load instruction, firmware/hardware should
> not be corrupting the context/state of the PE to allow software to
> determine which thread/process encountered the abort.  GHES error status

That's my concern too, and that's why I raised my question :)

> block will be expose to software with information about the type,
> severity, physical address impacted.
>
> Generally the error status block is populated by firmware.  However, as
> long as the above requirement is met, I don't think the spec precludes
> error status block being populated by hardware.  Those details must be
> completely transparent to software.
>
> Finally, to answer your more specific question:  If the implementation
> of firmware-first involves trapping the SEA in EL3 to do some firmware
> first handling, firmware must maintain the context of the offending ELx,
> generate an error record, and then "replay" the exception to normal
> (non-secure) software at the appropriate vector base address.
>

Thank you for your answer, it clears my confusion now, I will try something
similar on ARM64 platform, will get back to you if I get blocks.

Thanks
Hanjun


WARNING: multiple messages have this Message-ID (diff)
From: guohanjun@huawei.com (Hanjun Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V3 05/10] acpi: apei: handle SEA notification type for ARMv8
Date: Sun, 23 Oct 2016 17:13:28 +0800	[thread overview]
Message-ID: <580C7F38.4010301@huawei.com> (raw)
In-Reply-To: <1941586c-4c51-60d8-a77a-ad56fe5f3e3f@codeaurora.org>

Hi Harb,

On 2016/10/20 0:59, Abdulhamid, Harb wrote:
> On 10/18/2016 8:44 AM, Hanjun Guo wrote:
>> Hi Tyler,
>>
>> On 2016/10/8 5:31, Tyler Baicar wrote:
>>> ARM APEI extension proposal added SEA (Synchrounous External
>>> Abort) notification type for ARMv8.
>>> Add a new GHES error source handling function for SEA. If an error
>>> source's notification type is SEA, then this function can be registered
>>> into the SEA exception handler. That way GHES will parse and report
>>> SEA exceptions when they occur.
>> Does this SEA is replayed by the firmware (firmware first handling)
>> or directly triggered by the hardware when error is happened?
> Architecturally, an SEA must be synchronous and *precise*, so if you
> take an SEA on a particular load instruction, firmware/hardware should
> not be corrupting the context/state of the PE to allow software to
> determine which thread/process encountered the abort.  GHES error status

That's my concern too, and that's why I raised my question :)

> block will be expose to software with information about the type,
> severity, physical address impacted.
>
> Generally the error status block is populated by firmware.  However, as
> long as the above requirement is met, I don't think the spec precludes
> error status block being populated by hardware.  Those details must be
> completely transparent to software.
>
> Finally, to answer your more specific question:  If the implementation
> of firmware-first involves trapping the SEA in EL3 to do some firmware
> first handling, firmware must maintain the context of the offending ELx,
> generate an error record, and then "replay" the exception to normal
> (non-secure) software at the appropriate vector base address.
>

Thank you for your answer, it clears my confusion now, I will try something
similar on ARM64 platform, will get back to you if I get blocks.

Thanks
Hanjun

WARNING: multiple messages have this Message-ID (diff)
From: Hanjun Guo <guohanjun@huawei.com>
To: "Abdulhamid, Harb" <harba@codeaurora.org>,
	Hanjun Guo <hanjun.guo@linaro.org>,
	Tyler Baicar <tbaicar@codeaurora.org>,
	<christoffer.dall@linaro.org>, <marc.zyngier@arm.com>,
	<pbonzini@redhat.com>, <rkrcmar@redhat.com>,
	<linux@armlinux.org.uk>, <catalin.marinas@arm.com>,
	<will.deacon@arm.com>, <rjw@rjwysocki.net>, <lenb@kernel.org>,
	<matt@codeblueprint.co.uk>, <robert.moore@intel.com>,
	<lv.zheng@intel.com>, <mark.rutland@arm.com>,
	<james.morse@arm.com>, <akpm@linux-foundation.org>,
	<sandeepa.s.prabhu@gmail.com>, <shijie.huang@arm.com>,
	<paul.gortmaker@windriver.com>, <tomasz.nowicki@linaro.org>,
	<fu.wei@linaro.org>, <rostedt@goodmis.org>, <bristot@redhat.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<kvmarm@lists.cs.columbia.edu>, <Dkvm@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-acpi@vger.kernel.org>,
	<linux-efi@vger.kernel.org>, <devel@acpica.org>
Cc: Naveen Kaje <nkaje@codeaurora.org>,
	"Jonathan (Zhixiong) Zhang" <zjzhang@codeaurora.org>
Subject: Re: [PATCH V3 05/10] acpi: apei: handle SEA notification type for ARMv8
Date: Sun, 23 Oct 2016 17:13:28 +0800	[thread overview]
Message-ID: <580C7F38.4010301@huawei.com> (raw)
In-Reply-To: <1941586c-4c51-60d8-a77a-ad56fe5f3e3f@codeaurora.org>

Hi Harb,

On 2016/10/20 0:59, Abdulhamid, Harb wrote:
> On 10/18/2016 8:44 AM, Hanjun Guo wrote:
>> Hi Tyler,
>>
>> On 2016/10/8 5:31, Tyler Baicar wrote:
>>> ARM APEI extension proposal added SEA (Synchrounous External
>>> Abort) notification type for ARMv8.
>>> Add a new GHES error source handling function for SEA. If an error
>>> source's notification type is SEA, then this function can be registered
>>> into the SEA exception handler. That way GHES will parse and report
>>> SEA exceptions when they occur.
>> Does this SEA is replayed by the firmware (firmware first handling)
>> or directly triggered by the hardware when error is happened?
> Architecturally, an SEA must be synchronous and *precise*, so if you
> take an SEA on a particular load instruction, firmware/hardware should
> not be corrupting the context/state of the PE to allow software to
> determine which thread/process encountered the abort.  GHES error status

That's my concern too, and that's why I raised my question :)

> block will be expose to software with information about the type,
> severity, physical address impacted.
>
> Generally the error status block is populated by firmware.  However, as
> long as the above requirement is met, I don't think the spec precludes
> error status block being populated by hardware.  Those details must be
> completely transparent to software.
>
> Finally, to answer your more specific question:  If the implementation
> of firmware-first involves trapping the SEA in EL3 to do some firmware
> first handling, firmware must maintain the context of the offending ELx,
> generate an error record, and then "replay" the exception to normal
> (non-secure) software at the appropriate vector base address.
>

Thank you for your answer, it clears my confusion now, I will try something
similar on ARM64 platform, will get back to you if I get blocks.

Thanks
Hanjun

  reply	other threads:[~2016-10-23  9:13 UTC|newest]

Thread overview: 113+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-07 21:31 [PATCH V3 00/10] Add UEFI 2.6 and ACPI 6.1 updates for RAS on ARM64 Tyler Baicar
2016-10-07 21:31 ` Tyler Baicar
2016-10-07 21:31 ` Tyler Baicar
2016-10-07 21:31 ` [PATCH V3 01/10] acpi: apei: read ack upon ghes record consumption Tyler Baicar
2016-10-07 21:31   ` Tyler Baicar
2016-10-12 15:39   ` Punit Agrawal
2016-10-12 15:39     ` Punit Agrawal
2016-10-12 15:39     ` Punit Agrawal
2016-10-13 13:49     ` Baicar, Tyler
2016-10-13 13:49       ` Baicar, Tyler
2016-10-13 13:49       ` Baicar, Tyler
2016-10-07 21:31 ` [PATCH V3 02/10] ras: acpi/apei: cper: generic error data entry v3 per ACPI 6.1 Tyler Baicar
2016-10-07 21:31   ` Tyler Baicar
2016-10-11 17:28   ` Suzuki K Poulose
2016-10-11 17:28     ` Suzuki K Poulose
2016-10-11 17:28     ` Suzuki K Poulose
2016-10-12 22:10     ` Baicar, Tyler
2016-10-12 22:10       ` Baicar, Tyler
2016-10-12 22:10       ` Baicar, Tyler
2016-10-13  8:50       ` Suzuki K Poulose
2016-10-13  8:50         ` Suzuki K Poulose
2016-10-13  8:50         ` Suzuki K Poulose
2016-10-13 19:37         ` Baicar, Tyler
2016-10-13 19:37           ` Baicar, Tyler
2016-10-13 19:37           ` Baicar, Tyler
     [not found]           ` <912acc88-fbaf-2576-8048-1fcc67439600-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-10-14 16:28             ` Suzuki K Poulose
2016-10-14 16:28               ` Suzuki K Poulose
2016-10-14 16:28               ` Suzuki K Poulose
2016-10-14 16:39               ` Mark Rutland
2016-10-14 16:39                 ` Mark Rutland
2016-10-14 16:39                 ` Mark Rutland
2016-10-11 18:52   ` Russell King - ARM Linux
2016-10-11 18:52     ` Russell King - ARM Linux
2016-10-11 18:52     ` Russell King - ARM Linux
     [not found]     ` <20161011185236.GC1041-l+eeeJia6m9URfEZ8mYm6t73F7V6hmMc@public.gmane.org>
2016-10-12 22:18       ` Baicar, Tyler
2016-10-12 22:18         ` Baicar, Tyler
2016-10-12 22:18         ` Baicar, Tyler
     [not found] ` <1475875882-2604-1-git-send-email-tbaicar-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-10-07 21:31   ` [PATCH V3 03/10] efi: parse ARMv8 processor error Tyler Baicar
2016-10-07 21:31     ` Tyler Baicar
2016-10-07 21:31     ` Tyler Baicar
2016-10-07 21:31   ` [PATCH V3 05/10] acpi: apei: handle SEA notification type for ARMv8 Tyler Baicar
2016-10-07 21:31     ` Tyler Baicar
2016-10-07 21:31     ` Tyler Baicar
2016-10-12 18:00     ` Punit Agrawal
2016-10-12 18:00       ` Punit Agrawal
2016-10-12 18:00       ` Punit Agrawal
2016-10-13 14:03       ` Baicar, Tyler
2016-10-13 14:03         ` Baicar, Tyler
2016-10-13 14:03         ` Baicar, Tyler
2016-10-14  9:39         ` Punit Agrawal
2016-10-14  9:39           ` Punit Agrawal
2016-10-14  9:39           ` Punit Agrawal
2016-10-18 12:44     ` Hanjun Guo
2016-10-18 12:44       ` [Devel] " Hanjun Guo
2016-10-18 12:44       ` Hanjun Guo
     [not found]       ` <496ddac3-a220-fd42-5ca1-3d0fb0238907-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-10-19 16:59         ` Abdulhamid, Harb
2016-10-19 16:59           ` Abdulhamid, Harb
2016-10-19 16:59           ` Abdulhamid, Harb
2016-10-23  9:13           ` Hanjun Guo [this message]
2016-10-23  9:13             ` Hanjun Guo
2016-10-23  9:13             ` Hanjun Guo
     [not found]     ` <1475875882-2604-6-git-send-email-tbaicar-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-10-18 13:04       ` Hanjun Guo
2016-10-18 13:04         ` [Devel] " Hanjun Guo
2016-10-18 13:04         ` Hanjun Guo
2016-10-18 13:04         ` Hanjun Guo
     [not found]         ` <57c81498-78f1-8aac-01b1-b5445415d822-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-10-19 17:12           ` Abdulhamid, Harb
2016-10-19 17:12             ` Abdulhamid, Harb
2016-10-19 17:12             ` Abdulhamid, Harb
2016-10-07 21:31   ` [PATCH V3 07/10] efi: print unrecognized CPER section Tyler Baicar
2016-10-07 21:31     ` Tyler Baicar
2016-10-07 21:31     ` Tyler Baicar
2016-10-07 21:31   ` [PATCH V3 09/10] trace, ras: add ARM processor error trace event Tyler Baicar
2016-10-07 21:31     ` Tyler Baicar
2016-10-07 21:31     ` Tyler Baicar
2016-10-07 21:39     ` Steven Rostedt
2016-10-07 21:39       ` Steven Rostedt
2016-10-07 21:39       ` Steven Rostedt
2016-10-12 21:23       ` Baicar, Tyler
2016-10-12 21:23         ` Baicar, Tyler
2016-10-07 21:31 ` [PATCH V3 04/10] arm64: exception: handle Synchronous External Abort Tyler Baicar
2016-10-07 21:31   ` Tyler Baicar
2016-10-12 17:46   ` Punit Agrawal
2016-10-12 17:46     ` Punit Agrawal
2016-10-12 17:46     ` Punit Agrawal
2016-10-13 13:56     ` Baicar, Tyler
2016-10-13 13:56       ` Baicar, Tyler
2016-10-07 21:31 ` [PATCH V3 06/10] acpi: apei: panic OS with fatal error status block Tyler Baicar
2016-10-07 21:31   ` Tyler Baicar
2016-10-13 13:00   ` Suzuki K Poulose
2016-10-13 13:00     ` Suzuki K Poulose
2016-10-13 23:34     ` Baicar, Tyler
2016-10-13 23:34       ` Baicar, Tyler
2016-10-07 21:31 ` [PATCH V3 08/10] ras: acpi / apei: generate trace event for unrecognized CPER section Tyler Baicar
2016-10-07 21:31   ` Tyler Baicar
2016-10-13 10:54   ` Punit Agrawal
2016-10-13 10:54     ` Punit Agrawal
2016-10-13 10:54     ` Punit Agrawal
2016-10-13 20:15     ` Baicar, Tyler
2016-10-13 20:15       ` Baicar, Tyler
2016-10-13 20:15       ` Baicar, Tyler
2016-10-07 21:31 ` [PATCH V3 10/10] arm64: KVM: add guest SEA support Tyler Baicar
2016-10-07 21:31   ` Tyler Baicar
2016-10-13 13:14   ` Punit Agrawal
2016-10-13 13:14     ` Punit Agrawal
2016-10-13 13:14     ` Punit Agrawal
     [not found]     ` <87h98gs853.fsf-Z9gB6HwUD+TZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
2016-10-13 20:14       ` Baicar, Tyler
2016-10-13 20:14         ` Baicar, Tyler
2016-10-13 20:14         ` Baicar, Tyler
2016-10-14  9:38         ` Punit Agrawal
2016-10-14  9:38           ` Punit Agrawal
2016-10-14  9:38           ` Punit Agrawal
2016-10-14 21:58           ` Baicar, Tyler
2016-10-14 21:58             ` Baicar, Tyler

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=580C7F38.4010301@huawei.com \
    --to=guohanjun@huawei.com \
    --cc=Dkvm@vger.kernel.org \
    --cc=akpm@linux-foundation.org \
    --cc=bristot@redhat.com \
    --cc=catalin.marinas@arm.com \
    --cc=christoffer.dall@linaro.org \
    --cc=fu.wei@linaro.org \
    --cc=hanjun.guo@linaro.org \
    --cc=harba@codeaurora.org \
    --cc=james.morse@arm.com \
    --cc=kvmarm@lists.cs.columbia.edu \
    --cc=lenb@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux@armlinux.org.uk \
    --cc=lv.zheng@intel.com \
    --cc=marc.zyngier@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=matt@codeblueprint.co.uk \
    --cc=nkaje@codeaurora.org \
    --cc=paul.gortmaker@windriver.com \
    --cc=pbonzini@redhat.com \
    --cc=rjw@rjwysocki.net \
    --cc=rkrcmar@redhat.com \
    --cc=robert.moore@intel.com \
    --cc=rostedt@goodmis.org \
    --cc=sandeepa.s.prabhu@gmail.com \
    --cc=shijie.huang@arm.com \
    --cc=tbaicar@codeaurora.org \
    --cc=tomasz.nowicki@linaro.org \
    --cc=will.deacon@arm.com \
    --cc=zjzhang@codeaurora.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.