* arasan,sdhci.txt "compatibility" DT binding
@ 2016-11-28 15:44 ` Mason
0 siblings, 0 replies; 33+ messages in thread
From: Mason @ 2016-11-28 15:44 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
@Shawn Lin, could you take a look below and tell me exactly
which IP core(s) Rockchip is using in its SoCs?
Based on the feedback I received, here is an updated list of
compatible strings and controller versions dealt with by the
drivers/mmc/host/sdhci-of-arasan.c code.
Xilinx Zynq:
"SD2.0 / SDIO2.0 / MMC3.31 AHB Host Controller"
"arasan,sdhci-8.9a"
NB: 8.9a is the documentation revision (dated 2011-10-19)
subsequent tweaks labeled 9.0a, 9.1a, 9.2a
Xilinx ZynqMP:
"SD3.0 / SDIO3.0 / eMMC4.51 AHB Host Controller"
"arasan,sdhci-8.9a"
NB: using the same compatible string as Zynq
Sigma SMP87xx
"SD3.0 / SDIO3.0 / eMMC4.4 AHB Host Controller"
no compatible string yet, platform-specific init required
APM:
"SD3.0 / SDIO3.0 / eMMC4.41 AHB Host Controller"
"arasan,sdhci-4.9a"
NB: 4.9a appears to be the documentation revision
no functional diff with "arasan,sdhci-8.9a"
Rockchip
Exact IP unknown, waiting for Shawn's answer
"arasan,sdhci-5.1"
NB: 5.1 appears to refer to the eMMC standard supported
On a final note, there are many variations of the Arasan IP.
I've tracked down at least the following:
SD_2.0_SDIO_2.0__MMC_3.31_AHB_Host_Controller.pdf
SD_3.0_SDIO_3.0_eMMC_4.41_OCP_Host_Controller.pdf
SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller.pdf
SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller.pdf
SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller.pdf
It seems to me the compatible string should specify
the SD/SDIO version AND the eMMC version, since it
seems many combinations are allowed, e.g. eMMC 4.51
has two possible SD versions.
What do you think?
Regards.
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: arasan,sdhci.txt "compatibility" DT binding
2016-11-28 15:44 ` Mason
@ 2016-11-28 16:15 ` Arnd Bergmann
-1 siblings, 0 replies; 33+ messages in thread
From: Arnd Bergmann @ 2016-11-28 16:15 UTC (permalink / raw)
To: Mason
Cc: linux-mmc, Shawn Lin, Adrian Hunter, Michal Simek, Rameshwar Sahu,
Linux ARM, Soren Brinkmann, Michal Simek, Anton Vorontsov,
Xiaobo Xie, Suman Tripathi, Linus Walleij, Maxime Ripard,
Rob Herring, Zach Brown, Ulf Hansson, Douglas Anderson,
Heiko Stuebner, Jisheng Zhang, Suneel Garapati <sune>
On Monday, November 28, 2016 4:44:39 PM CET Mason wrote:
> Hello,
>
> @Shawn Lin, could you take a look below and tell me exactly
> which IP core(s) Rockchip is using in its SoCs?
>
> Based on the feedback I received, here is an updated list of
> compatible strings and controller versions dealt with by the
> drivers/mmc/host/sdhci-of-arasan.c code.
>
>
> Xilinx Zynq:
> "SD2.0 / SDIO2.0 / MMC3.31 AHB Host Controller"
> "arasan,sdhci-8.9a"
> NB: 8.9a is the documentation revision (dated 2011-10-19)
> subsequent tweaks labeled 9.0a, 9.1a, 9.2a
>
> Xilinx ZynqMP:
> "SD3.0 / SDIO3.0 / eMMC4.51 AHB Host Controller"
> "arasan,sdhci-8.9a"
> NB: using the same compatible string as Zynq
>
> Sigma SMP87xx
> "SD3.0 / SDIO3.0 / eMMC4.4 AHB Host Controller"
> no compatible string yet, platform-specific init required
>
> APM:
> "SD3.0 / SDIO3.0 / eMMC4.41 AHB Host Controller"
> "arasan,sdhci-4.9a"
> NB: 4.9a appears to be the documentation revision
> no functional diff with "arasan,sdhci-8.9a"
>
> Rockchip
> Exact IP unknown, waiting for Shawn's answer
> "arasan,sdhci-5.1"
> NB: 5.1 appears to refer to the eMMC standard supported
>
>
> On a final note, there are many variations of the Arasan IP.
> I've tracked down at least the following:
>
> SD_2.0_SDIO_2.0__MMC_3.31_AHB_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.41_OCP_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
> SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller.pdf
> SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller.pdf
>
> It seems to me the compatible string should specify
> the SD/SDIO version AND the eMMC version, since it
> seems many combinations are allowed, e.g. eMMC 4.51
> has two possible SD versions.
>
> What do you think?
It seems wrong to have the eMMC or SD version in the compatible
string. Is that the only difference between the documents you
found? Normally there should be a version of IP block itself,
besides the supported protocol.
Arnd
^ permalink raw reply [flat|nested] 33+ messages in thread
* arasan,sdhci.txt "compatibility" DT binding
@ 2016-11-28 16:15 ` Arnd Bergmann
0 siblings, 0 replies; 33+ messages in thread
From: Arnd Bergmann @ 2016-11-28 16:15 UTC (permalink / raw)
To: linux-arm-kernel
On Monday, November 28, 2016 4:44:39 PM CET Mason wrote:
> Hello,
>
> @Shawn Lin, could you take a look below and tell me exactly
> which IP core(s) Rockchip is using in its SoCs?
>
> Based on the feedback I received, here is an updated list of
> compatible strings and controller versions dealt with by the
> drivers/mmc/host/sdhci-of-arasan.c code.
>
>
> Xilinx Zynq:
> "SD2.0 / SDIO2.0 / MMC3.31 AHB Host Controller"
> "arasan,sdhci-8.9a"
> NB: 8.9a is the documentation revision (dated 2011-10-19)
> subsequent tweaks labeled 9.0a, 9.1a, 9.2a
>
> Xilinx ZynqMP:
> "SD3.0 / SDIO3.0 / eMMC4.51 AHB Host Controller"
> "arasan,sdhci-8.9a"
> NB: using the same compatible string as Zynq
>
> Sigma SMP87xx
> "SD3.0 / SDIO3.0 / eMMC4.4 AHB Host Controller"
> no compatible string yet, platform-specific init required
>
> APM:
> "SD3.0 / SDIO3.0 / eMMC4.41 AHB Host Controller"
> "arasan,sdhci-4.9a"
> NB: 4.9a appears to be the documentation revision
> no functional diff with "arasan,sdhci-8.9a"
>
> Rockchip
> Exact IP unknown, waiting for Shawn's answer
> "arasan,sdhci-5.1"
> NB: 5.1 appears to refer to the eMMC standard supported
>
>
> On a final note, there are many variations of the Arasan IP.
> I've tracked down at least the following:
>
> SD_2.0_SDIO_2.0__MMC_3.31_AHB_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.41_OCP_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
> SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller.pdf
> SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller.pdf
>
> It seems to me the compatible string should specify
> the SD/SDIO version AND the eMMC version, since it
> seems many combinations are allowed, e.g. eMMC 4.51
> has two possible SD versions.
>
> What do you think?
It seems wrong to have the eMMC or SD version in the compatible
string. Is that the only difference between the documents you
found? Normally there should be a version of IP block itself,
besides the supported protocol.
Arnd
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: arasan,sdhci.txt "compatibility" DT binding
2016-11-28 16:15 ` Arnd Bergmann
@ 2016-11-28 16:52 ` Mason
-1 siblings, 0 replies; 33+ messages in thread
From: Mason @ 2016-11-28 16:52 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-mmc, Shawn Lin, Adrian Hunter, Michal Simek, Rameshwar Sahu,
Linux ARM, Soren Brinkmann, Michal Simek, Anton Vorontsov,
Xiaobo Xie, Suman Tripathi, Linus Walleij, Maxime Ripard,
Rob Herring, Zach Brown, Ulf Hansson, Douglas Anderson,
Heiko Stuebner, Jisheng Zhang, Suneel Garapati <sune>
On 28/11/2016 17:15, Arnd Bergmann wrote:
> On Monday, November 28, 2016 4:44:39 PM CET Mason wrote:
>
>> Hello,
>>
>> @Shawn Lin, could you take a look below and tell me exactly
>> which IP core(s) Rockchip is using in its SoCs?
>>
>> Based on the feedback I received, here is an updated list of
>> compatible strings and controller versions dealt with by the
>> drivers/mmc/host/sdhci-of-arasan.c code.
>>
>>
>> Xilinx Zynq:
>> "SD2.0 / SDIO2.0 / MMC3.31 AHB Host Controller"
>> "arasan,sdhci-8.9a"
>> NB: 8.9a is the documentation revision (dated 2011-10-19)
>> subsequent tweaks labeled 9.0a, 9.1a, 9.2a
>>
>> Xilinx ZynqMP:
>> "SD3.0 / SDIO3.0 / eMMC4.51 AHB Host Controller"
>> "arasan,sdhci-8.9a"
>> NB: using the same compatible string as Zynq
>>
>> Sigma SMP87xx
>> "SD3.0 / SDIO3.0 / eMMC4.4 AHB Host Controller"
>> no compatible string yet, platform-specific init required
>>
>> APM:
>> "SD3.0 / SDIO3.0 / eMMC4.41 AHB Host Controller"
>> "arasan,sdhci-4.9a"
>> NB: 4.9a appears to be the documentation revision
>> no functional diff with "arasan,sdhci-8.9a"
>>
>> Rockchip
>> Exact IP unknown, waiting for Shawn's answer
>> "arasan,sdhci-5.1"
>> NB: 5.1 appears to refer to the eMMC standard supported
>>
>>
>> On a final note, there are many variations of the Arasan IP.
>> I've tracked down at least the following:
>>
>> SD_2.0_SDIO_2.0__MMC_3.31_AHB_Host_Controller.pdf
>> SD_3.0_SDIO_3.0_eMMC_4.41_OCP_Host_Controller.pdf
>> SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
>> SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller.pdf
>> SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
>> SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller.pdf
>> SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller.pdf
>>
>> It seems to me the compatible string should specify
>> the SD/SDIO version AND the eMMC version, since it
>> seems many combinations are allowed, e.g. eMMC 4.51
>> has two possible SD versions.
>>
>> What do you think?
>
> It seems wrong to have the eMMC or SD version in the compatible
> string. Is that the only difference between the documents you
> found? Normally there should be a version of IP block itself,
> besides the supported protocol.
But that is exactly the problem :-)
Nowhere in the documentation do they specify an "IP version".
Some documents do provide a revision number, but that's just
a *documentation* revision number, e.g.
changes in version 3.6 : fix typos
changes in version 9.1a : update company logo
That's why Xilinx used "arasan,sdhci-8.9a" and APM used
"arasan,sdhci-4.9a". These are documentation revisions.
In my opinion, that information is mostly worthless.
Looking more closely at SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
(User Guide, which has more info than Datasheet) I see this:
Changed Host Controller Version Register value from 16'h0002 to 16'h7501
Changed Host Controller Version Register value from 16'h8301 to 16'h8401
Changed Host Controller Version Register value from 16'h8401 to 16'h8501
Changed Host Controller Version Register to 16'h9502
Changed Host Controller Version Register to 16'h9602
Changed Host Controller Version Register to 16'h9902
Host controller version register (offset 0FEh)
Vendor Version Number 15:8
HwInit=0x99
This status is reserved for the vendor version number.
The HD should not use this status.
Specification Version Number 7:0
HwInit=0x02
This status indicates the Host Controller Spec. Version.
The upper and lower 4-bits indicate the version.
Description
00 - SD Host Specification version 1.0
01 - SD Host Specification version 2.00
including only the feature of the Test Register
02 - SD Host Specification Version 3.00
others - Reserved
I'm not sure what this "Vendor Version Number" specifies, nor if is
guaranteed to be unique across controllers.
In SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller_UserGuide.pdf,
they write "The Vendor Version Number is set to 0x10 (1.0)"
I don't have a UserGuide for "arasan,sdhci-5.1".
Regards.
^ permalink raw reply [flat|nested] 33+ messages in thread
* arasan,sdhci.txt "compatibility" DT binding
@ 2016-11-28 16:52 ` Mason
0 siblings, 0 replies; 33+ messages in thread
From: Mason @ 2016-11-28 16:52 UTC (permalink / raw)
To: linux-arm-kernel
On 28/11/2016 17:15, Arnd Bergmann wrote:
> On Monday, November 28, 2016 4:44:39 PM CET Mason wrote:
>
>> Hello,
>>
>> @Shawn Lin, could you take a look below and tell me exactly
>> which IP core(s) Rockchip is using in its SoCs?
>>
>> Based on the feedback I received, here is an updated list of
>> compatible strings and controller versions dealt with by the
>> drivers/mmc/host/sdhci-of-arasan.c code.
>>
>>
>> Xilinx Zynq:
>> "SD2.0 / SDIO2.0 / MMC3.31 AHB Host Controller"
>> "arasan,sdhci-8.9a"
>> NB: 8.9a is the documentation revision (dated 2011-10-19)
>> subsequent tweaks labeled 9.0a, 9.1a, 9.2a
>>
>> Xilinx ZynqMP:
>> "SD3.0 / SDIO3.0 / eMMC4.51 AHB Host Controller"
>> "arasan,sdhci-8.9a"
>> NB: using the same compatible string as Zynq
>>
>> Sigma SMP87xx
>> "SD3.0 / SDIO3.0 / eMMC4.4 AHB Host Controller"
>> no compatible string yet, platform-specific init required
>>
>> APM:
>> "SD3.0 / SDIO3.0 / eMMC4.41 AHB Host Controller"
>> "arasan,sdhci-4.9a"
>> NB: 4.9a appears to be the documentation revision
>> no functional diff with "arasan,sdhci-8.9a"
>>
>> Rockchip
>> Exact IP unknown, waiting for Shawn's answer
>> "arasan,sdhci-5.1"
>> NB: 5.1 appears to refer to the eMMC standard supported
>>
>>
>> On a final note, there are many variations of the Arasan IP.
>> I've tracked down at least the following:
>>
>> SD_2.0_SDIO_2.0__MMC_3.31_AHB_Host_Controller.pdf
>> SD_3.0_SDIO_3.0_eMMC_4.41_OCP_Host_Controller.pdf
>> SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
>> SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller.pdf
>> SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
>> SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller.pdf
>> SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller.pdf
>>
>> It seems to me the compatible string should specify
>> the SD/SDIO version AND the eMMC version, since it
>> seems many combinations are allowed, e.g. eMMC 4.51
>> has two possible SD versions.
>>
>> What do you think?
>
> It seems wrong to have the eMMC or SD version in the compatible
> string. Is that the only difference between the documents you
> found? Normally there should be a version of IP block itself,
> besides the supported protocol.
But that is exactly the problem :-)
Nowhere in the documentation do they specify an "IP version".
Some documents do provide a revision number, but that's just
a *documentation* revision number, e.g.
changes in version 3.6 : fix typos
changes in version 9.1a : update company logo
That's why Xilinx used "arasan,sdhci-8.9a" and APM used
"arasan,sdhci-4.9a". These are documentation revisions.
In my opinion, that information is mostly worthless.
Looking more closely at SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
(User Guide, which has more info than Datasheet) I see this:
Changed Host Controller Version Register value from 16'h0002 to 16'h7501
Changed Host Controller Version Register value from 16'h8301 to 16'h8401
Changed Host Controller Version Register value from 16'h8401 to 16'h8501
Changed Host Controller Version Register to 16'h9502
Changed Host Controller Version Register to 16'h9602
Changed Host Controller Version Register to 16'h9902
Host controller version register (offset 0FEh)
Vendor Version Number 15:8
HwInit=0x99
This status is reserved for the vendor version number.
The HD should not use this status.
Specification Version Number 7:0
HwInit=0x02
This status indicates the Host Controller Spec. Version.
The upper and lower 4-bits indicate the version.
Description
00 - SD Host Specification version 1.0
01 - SD Host Specification version 2.00
including only the feature of the Test Register
02 - SD Host Specification Version 3.00
others - Reserved
I'm not sure what this "Vendor Version Number" specifies, nor if is
guaranteed to be unique across controllers.
In SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller_UserGuide.pdf,
they write "The Vendor Version Number is set to 0x10 (1.0)"
I don't have a UserGuide for "arasan,sdhci-5.1".
Regards.
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: arasan,sdhci.txt "compatibility" DT binding
2016-11-28 16:52 ` Mason
@ 2016-11-29 7:29 ` Rameshwar Sahu
-1 siblings, 0 replies; 33+ messages in thread
From: Rameshwar Sahu @ 2016-11-29 7:29 UTC (permalink / raw)
To: Mason
Cc: Arnd Bergmann, linux-mmc, Shawn Lin, Adrian Hunter, Michal Simek,
Linux ARM, Soren Brinkmann, Michal Simek, Anton Vorontsov,
Xiaobo Xie, Suman Tripathi, Linus Walleij, Maxime Ripard,
Rob Herring, Zach Brown, Ulf Hansson, Douglas Anderson,
Heiko Stuebner, Jisheng Zhang, Suneel Garapati <sunee>
Hi Mason,
Nowhere in the documentation do they specify an "IP version".
Some documents do provide a revision number, but that's just
a *documentation* revision number, e.g.
changes in version 3.6 : fix typos
changes in version 9.1a : update company logo
That's why Xilinx used "arasan,sdhci-8.9a" and APM used
"arasan,sdhci-4.9a". These are documentation revisions.
In my opinion, that information is mostly worthless.
Arasan SD/SDIO/eMMC IP has a register which tells about the SD
specification version and Vendor version number
Reg Name: Host controller version register (offset 0FEh)
bit [15:8] is for vendor version number,
But, I have seen that Arasaan vendor version number is same as
document revision number.
On Mon, Nov 28, 2016 at 10:22 PM, Mason <slash.tmp@free.fr> wrote:
> On 28/11/2016 17:15, Arnd Bergmann wrote:
>
>> On Monday, November 28, 2016 4:44:39 PM CET Mason wrote:
>>
>>> Hello,
>>>
>>> @Shawn Lin, could you take a look below and tell me exactly
>>> which IP core(s) Rockchip is using in its SoCs?
>>>
>>> Based on the feedback I received, here is an updated list of
>>> compatible strings and controller versions dealt with by the
>>> drivers/mmc/host/sdhci-of-arasan.c code.
>>>
>>>
>>> Xilinx Zynq:
>>> "SD2.0 / SDIO2.0 / MMC3.31 AHB Host Controller"
>>> "arasan,sdhci-8.9a"
>>> NB: 8.9a is the documentation revision (dated 2011-10-19)
>>> subsequent tweaks labeled 9.0a, 9.1a, 9.2a
>>>
>>> Xilinx ZynqMP:
>>> "SD3.0 / SDIO3.0 / eMMC4.51 AHB Host Controller"
>>> "arasan,sdhci-8.9a"
>>> NB: using the same compatible string as Zynq
>>>
>>> Sigma SMP87xx
>>> "SD3.0 / SDIO3.0 / eMMC4.4 AHB Host Controller"
>>> no compatible string yet, platform-specific init required
>>>
>>> APM:
>>> "SD3.0 / SDIO3.0 / eMMC4.41 AHB Host Controller"
>>> "arasan,sdhci-4.9a"
>>> NB: 4.9a appears to be the documentation revision
>>> no functional diff with "arasan,sdhci-8.9a"
>>>
>>> Rockchip
>>> Exact IP unknown, waiting for Shawn's answer
>>> "arasan,sdhci-5.1"
>>> NB: 5.1 appears to refer to the eMMC standard supported
>>>
>>>
>>> On a final note, there are many variations of the Arasan IP.
>>> I've tracked down at least the following:
>>>
>>> SD_2.0_SDIO_2.0__MMC_3.31_AHB_Host_Controller.pdf
>>> SD_3.0_SDIO_3.0_eMMC_4.41_OCP_Host_Controller.pdf
>>> SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
>>> SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller.pdf
>>> SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
>>> SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller.pdf
>>> SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller.pdf
>>>
>>> It seems to me the compatible string should specify
>>> the SD/SDIO version AND the eMMC version, since it
>>> seems many combinations are allowed, e.g. eMMC 4.51
>>> has two possible SD versions.
>>>
>>> What do you think?
>>
>> It seems wrong to have the eMMC or SD version in the compatible
>> string. Is that the only difference between the documents you
>> found? Normally there should be a version of IP block itself,
>> besides the supported protocol.
>
> But that is exactly the problem :-)
>
> Nowhere in the documentation do they specify an "IP version".
> Some documents do provide a revision number, but that's just
> a *documentation* revision number, e.g.
>
> changes in version 3.6 : fix typos
> changes in version 9.1a : update company logo
>
> That's why Xilinx used "arasan,sdhci-8.9a" and APM used
> "arasan,sdhci-4.9a". These are documentation revisions.
> In my opinion, that information is mostly worthless.
>
>
> Looking more closely at SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
> (User Guide, which has more info than Datasheet) I see this:
>
> Changed Host Controller Version Register value from 16'h0002 to 16'h7501
> Changed Host Controller Version Register value from 16'h8301 to 16'h8401
> Changed Host Controller Version Register value from 16'h8401 to 16'h8501
> Changed Host Controller Version Register to 16'h9502
> Changed Host Controller Version Register to 16'h9602
> Changed Host Controller Version Register to 16'h9902
>
> Host controller version register (offset 0FEh)
>
> Vendor Version Number 15:8
> HwInit=0x99
> This status is reserved for the vendor version number.
> The HD should not use this status.
>
> Specification Version Number 7:0
> HwInit=0x02
> This status indicates the Host Controller Spec. Version.
> The upper and lower 4-bits indicate the version.
> Description
> 00 - SD Host Specification version 1.0
> 01 - SD Host Specification version 2.00
> including only the feature of the Test Register
> 02 - SD Host Specification Version 3.00
> others - Reserved
>
> I'm not sure what this "Vendor Version Number" specifies, nor if is
> guaranteed to be unique across controllers.
>
> In SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller_UserGuide.pdf,
> they write "The Vendor Version Number is set to 0x10 (1.0)"
>
> I don't have a UserGuide for "arasan,sdhci-5.1".
>
> Regards.
>
^ permalink raw reply [flat|nested] 33+ messages in thread
* arasan,sdhci.txt "compatibility" DT binding
@ 2016-11-29 7:29 ` Rameshwar Sahu
0 siblings, 0 replies; 33+ messages in thread
From: Rameshwar Sahu @ 2016-11-29 7:29 UTC (permalink / raw)
To: linux-arm-kernel
Hi Mason,
Nowhere in the documentation do they specify an "IP version".
Some documents do provide a revision number, but that's just
a *documentation* revision number, e.g.
changes in version 3.6 : fix typos
changes in version 9.1a : update company logo
That's why Xilinx used "arasan,sdhci-8.9a" and APM used
"arasan,sdhci-4.9a". These are documentation revisions.
In my opinion, that information is mostly worthless.
Arasan SD/SDIO/eMMC IP has a register which tells about the SD
specification version and Vendor version number
Reg Name: Host controller version register (offset 0FEh)
bit [15:8] is for vendor version number,
But, I have seen that Arasaan vendor version number is same as
document revision number.
On Mon, Nov 28, 2016 at 10:22 PM, Mason <slash.tmp@free.fr> wrote:
> On 28/11/2016 17:15, Arnd Bergmann wrote:
>
>> On Monday, November 28, 2016 4:44:39 PM CET Mason wrote:
>>
>>> Hello,
>>>
>>> @Shawn Lin, could you take a look below and tell me exactly
>>> which IP core(s) Rockchip is using in its SoCs?
>>>
>>> Based on the feedback I received, here is an updated list of
>>> compatible strings and controller versions dealt with by the
>>> drivers/mmc/host/sdhci-of-arasan.c code.
>>>
>>>
>>> Xilinx Zynq:
>>> "SD2.0 / SDIO2.0 / MMC3.31 AHB Host Controller"
>>> "arasan,sdhci-8.9a"
>>> NB: 8.9a is the documentation revision (dated 2011-10-19)
>>> subsequent tweaks labeled 9.0a, 9.1a, 9.2a
>>>
>>> Xilinx ZynqMP:
>>> "SD3.0 / SDIO3.0 / eMMC4.51 AHB Host Controller"
>>> "arasan,sdhci-8.9a"
>>> NB: using the same compatible string as Zynq
>>>
>>> Sigma SMP87xx
>>> "SD3.0 / SDIO3.0 / eMMC4.4 AHB Host Controller"
>>> no compatible string yet, platform-specific init required
>>>
>>> APM:
>>> "SD3.0 / SDIO3.0 / eMMC4.41 AHB Host Controller"
>>> "arasan,sdhci-4.9a"
>>> NB: 4.9a appears to be the documentation revision
>>> no functional diff with "arasan,sdhci-8.9a"
>>>
>>> Rockchip
>>> Exact IP unknown, waiting for Shawn's answer
>>> "arasan,sdhci-5.1"
>>> NB: 5.1 appears to refer to the eMMC standard supported
>>>
>>>
>>> On a final note, there are many variations of the Arasan IP.
>>> I've tracked down at least the following:
>>>
>>> SD_2.0_SDIO_2.0__MMC_3.31_AHB_Host_Controller.pdf
>>> SD_3.0_SDIO_3.0_eMMC_4.41_OCP_Host_Controller.pdf
>>> SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
>>> SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller.pdf
>>> SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
>>> SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller.pdf
>>> SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller.pdf
>>>
>>> It seems to me the compatible string should specify
>>> the SD/SDIO version AND the eMMC version, since it
>>> seems many combinations are allowed, e.g. eMMC 4.51
>>> has two possible SD versions.
>>>
>>> What do you think?
>>
>> It seems wrong to have the eMMC or SD version in the compatible
>> string. Is that the only difference between the documents you
>> found? Normally there should be a version of IP block itself,
>> besides the supported protocol.
>
> But that is exactly the problem :-)
>
> Nowhere in the documentation do they specify an "IP version".
> Some documents do provide a revision number, but that's just
> a *documentation* revision number, e.g.
>
> changes in version 3.6 : fix typos
> changes in version 9.1a : update company logo
>
> That's why Xilinx used "arasan,sdhci-8.9a" and APM used
> "arasan,sdhci-4.9a". These are documentation revisions.
> In my opinion, that information is mostly worthless.
>
>
> Looking more closely at SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
> (User Guide, which has more info than Datasheet) I see this:
>
> Changed Host Controller Version Register value from 16'h0002 to 16'h7501
> Changed Host Controller Version Register value from 16'h8301 to 16'h8401
> Changed Host Controller Version Register value from 16'h8401 to 16'h8501
> Changed Host Controller Version Register to 16'h9502
> Changed Host Controller Version Register to 16'h9602
> Changed Host Controller Version Register to 16'h9902
>
> Host controller version register (offset 0FEh)
>
> Vendor Version Number 15:8
> HwInit=0x99
> This status is reserved for the vendor version number.
> The HD should not use this status.
>
> Specification Version Number 7:0
> HwInit=0x02
> This status indicates the Host Controller Spec. Version.
> The upper and lower 4-bits indicate the version.
> Description
> 00 - SD Host Specification version 1.0
> 01 - SD Host Specification version 2.00
> including only the feature of the Test Register
> 02 - SD Host Specification Version 3.00
> others - Reserved
>
> I'm not sure what this "Vendor Version Number" specifies, nor if is
> guaranteed to be unique across controllers.
>
> In SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller_UserGuide.pdf,
> they write "The Vendor Version Number is set to 0x10 (1.0)"
>
> I don't have a UserGuide for "arasan,sdhci-5.1".
>
> Regards.
>
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: arasan,sdhci.txt "compatibility" DT binding
2016-11-29 7:29 ` Rameshwar Sahu
@ 2016-11-30 10:51 ` Sebastian Frias
-1 siblings, 0 replies; 33+ messages in thread
From: Sebastian Frias @ 2016-11-30 10:51 UTC (permalink / raw)
To: Rameshwar Sahu, Mason
Cc: Mark Rutland, Ulf Hansson, Suman Tripathi, Heiko Stuebner,
Shawn Lin, Adrian Hunter, Jisheng Zhang, Russell King,
Anton Vorontsov, Michal Simek, Linux ARM, Linus Walleij,
P L Sai Krishna, Zach Brown, Arnd Bergmann, Suneel Garapati,
Soren Brinkmann, Michal Simek, linux-mmc, Douglas Anderson,
Maxime Ripard, Xiaobo Xie
On 29/11/16 08:29, Rameshwar Sahu wrote:
> Hi Mason,
>
> Nowhere in the documentation do they specify an "IP version".
> Some documents do provide a revision number, but that's just
> a *documentation* revision number, e.g.
>
> changes in version 3.6 : fix typos
> changes in version 9.1a : update company logo
>
> That's why Xilinx used "arasan,sdhci-8.9a" and APM used
> "arasan,sdhci-4.9a". These are documentation revisions.
> In my opinion, that information is mostly worthless.
>
For the record, the important information conveyed by Rameshwar's
email is the following:
Arasan SD/SDIO/eMMC IP has a register which tells about the SD
specification version and Vendor version number
Reg Name: Host controller version register (offset 0FEh)
bit [15:8] is for vendor version number,
But, I have seen that Arasaan vendor version number is same as
document revision number.
(At first I had ignored the email because it repeated Mason's email
without quoting, but then I realised it contained some information)
>
> On Mon, Nov 28, 2016 at 10:22 PM, Mason <slash.tmp@free.fr> wrote:
>> On 28/11/2016 17:15, Arnd Bergmann wrote:
>>
>>> On Monday, November 28, 2016 4:44:39 PM CET Mason wrote:
>>>
>>>> Hello,
>>>>
>>>> @Shawn Lin, could you take a look below and tell me exactly
>>>> which IP core(s) Rockchip is using in its SoCs?
>>>>
>>>> Based on the feedback I received, here is an updated list of
>>>> compatible strings and controller versions dealt with by the
>>>> drivers/mmc/host/sdhci-of-arasan.c code.
>>>>
>>>>
>>>> Xilinx Zynq:
>>>> "SD2.0 / SDIO2.0 / MMC3.31 AHB Host Controller"
>>>> "arasan,sdhci-8.9a"
>>>> NB: 8.9a is the documentation revision (dated 2011-10-19)
>>>> subsequent tweaks labeled 9.0a, 9.1a, 9.2a
>>>>
>>>> Xilinx ZynqMP:
>>>> "SD3.0 / SDIO3.0 / eMMC4.51 AHB Host Controller"
>>>> "arasan,sdhci-8.9a"
>>>> NB: using the same compatible string as Zynq
>>>>
>>>> Sigma SMP87xx
>>>> "SD3.0 / SDIO3.0 / eMMC4.4 AHB Host Controller"
>>>> no compatible string yet, platform-specific init required
>>>>
>>>> APM:
>>>> "SD3.0 / SDIO3.0 / eMMC4.41 AHB Host Controller"
>>>> "arasan,sdhci-4.9a"
>>>> NB: 4.9a appears to be the documentation revision
>>>> no functional diff with "arasan,sdhci-8.9a"
>>>>
>>>> Rockchip
>>>> Exact IP unknown, waiting for Shawn's answer
>>>> "arasan,sdhci-5.1"
>>>> NB: 5.1 appears to refer to the eMMC standard supported
>>>>
>>>>
>>>> On a final note, there are many variations of the Arasan IP.
>>>> I've tracked down at least the following:
>>>>
>>>> SD_2.0_SDIO_2.0__MMC_3.31_AHB_Host_Controller.pdf
>>>> SD_3.0_SDIO_3.0_eMMC_4.41_OCP_Host_Controller.pdf
>>>> SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
>>>> SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller.pdf
>>>> SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
>>>> SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller.pdf
>>>> SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller.pdf
>>>>
>>>> It seems to me the compatible string should specify
>>>> the SD/SDIO version AND the eMMC version, since it
>>>> seems many combinations are allowed, e.g. eMMC 4.51
>>>> has two possible SD versions.
>>>>
>>>> What do you think?
>>>
>>> It seems wrong to have the eMMC or SD version in the compatible
>>> string. Is that the only difference between the documents you
>>> found? Normally there should be a version of IP block itself,
>>> besides the supported protocol.
>>
>> But that is exactly the problem :-)
>>
>> Nowhere in the documentation do they specify an "IP version".
>> Some documents do provide a revision number, but that's just
>> a *documentation* revision number, e.g.
>>
>> changes in version 3.6 : fix typos
>> changes in version 9.1a : update company logo
>>
>> That's why Xilinx used "arasan,sdhci-8.9a" and APM used
>> "arasan,sdhci-4.9a". These are documentation revisions.
>> In my opinion, that information is mostly worthless.
>>
>>
>> Looking more closely at SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
>> (User Guide, which has more info than Datasheet) I see this:
>>
>> Changed Host Controller Version Register value from 16'h0002 to 16'h7501
>> Changed Host Controller Version Register value from 16'h8301 to 16'h8401
>> Changed Host Controller Version Register value from 16'h8401 to 16'h8501
>> Changed Host Controller Version Register to 16'h9502
>> Changed Host Controller Version Register to 16'h9602
>> Changed Host Controller Version Register to 16'h9902
>>
>> Host controller version register (offset 0FEh)
>>
>> Vendor Version Number 15:8
>> HwInit=0x99
>> This status is reserved for the vendor version number.
>> The HD should not use this status.
>>
>> Specification Version Number 7:0
>> HwInit=0x02
>> This status indicates the Host Controller Spec. Version.
>> The upper and lower 4-bits indicate the version.
>> Description
>> 00 - SD Host Specification version 1.0
>> 01 - SD Host Specification version 2.00
>> including only the feature of the Test Register
>> 02 - SD Host Specification Version 3.00
>> others - Reserved
>>
>> I'm not sure what this "Vendor Version Number" specifies, nor if is
>> guaranteed to be unique across controllers.
>>
>> In SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller_UserGuide.pdf,
>> they write "The Vendor Version Number is set to 0x10 (1.0)"
>>
>> I don't have a UserGuide for "arasan,sdhci-5.1".
>>
>> Regards.
>>
^ permalink raw reply [flat|nested] 33+ messages in thread
* arasan,sdhci.txt "compatibility" DT binding
@ 2016-11-30 10:51 ` Sebastian Frias
0 siblings, 0 replies; 33+ messages in thread
From: Sebastian Frias @ 2016-11-30 10:51 UTC (permalink / raw)
To: linux-arm-kernel
On 29/11/16 08:29, Rameshwar Sahu wrote:
> Hi Mason,
>
> Nowhere in the documentation do they specify an "IP version".
> Some documents do provide a revision number, but that's just
> a *documentation* revision number, e.g.
>
> changes in version 3.6 : fix typos
> changes in version 9.1a : update company logo
>
> That's why Xilinx used "arasan,sdhci-8.9a" and APM used
> "arasan,sdhci-4.9a". These are documentation revisions.
> In my opinion, that information is mostly worthless.
>
For the record, the important information conveyed by Rameshwar's
email is the following:
Arasan SD/SDIO/eMMC IP has a register which tells about the SD
specification version and Vendor version number
Reg Name: Host controller version register (offset 0FEh)
bit [15:8] is for vendor version number,
But, I have seen that Arasaan vendor version number is same as
document revision number.
(At first I had ignored the email because it repeated Mason's email
without quoting, but then I realised it contained some information)
>
> On Mon, Nov 28, 2016 at 10:22 PM, Mason <slash.tmp@free.fr> wrote:
>> On 28/11/2016 17:15, Arnd Bergmann wrote:
>>
>>> On Monday, November 28, 2016 4:44:39 PM CET Mason wrote:
>>>
>>>> Hello,
>>>>
>>>> @Shawn Lin, could you take a look below and tell me exactly
>>>> which IP core(s) Rockchip is using in its SoCs?
>>>>
>>>> Based on the feedback I received, here is an updated list of
>>>> compatible strings and controller versions dealt with by the
>>>> drivers/mmc/host/sdhci-of-arasan.c code.
>>>>
>>>>
>>>> Xilinx Zynq:
>>>> "SD2.0 / SDIO2.0 / MMC3.31 AHB Host Controller"
>>>> "arasan,sdhci-8.9a"
>>>> NB: 8.9a is the documentation revision (dated 2011-10-19)
>>>> subsequent tweaks labeled 9.0a, 9.1a, 9.2a
>>>>
>>>> Xilinx ZynqMP:
>>>> "SD3.0 / SDIO3.0 / eMMC4.51 AHB Host Controller"
>>>> "arasan,sdhci-8.9a"
>>>> NB: using the same compatible string as Zynq
>>>>
>>>> Sigma SMP87xx
>>>> "SD3.0 / SDIO3.0 / eMMC4.4 AHB Host Controller"
>>>> no compatible string yet, platform-specific init required
>>>>
>>>> APM:
>>>> "SD3.0 / SDIO3.0 / eMMC4.41 AHB Host Controller"
>>>> "arasan,sdhci-4.9a"
>>>> NB: 4.9a appears to be the documentation revision
>>>> no functional diff with "arasan,sdhci-8.9a"
>>>>
>>>> Rockchip
>>>> Exact IP unknown, waiting for Shawn's answer
>>>> "arasan,sdhci-5.1"
>>>> NB: 5.1 appears to refer to the eMMC standard supported
>>>>
>>>>
>>>> On a final note, there are many variations of the Arasan IP.
>>>> I've tracked down at least the following:
>>>>
>>>> SD_2.0_SDIO_2.0__MMC_3.31_AHB_Host_Controller.pdf
>>>> SD_3.0_SDIO_3.0_eMMC_4.41_OCP_Host_Controller.pdf
>>>> SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
>>>> SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller.pdf
>>>> SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
>>>> SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller.pdf
>>>> SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller.pdf
>>>>
>>>> It seems to me the compatible string should specify
>>>> the SD/SDIO version AND the eMMC version, since it
>>>> seems many combinations are allowed, e.g. eMMC 4.51
>>>> has two possible SD versions.
>>>>
>>>> What do you think?
>>>
>>> It seems wrong to have the eMMC or SD version in the compatible
>>> string. Is that the only difference between the documents you
>>> found? Normally there should be a version of IP block itself,
>>> besides the supported protocol.
>>
>> But that is exactly the problem :-)
>>
>> Nowhere in the documentation do they specify an "IP version".
>> Some documents do provide a revision number, but that's just
>> a *documentation* revision number, e.g.
>>
>> changes in version 3.6 : fix typos
>> changes in version 9.1a : update company logo
>>
>> That's why Xilinx used "arasan,sdhci-8.9a" and APM used
>> "arasan,sdhci-4.9a". These are documentation revisions.
>> In my opinion, that information is mostly worthless.
>>
>>
>> Looking more closely at SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
>> (User Guide, which has more info than Datasheet) I see this:
>>
>> Changed Host Controller Version Register value from 16'h0002 to 16'h7501
>> Changed Host Controller Version Register value from 16'h8301 to 16'h8401
>> Changed Host Controller Version Register value from 16'h8401 to 16'h8501
>> Changed Host Controller Version Register to 16'h9502
>> Changed Host Controller Version Register to 16'h9602
>> Changed Host Controller Version Register to 16'h9902
>>
>> Host controller version register (offset 0FEh)
>>
>> Vendor Version Number 15:8
>> HwInit=0x99
>> This status is reserved for the vendor version number.
>> The HD should not use this status.
>>
>> Specification Version Number 7:0
>> HwInit=0x02
>> This status indicates the Host Controller Spec. Version.
>> The upper and lower 4-bits indicate the version.
>> Description
>> 00 - SD Host Specification version 1.0
>> 01 - SD Host Specification version 2.00
>> including only the feature of the Test Register
>> 02 - SD Host Specification Version 3.00
>> others - Reserved
>>
>> I'm not sure what this "Vendor Version Number" specifies, nor if is
>> guaranteed to be unique across controllers.
>>
>> In SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller_UserGuide.pdf,
>> they write "The Vendor Version Number is set to 0x10 (1.0)"
>>
>> I don't have a UserGuide for "arasan,sdhci-5.1".
>>
>> Regards.
>>
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: arasan,sdhci.txt "compatibility" DT binding
2016-11-30 10:51 ` Sebastian Frias
@ 2016-11-30 13:17 ` Michal Simek
-1 siblings, 0 replies; 33+ messages in thread
From: Michal Simek @ 2016-11-30 13:17 UTC (permalink / raw)
To: Sebastian Frias, Rameshwar Sahu, Mason
Cc: Arnd Bergmann, linux-mmc, Shawn Lin, Adrian Hunter, Michal Simek,
Linux ARM, Soren Brinkmann, Michal Simek, Anton Vorontsov,
Xiaobo Xie, Suman Tripathi, Linus Walleij, Maxime Ripard,
Rob Herring, Zach Brown, Ulf Hansson, Douglas Anderson,
Heiko Stuebner, Jisheng Zhang, Suneel
On 30.11.2016 11:51, Sebastian Frias wrote:
> On 29/11/16 08:29, Rameshwar Sahu wrote:
>> Hi Mason,
>>
>> Nowhere in the documentation do they specify an "IP version".
>> Some documents do provide a revision number, but that's just
>> a *documentation* revision number, e.g.
>>
>> changes in version 3.6 : fix typos
>> changes in version 9.1a : update company logo
>>
>> That's why Xilinx used "arasan,sdhci-8.9a" and APM used
>> "arasan,sdhci-4.9a". These are documentation revisions.
>> In my opinion, that information is mostly worthless.
>>
>
> For the record, the important information conveyed by Rameshwar's
> email is the following:
>
> Arasan SD/SDIO/eMMC IP has a register which tells about the SD
> specification version and Vendor version number
> Reg Name: Host controller version register (offset 0FEh)
> bit [15:8] is for vendor version number,
> But, I have seen that Arasaan vendor version number is same as
> document revision number.
>
> (At first I had ignored the email because it repeated Mason's email
> without quoting, but then I realised it contained some information)
>
>
Values on real HW.
ZynqMP device
xsdb% mrd 0xFF1600FC
FF1600FC: 10020000
Zynq device:
xsdb% mrd 0xE01000FC
E01000FC: 89010000
Based on docs I have access to.
Specification_Version_Number (bits:23:16)
00 - SD Host Specification version 1.0
01 - SD Host Specification version 2.00 including only the feature of
the Test Register
02 - SD Host Specification version 3.00
Vendor_Version_Number 31:24
with 32bit access from FC
Thanks,
Michal
^ permalink raw reply [flat|nested] 33+ messages in thread
* arasan,sdhci.txt "compatibility" DT binding
@ 2016-11-30 13:17 ` Michal Simek
0 siblings, 0 replies; 33+ messages in thread
From: Michal Simek @ 2016-11-30 13:17 UTC (permalink / raw)
To: linux-arm-kernel
On 30.11.2016 11:51, Sebastian Frias wrote:
> On 29/11/16 08:29, Rameshwar Sahu wrote:
>> Hi Mason,
>>
>> Nowhere in the documentation do they specify an "IP version".
>> Some documents do provide a revision number, but that's just
>> a *documentation* revision number, e.g.
>>
>> changes in version 3.6 : fix typos
>> changes in version 9.1a : update company logo
>>
>> That's why Xilinx used "arasan,sdhci-8.9a" and APM used
>> "arasan,sdhci-4.9a". These are documentation revisions.
>> In my opinion, that information is mostly worthless.
>>
>
> For the record, the important information conveyed by Rameshwar's
> email is the following:
>
> Arasan SD/SDIO/eMMC IP has a register which tells about the SD
> specification version and Vendor version number
> Reg Name: Host controller version register (offset 0FEh)
> bit [15:8] is for vendor version number,
> But, I have seen that Arasaan vendor version number is same as
> document revision number.
>
> (At first I had ignored the email because it repeated Mason's email
> without quoting, but then I realised it contained some information)
>
>
Values on real HW.
ZynqMP device
xsdb% mrd 0xFF1600FC
FF1600FC: 10020000
Zynq device:
xsdb% mrd 0xE01000FC
E01000FC: 89010000
Based on docs I have access to.
Specification_Version_Number (bits:23:16)
00 - SD Host Specification version 1.0
01 - SD Host Specification version 2.00 including only the feature of
the Test Register
02 - SD Host Specification version 3.00
Vendor_Version_Number 31:24
with 32bit access from FC
Thanks,
Michal
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: arasan,sdhci.txt "compatibility" DT binding
2016-11-28 15:44 ` Mason
@ 2016-11-28 16:23 ` Sebastian Frias
-1 siblings, 0 replies; 33+ messages in thread
From: Sebastian Frias @ 2016-11-28 16:23 UTC (permalink / raw)
To: Mason, linux-mmc, Shawn Lin, Adrian Hunter
Cc: Jisheng Zhang, Michal Simek, Rameshwar Sahu, Suman Tripathi,
Arnd Bergmann, Xiaobo Xie, P L Sai Krishna, Linus Walleij,
Anton Vorontsov, Heiko Stuebner, Michal Simek, Ulf Hansson,
Douglas Anderson, Linux ARM, Mark Rutland, Russell King,
Maxime Ripard, Suneel Garapati, Soren Brinkmann, Zach Brown
On 28/11/16 16:44, Mason wrote:
> Hello,
>
> @Shawn Lin, could you take a look below and tell me exactly
> which IP core(s) Rockchip is using in its SoCs?
>
> Based on the feedback I received, here is an updated list of
> compatible strings and controller versions dealt with by the
> drivers/mmc/host/sdhci-of-arasan.c code.
>
>
> Xilinx Zynq:
> "SD2.0 / SDIO2.0 / MMC3.31 AHB Host Controller"
> "arasan,sdhci-8.9a"
> NB: 8.9a is the documentation revision (dated 2011-10-19)
> subsequent tweaks labeled 9.0a, 9.1a, 9.2a
>
> Xilinx ZynqMP:
> "SD3.0 / SDIO3.0 / eMMC4.51 AHB Host Controller"
> "arasan,sdhci-8.9a"
> NB: using the same compatible string as Zynq
>
> Sigma SMP87xx
> "SD3.0 / SDIO3.0 / eMMC4.4 AHB Host Controller"
> no compatible string yet, platform-specific init required
>
> APM:
> "SD3.0 / SDIO3.0 / eMMC4.41 AHB Host Controller"
> "arasan,sdhci-4.9a"
> NB: 4.9a appears to be the documentation revision
> no functional diff with "arasan,sdhci-8.9a"
>
> Rockchip
> Exact IP unknown, waiting for Shawn's answer
> "arasan,sdhci-5.1"
> NB: 5.1 appears to refer to the eMMC standard supported
>
>
> On a final note, there are many variations of the Arasan IP.
> I've tracked down at least the following:
>
> SD_2.0_SDIO_2.0__MMC_3.31_AHB_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.41_OCP_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
> SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller.pdf
> SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller.pdf
>
> It seems to me the compatible string should specify
> the SD/SDIO version AND the eMMC version, since it
> seems many combinations are allowed, e.g. eMMC 4.51
> has two possible SD versions.
>
> What do you think?
I'm trying to picture this. Imagine:
a) SoC XYZ used two versions:
- SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
- SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
b) That the compatible suffixes were defined as "sd30-emmc44" and
"sd30-emmc45" respectively
c) That the chip-specific init is the same for both.
What would be the recommended way of dealing with that at DT/driver level?
1) XYZ's DT1: compatible = "arasan,sdhci-sd30-emmc44", "XYZ,sdhci"
DT2: compatible = "arasan,sdhci-sd30-emmc45", "XYZ,sdhci"
driver: match "XYZ,sdhci" for chip-specific init, and then leaves
"arasan,sdhci-sd30-emmc44" or arasan,sdhci-sd30-emmc45" for generic part
2) XYZ's DT1: compatible = "XYZ,arasan-sdhci-sd30-emmc44"
DT2: compatible = "XYZ,arasan-sdhci-sd30-emmc45"
driver: match "XYZ,arasan-sdhci-sd30-emmc44" or "XYZ,arasan-sdhci-sd30-emmc45"
for chip-specific init and generic parts
3) XYZ's DT1: compatible = "arasan,sdhci-sd30-emmc44"
DT2: compatible = "arasan,sdhci-sd30-emmc45"
driver: match "arasan,sdhci-sd30-emmc44" or "arasan,sdhci-sd30-emmc45" for
generic part; chip-specific init done somewhere else (bootloader?)
4) something else?
How would those solutions be affected if condition c) was changed to
"chip-specific init is different for both"?
>
> Regards.
>
^ permalink raw reply [flat|nested] 33+ messages in thread* arasan,sdhci.txt "compatibility" DT binding
@ 2016-11-28 16:23 ` Sebastian Frias
0 siblings, 0 replies; 33+ messages in thread
From: Sebastian Frias @ 2016-11-28 16:23 UTC (permalink / raw)
To: linux-arm-kernel
On 28/11/16 16:44, Mason wrote:
> Hello,
>
> @Shawn Lin, could you take a look below and tell me exactly
> which IP core(s) Rockchip is using in its SoCs?
>
> Based on the feedback I received, here is an updated list of
> compatible strings and controller versions dealt with by the
> drivers/mmc/host/sdhci-of-arasan.c code.
>
>
> Xilinx Zynq:
> "SD2.0 / SDIO2.0 / MMC3.31 AHB Host Controller"
> "arasan,sdhci-8.9a"
> NB: 8.9a is the documentation revision (dated 2011-10-19)
> subsequent tweaks labeled 9.0a, 9.1a, 9.2a
>
> Xilinx ZynqMP:
> "SD3.0 / SDIO3.0 / eMMC4.51 AHB Host Controller"
> "arasan,sdhci-8.9a"
> NB: using the same compatible string as Zynq
>
> Sigma SMP87xx
> "SD3.0 / SDIO3.0 / eMMC4.4 AHB Host Controller"
> no compatible string yet, platform-specific init required
>
> APM:
> "SD3.0 / SDIO3.0 / eMMC4.41 AHB Host Controller"
> "arasan,sdhci-4.9a"
> NB: 4.9a appears to be the documentation revision
> no functional diff with "arasan,sdhci-8.9a"
>
> Rockchip
> Exact IP unknown, waiting for Shawn's answer
> "arasan,sdhci-5.1"
> NB: 5.1 appears to refer to the eMMC standard supported
>
>
> On a final note, there are many variations of the Arasan IP.
> I've tracked down at least the following:
>
> SD_2.0_SDIO_2.0__MMC_3.31_AHB_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.41_OCP_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
> SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller.pdf
> SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller.pdf
>
> It seems to me the compatible string should specify
> the SD/SDIO version AND the eMMC version, since it
> seems many combinations are allowed, e.g. eMMC 4.51
> has two possible SD versions.
>
> What do you think?
I'm trying to picture this. Imagine:
a) SoC XYZ used two versions:
- SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
- SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
b) That the compatible suffixes were defined as "sd30-emmc44" and
"sd30-emmc45" respectively
c) That the chip-specific init is the same for both.
What would be the recommended way of dealing with that at DT/driver level?
1) XYZ's DT1: compatible = "arasan,sdhci-sd30-emmc44", "XYZ,sdhci"
DT2: compatible = "arasan,sdhci-sd30-emmc45", "XYZ,sdhci"
driver: match "XYZ,sdhci" for chip-specific init, and then leaves
"arasan,sdhci-sd30-emmc44" or arasan,sdhci-sd30-emmc45" for generic part
2) XYZ's DT1: compatible = "XYZ,arasan-sdhci-sd30-emmc44"
DT2: compatible = "XYZ,arasan-sdhci-sd30-emmc45"
driver: match "XYZ,arasan-sdhci-sd30-emmc44" or "XYZ,arasan-sdhci-sd30-emmc45"
for chip-specific init and generic parts
3) XYZ's DT1: compatible = "arasan,sdhci-sd30-emmc44"
DT2: compatible = "arasan,sdhci-sd30-emmc45"
driver: match "arasan,sdhci-sd30-emmc44" or "arasan,sdhci-sd30-emmc45" for
generic part; chip-specific init done somewhere else (bootloader?)
4) something else?
How would those solutions be affected if condition c) was changed to
"chip-specific init is different for both"?
>
> Regards.
>
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: arasan,sdhci.txt "compatibility" DT binding
2016-11-28 15:44 ` Mason
@ 2016-12-01 4:09 ` Shawn Lin
-1 siblings, 0 replies; 33+ messages in thread
From: Shawn Lin @ 2016-12-01 4:09 UTC (permalink / raw)
To: Mason, linux-mmc, Adrian Hunter
Cc: shawn.lin, Michal Simek, Rameshwar Sahu, Linux ARM,
Soren Brinkmann, Michal Simek, Anton Vorontsov, Xiaobo Xie,
Suman Tripathi, Linus Walleij, Maxime Ripard, Arnd Bergmann,
Rob Herring, Zach Brown, Ulf Hansson, Douglas Anderson,
Heiko Stuebner, Jisheng Zhang, Suneel Garapati, Russell King
On 2016/11/28 23:44, Mason wrote:
> Hello,
>
> @Shawn Lin, could you take a look below and tell me exactly
> which IP core(s) Rockchip is using in its SoCs?
>
From the Host Controller version register (0xfe)
bit[7:0]: 0x2 : specification version number is 3.00
bit[15:8]: 0x10: Vendor version number is 1.0
Command Queueing version register (0x200)
bit[11:8]: 0x5 eMMC Major version number
bit[7:4]: 0x1 eMMC manor version number
bit[3:0]: 0x0 eMMC version suffix
User guide "eMMC 5.1/SD3.0/SDIO3.0 Host Controller"
Revision number: 1.14
Released on Dec. 2014
> Based on the feedback I received, here is an updated list of
> compatible strings and controller versions dealt with by the
> drivers/mmc/host/sdhci-of-arasan.c code.
>
>
> Xilinx Zynq:
> "SD2.0 / SDIO2.0 / MMC3.31 AHB Host Controller"
> "arasan,sdhci-8.9a"
> NB: 8.9a is the documentation revision (dated 2011-10-19)
> subsequent tweaks labeled 9.0a, 9.1a, 9.2a
>
> Xilinx ZynqMP:
> "SD3.0 / SDIO3.0 / eMMC4.51 AHB Host Controller"
> "arasan,sdhci-8.9a"
> NB: using the same compatible string as Zynq
>
> Sigma SMP87xx
> "SD3.0 / SDIO3.0 / eMMC4.4 AHB Host Controller"
> no compatible string yet, platform-specific init required
>
> APM:
> "SD3.0 / SDIO3.0 / eMMC4.41 AHB Host Controller"
> "arasan,sdhci-4.9a"
> NB: 4.9a appears to be the documentation revision
> no functional diff with "arasan,sdhci-8.9a"
>
> Rockchip
> Exact IP unknown, waiting for Shawn's answer
> "arasan,sdhci-5.1"
> NB: 5.1 appears to refer to the eMMC standard supported
>
>
> On a final note, there are many variations of the Arasan IP.
> I've tracked down at least the following:
>
> SD_2.0_SDIO_2.0__MMC_3.31_AHB_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.41_OCP_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
> SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller.pdf
> SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller.pdf
>
> It seems to me the compatible string should specify
> the SD/SDIO version AND the eMMC version, since it
> seems many combinations are allowed, e.g. eMMC 4.51
> has two possible SD versions.
>
> What do you think?
>
> Regards.
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
Best Regards
Shawn Lin
^ permalink raw reply [flat|nested] 33+ messages in thread
* arasan,sdhci.txt "compatibility" DT binding
@ 2016-12-01 4:09 ` Shawn Lin
0 siblings, 0 replies; 33+ messages in thread
From: Shawn Lin @ 2016-12-01 4:09 UTC (permalink / raw)
To: linux-arm-kernel
On 2016/11/28 23:44, Mason wrote:
> Hello,
>
> @Shawn Lin, could you take a look below and tell me exactly
> which IP core(s) Rockchip is using in its SoCs?
>
From the Host Controller version register (0xfe)
bit[7:0]: 0x2 : specification version number is 3.00
bit[15:8]: 0x10: Vendor version number is 1.0
Command Queueing version register (0x200)
bit[11:8]: 0x5 eMMC Major version number
bit[7:4]: 0x1 eMMC manor version number
bit[3:0]: 0x0 eMMC version suffix
User guide "eMMC 5.1/SD3.0/SDIO3.0 Host Controller"
Revision number: 1.14
Released on Dec. 2014
> Based on the feedback I received, here is an updated list of
> compatible strings and controller versions dealt with by the
> drivers/mmc/host/sdhci-of-arasan.c code.
>
>
> Xilinx Zynq:
> "SD2.0 / SDIO2.0 / MMC3.31 AHB Host Controller"
> "arasan,sdhci-8.9a"
> NB: 8.9a is the documentation revision (dated 2011-10-19)
> subsequent tweaks labeled 9.0a, 9.1a, 9.2a
>
> Xilinx ZynqMP:
> "SD3.0 / SDIO3.0 / eMMC4.51 AHB Host Controller"
> "arasan,sdhci-8.9a"
> NB: using the same compatible string as Zynq
>
> Sigma SMP87xx
> "SD3.0 / SDIO3.0 / eMMC4.4 AHB Host Controller"
> no compatible string yet, platform-specific init required
>
> APM:
> "SD3.0 / SDIO3.0 / eMMC4.41 AHB Host Controller"
> "arasan,sdhci-4.9a"
> NB: 4.9a appears to be the documentation revision
> no functional diff with "arasan,sdhci-8.9a"
>
> Rockchip
> Exact IP unknown, waiting for Shawn's answer
> "arasan,sdhci-5.1"
> NB: 5.1 appears to refer to the eMMC standard supported
>
>
> On a final note, there are many variations of the Arasan IP.
> I've tracked down at least the following:
>
> SD_2.0_SDIO_2.0__MMC_3.31_AHB_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.41_OCP_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.4__AHB_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller.pdf
> SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller.pdf
> SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller.pdf
> SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller.pdf
>
> It seems to me the compatible string should specify
> the SD/SDIO version AND the eMMC version, since it
> seems many combinations are allowed, e.g. eMMC 4.51
> has two possible SD versions.
>
> What do you think?
>
> Regards.
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
Best Regards
Shawn Lin
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: arasan,sdhci.txt "compatibility" DT binding
2016-12-01 4:09 ` Shawn Lin
@ 2016-12-01 12:29 ` Mason
-1 siblings, 0 replies; 33+ messages in thread
From: Mason @ 2016-12-01 12:29 UTC (permalink / raw)
To: linux-mmc
Cc: Mark Rutland, Ulf Hansson, Rameshwar Sahu, Suman Tripathi,
Heiko Stuebner, Shawn Lin, Adrian Hunter, Jisheng Zhang,
Russell King, Anton Vorontsov, Michal Simek, Soren Brinkmann,
Linus Walleij, P L Sai Krishna, Zach Brown, Sebastian Frias,
Arnd Bergmann, Suneel Garapati, Linux ARM, Michal Simek,
Douglas Anderson, Maxime Ripard, Xiaobo Xie
On 01/12/2016 05:09, Shawn Lin wrote:
> On 2016/11/28 23:44, Mason wrote:
>
>> Shawn Lin, could you take a look below and tell me exactly
>> which IP core(s) Rockchip is using in its SoCs?
>
> From the Host Controller version register (0xfe)
> bit[7:0]: 0x2 : specification version number is 3.00
> bit[15:8]: 0x10: Vendor version number is 1.0
>
> Command Queueing version register (0x200)
> bit[11:8]: 0x5 eMMC Major version number
> bit[7:4]: 0x1 eMMC manor version number
> bit[3:0]: 0x0 eMMC version suffix
>
> User guide "eMMC 5.1/SD3.0/SDIO3.0 Host Controller"
> Revision number: 1.14
> Released on Dec. 2014
Wow! Yet another HW revision I wasn't aware of :-)
For the record, I think the 0x200 register was introduced fairly
recently, as it's not documented in any of the user guides I have
access to.
To summarize the situation, Arasan has made (at least) the
following versions of the HW block:
SD_2.0_SDIO_2.0__MMC_3.31_Host_Controller
SD_3.0_SDIO_3.0_eMMC_4.4__Host_Controller
SD_3.0_SDIO_3.0_eMMC_4.41_Host_Controller
SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller
SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller
SD_3.0_SDIO_3.0_eMMC_5.1__Host Controller
SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller
SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller
Xilinx = "arasan,sdhci-8.9a" compat string
SD2.0 / SDIO2.0 / MMC3.31 (in Zynq)
SD3.0 / SDIO3.0 / eMMC4.51 (in ZynqMP)
Vendor version 0x89 (Zynq, from 8.9a) and 0x10 (ZynqMP)
Sigma = no compat string yet
SD3.0 / SDIO3.0 / eMMC4.4 (in SMP87xx)
Vendor version 0x99 (not related to document revision)
APM = "arasan,sdhci-4.9a"
SD3.0 / SDIO3.0 / eMMC4.41
Vendor version unknown
Rockchip = "arasan,sdhci-5.1"
SD3.0 / SDIO3.0 / eMMC 5.1
Vendor version 0x10
Conclusion, it doesn't look like the "Vendor version" field
contains dependable information, considering the duplicate
0x10 in different HW revisions.
Regards.
^ permalink raw reply [flat|nested] 33+ messages in thread
* arasan,sdhci.txt "compatibility" DT binding
@ 2016-12-01 12:29 ` Mason
0 siblings, 0 replies; 33+ messages in thread
From: Mason @ 2016-12-01 12:29 UTC (permalink / raw)
To: linux-arm-kernel
On 01/12/2016 05:09, Shawn Lin wrote:
> On 2016/11/28 23:44, Mason wrote:
>
>> Shawn Lin, could you take a look below and tell me exactly
>> which IP core(s) Rockchip is using in its SoCs?
>
> From the Host Controller version register (0xfe)
> bit[7:0]: 0x2 : specification version number is 3.00
> bit[15:8]: 0x10: Vendor version number is 1.0
>
> Command Queueing version register (0x200)
> bit[11:8]: 0x5 eMMC Major version number
> bit[7:4]: 0x1 eMMC manor version number
> bit[3:0]: 0x0 eMMC version suffix
>
> User guide "eMMC 5.1/SD3.0/SDIO3.0 Host Controller"
> Revision number: 1.14
> Released on Dec. 2014
Wow! Yet another HW revision I wasn't aware of :-)
For the record, I think the 0x200 register was introduced fairly
recently, as it's not documented in any of the user guides I have
access to.
To summarize the situation, Arasan has made (at least) the
following versions of the HW block:
SD_2.0_SDIO_2.0__MMC_3.31_Host_Controller
SD_3.0_SDIO_3.0_eMMC_4.4__Host_Controller
SD_3.0_SDIO_3.0_eMMC_4.41_Host_Controller
SD_3.0_SDIO_3.0_eMMC_4.5__Host_Controller
SD_3.0_SDIO_3.0_eMMC_4.51_Host_Controller
SD_3.0_SDIO_3.0_eMMC_5.1__Host Controller
SD_4.1_SDIO_4.1_eMMC_4.51_Host_Controller
SD_4.1_SDIO_4.1_eMMC_5.1__Host_Controller
Xilinx = "arasan,sdhci-8.9a" compat string
SD2.0 / SDIO2.0 / MMC3.31 (in Zynq)
SD3.0 / SDIO3.0 / eMMC4.51 (in ZynqMP)
Vendor version 0x89 (Zynq, from 8.9a) and 0x10 (ZynqMP)
Sigma = no compat string yet
SD3.0 / SDIO3.0 / eMMC4.4 (in SMP87xx)
Vendor version 0x99 (not related to document revision)
APM = "arasan,sdhci-4.9a"
SD3.0 / SDIO3.0 / eMMC4.41
Vendor version unknown
Rockchip = "arasan,sdhci-5.1"
SD3.0 / SDIO3.0 / eMMC 5.1
Vendor version 0x10
Conclusion, it doesn't look like the "Vendor version" field
contains dependable information, considering the duplicate
0x10 in different HW revisions.
Regards.
^ permalink raw reply [flat|nested] 33+ messages in thread