From: xuwei5@hisilicon.com (Wei Xu)
To: linux-arm-kernel@lists.infradead.org
Subject: [V2 2/2] arm64: dts: Add dts files for Hisilicon Hi3660 SoC
Date: Mon, 23 Jan 2017 14:03:27 +0000 [thread overview]
Message-ID: <58860D2F.6070007@hisilicon.com> (raw)
In-Reply-To: <20170123134656.GC16286@leverpostej>
Hi Mark,
On 2017/1/23 13:46, Mark Rutland wrote:
> On Tue, Jan 10, 2017 at 03:55:15PM +0800, Chen Feng wrote:
>> + memory at 0 {
>> + device_type = "memory";
>> + reg = <0x0 0x00400000 0x0 0xbfe00000>;
>> + };
>
> The unit-address here is incorrect. The base address of this memory is
> not zero.
>
>> + timer {
>> + compatible = "arm,armv8-timer";
>> + interrupt-parent = <&gic>;
>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
>> + clock-frequency = <1920000>;
>> + };
>
> This clock-frequency property should not be required; please remove it.
>
> Your FW should program CNTFRQ_EL0 with the timer frequency.
Thanks!
Hi Chen Feng,
Can you send out the v3 to address above comments?
And I will pick up it soon.
Best Regards,
Wei
>
> Thanks,
> Mark.
>
> .
>
WARNING: multiple messages have this Message-ID (diff)
From: Wei Xu <xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
To: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Chen Feng <puck.chen-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
catalin.marinas-5wv7dgnIgG8@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
puck.chen-H32Fclmsjq1BDgjK7y7TUQ@public.gmane.org,
dan.zhao-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
suzhuangluan-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
saberlily.xia-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
xuyiping-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
qijiwen-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
Linuxarm <linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
Subject: Re: [V2 2/2] arm64: dts: Add dts files for Hisilicon Hi3660 SoC
Date: Mon, 23 Jan 2017 14:03:27 +0000 [thread overview]
Message-ID: <58860D2F.6070007@hisilicon.com> (raw)
In-Reply-To: <20170123134656.GC16286@leverpostej>
Hi Mark,
On 2017/1/23 13:46, Mark Rutland wrote:
> On Tue, Jan 10, 2017 at 03:55:15PM +0800, Chen Feng wrote:
>> + memory@0 {
>> + device_type = "memory";
>> + reg = <0x0 0x00400000 0x0 0xbfe00000>;
>> + };
>
> The unit-address here is incorrect. The base address of this memory is
> not zero.
>
>> + timer {
>> + compatible = "arm,armv8-timer";
>> + interrupt-parent = <&gic>;
>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
>> + clock-frequency = <1920000>;
>> + };
>
> This clock-frequency property should not be required; please remove it.
>
> Your FW should program CNTFRQ_EL0 with the timer frequency.
Thanks!
Hi Chen Feng,
Can you send out the v3 to address above comments?
And I will pick up it soon.
Best Regards,
Wei
>
> Thanks,
> Mark.
>
> .
>
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WARNING: multiple messages have this Message-ID (diff)
From: Wei Xu <xuwei5@hisilicon.com>
To: Mark Rutland <mark.rutland@arm.com>, Chen Feng <puck.chen@hisilicon.com>
Cc: <robh+dt@kernel.org>, <catalin.marinas@arm.com>,
<will.deacon@arm.com>, <linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<puck.chen@foxmail.com>, <dan.zhao@hisilicon.com>,
<suzhuangluan@hisilicon.com>, <saberlily.xia@hisilicon.com>,
<xuyiping@hisilicon.com>, <qijiwen@hisilicon.com>,
Linuxarm <linuxarm@huawei.com>
Subject: Re: [V2 2/2] arm64: dts: Add dts files for Hisilicon Hi3660 SoC
Date: Mon, 23 Jan 2017 14:03:27 +0000 [thread overview]
Message-ID: <58860D2F.6070007@hisilicon.com> (raw)
In-Reply-To: <20170123134656.GC16286@leverpostej>
Hi Mark,
On 2017/1/23 13:46, Mark Rutland wrote:
> On Tue, Jan 10, 2017 at 03:55:15PM +0800, Chen Feng wrote:
>> + memory@0 {
>> + device_type = "memory";
>> + reg = <0x0 0x00400000 0x0 0xbfe00000>;
>> + };
>
> The unit-address here is incorrect. The base address of this memory is
> not zero.
>
>> + timer {
>> + compatible = "arm,armv8-timer";
>> + interrupt-parent = <&gic>;
>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
>> + clock-frequency = <1920000>;
>> + };
>
> This clock-frequency property should not be required; please remove it.
>
> Your FW should program CNTFRQ_EL0 with the timer frequency.
Thanks!
Hi Chen Feng,
Can you send out the v3 to address above comments?
And I will pick up it soon.
Best Regards,
Wei
>
> Thanks,
> Mark.
>
> .
>
next prev parent reply other threads:[~2017-01-23 14:03 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-10 7:55 [V2 1/2] document: dt: add binding for Hi3660 SoC Chen Feng
2017-01-10 7:55 ` Chen Feng
2017-01-10 7:55 ` Chen Feng
2017-01-10 7:55 ` [V2 2/2] arm64: dts: Add dts files for Hisilicon " Chen Feng
2017-01-10 7:55 ` Chen Feng
2017-01-10 7:55 ` Chen Feng
2017-01-23 13:46 ` Mark Rutland
2017-01-23 13:46 ` Mark Rutland
2017-01-23 13:46 ` Mark Rutland
2017-01-23 14:03 ` Wei Xu [this message]
2017-01-23 14:03 ` Wei Xu
2017-01-23 14:03 ` Wei Xu
2017-01-23 14:13 ` Sudeep Holla
2017-01-23 14:13 ` Sudeep Holla
2017-01-23 14:13 ` Sudeep Holla
2017-01-20 14:56 ` [V2 1/2] document: dt: add binding for " Wei Xu
2017-01-20 14:56 ` Wei Xu
2017-01-20 14:56 ` Wei Xu
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