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* [PATCH libdrm] amdgpu: stop reading CC_RB_BACKEND_DISABLE on Vega10
@ 2017-03-27 13:44 Christian König
       [not found] ` <1490622254-1835-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
  0 siblings, 1 reply; 3+ messages in thread
From: Christian König @ 2017-03-27 13:44 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

From: Christian König <christian.koenig@amd.com>

Follow up to 'drm: don't access deprecated register on Vega10'.

The same information is available in enabled_rb_pipes_mask and reading that
register can cause GRBM bus problems.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 amdgpu/amdgpu_gpu_info.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/amdgpu/amdgpu_gpu_info.c b/amdgpu/amdgpu_gpu_info.c
index 14754fb..1b39c96 100644
--- a/amdgpu/amdgpu_gpu_info.c
+++ b/amdgpu/amdgpu_gpu_info.c
@@ -176,20 +176,20 @@ drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev)
 	dev->info.vce_harvest_config = dev->dev_info.vce_harvest_config;
 	dev->info.pci_rev_id = dev->dev_info.pci_rev;
 
-	for (i = 0; i < (int)dev->info.num_shader_engines; i++) {
-		unsigned instance = (i << AMDGPU_INFO_MMR_SE_INDEX_SHIFT) |
-				    (AMDGPU_INFO_MMR_SH_INDEX_MASK <<
-				     AMDGPU_INFO_MMR_SH_INDEX_SHIFT);
+	if (dev->info.family_id < AMDGPU_FAMILY_AI) {
+		for (i = 0; i < (int)dev->info.num_shader_engines; i++) {
+			unsigned instance = (i << AMDGPU_INFO_MMR_SE_INDEX_SHIFT) |
+					    (AMDGPU_INFO_MMR_SH_INDEX_MASK <<
+					     AMDGPU_INFO_MMR_SH_INDEX_SHIFT);
 
-		r = amdgpu_read_mm_registers(dev, 0x263d, 1, instance, 0,
-					     &dev->info.backend_disable[i]);
-		if (r)
-			return r;
-		/* extract bitfield CC_RB_BACKEND_DISABLE.BACKEND_DISABLE */
-		dev->info.backend_disable[i] =
-			(dev->info.backend_disable[i] >> 16) & 0xff;
+			r = amdgpu_read_mm_registers(dev, 0x263d, 1, instance, 0,
+						     &dev->info.backend_disable[i]);
+			if (r)
+				return r;
+			/* extract bitfield CC_RB_BACKEND_DISABLE.BACKEND_DISABLE */
+			dev->info.backend_disable[i] =
+				(dev->info.backend_disable[i] >> 16) & 0xff;
 
-		if (dev->info.family_id < AMDGPU_FAMILY_AI) {
 			r = amdgpu_read_mm_registers(dev, 0xa0d4, 1, instance, 0,
 						     &dev->info.pa_sc_raster_cfg[i]);
 			if (r)
-- 
2.5.0

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH libdrm] amdgpu: stop reading CC_RB_BACKEND_DISABLE on Vega10
       [not found] ` <1490622254-1835-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-03-27 13:48   ` Marek Olšák
  2017-03-28  1:33   ` Zhang, Jerry (Junwei)
  1 sibling, 0 replies; 3+ messages in thread
From: Marek Olšák @ 2017-03-27 13:48 UTC (permalink / raw)
  To: Christian König; +Cc: amd-gfx mailing list

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

Marek

On Mon, Mar 27, 2017 at 3:44 PM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> Follow up to 'drm: don't access deprecated register on Vega10'.
>
> The same information is available in enabled_rb_pipes_mask and reading that
> register can cause GRBM bus problems.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
>  amdgpu/amdgpu_gpu_info.c | 24 ++++++++++++------------
>  1 file changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/amdgpu/amdgpu_gpu_info.c b/amdgpu/amdgpu_gpu_info.c
> index 14754fb..1b39c96 100644
> --- a/amdgpu/amdgpu_gpu_info.c
> +++ b/amdgpu/amdgpu_gpu_info.c
> @@ -176,20 +176,20 @@ drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev)
>         dev->info.vce_harvest_config = dev->dev_info.vce_harvest_config;
>         dev->info.pci_rev_id = dev->dev_info.pci_rev;
>
> -       for (i = 0; i < (int)dev->info.num_shader_engines; i++) {
> -               unsigned instance = (i << AMDGPU_INFO_MMR_SE_INDEX_SHIFT) |
> -                                   (AMDGPU_INFO_MMR_SH_INDEX_MASK <<
> -                                    AMDGPU_INFO_MMR_SH_INDEX_SHIFT);
> +       if (dev->info.family_id < AMDGPU_FAMILY_AI) {
> +               for (i = 0; i < (int)dev->info.num_shader_engines; i++) {
> +                       unsigned instance = (i << AMDGPU_INFO_MMR_SE_INDEX_SHIFT) |
> +                                           (AMDGPU_INFO_MMR_SH_INDEX_MASK <<
> +                                            AMDGPU_INFO_MMR_SH_INDEX_SHIFT);
>
> -               r = amdgpu_read_mm_registers(dev, 0x263d, 1, instance, 0,
> -                                            &dev->info.backend_disable[i]);
> -               if (r)
> -                       return r;
> -               /* extract bitfield CC_RB_BACKEND_DISABLE.BACKEND_DISABLE */
> -               dev->info.backend_disable[i] =
> -                       (dev->info.backend_disable[i] >> 16) & 0xff;
> +                       r = amdgpu_read_mm_registers(dev, 0x263d, 1, instance, 0,
> +                                                    &dev->info.backend_disable[i]);
> +                       if (r)
> +                               return r;
> +                       /* extract bitfield CC_RB_BACKEND_DISABLE.BACKEND_DISABLE */
> +                       dev->info.backend_disable[i] =
> +                               (dev->info.backend_disable[i] >> 16) & 0xff;
>
> -               if (dev->info.family_id < AMDGPU_FAMILY_AI) {
>                         r = amdgpu_read_mm_registers(dev, 0xa0d4, 1, instance, 0,
>                                                      &dev->info.pa_sc_raster_cfg[i]);
>                         if (r)
> --
> 2.5.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH libdrm] amdgpu: stop reading CC_RB_BACKEND_DISABLE on Vega10
       [not found] ` <1490622254-1835-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
  2017-03-27 13:48   ` Marek Olšák
@ 2017-03-28  1:33   ` Zhang, Jerry (Junwei)
  1 sibling, 0 replies; 3+ messages in thread
From: Zhang, Jerry (Junwei) @ 2017-03-28  1:33 UTC (permalink / raw)
  To: Christian König, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

On 03/27/2017 09:44 PM, Christian König wrote:
> From: Christian König <christian.koenig@amd.com>
>
> Follow up to 'drm: don't access deprecated register on Vega10'.
>
> The same information is available in enabled_rb_pipes_mask and reading that
> register can cause GRBM bus problems.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>

> ---
>   amdgpu/amdgpu_gpu_info.c | 24 ++++++++++++------------
>   1 file changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/amdgpu/amdgpu_gpu_info.c b/amdgpu/amdgpu_gpu_info.c
> index 14754fb..1b39c96 100644
> --- a/amdgpu/amdgpu_gpu_info.c
> +++ b/amdgpu/amdgpu_gpu_info.c
> @@ -176,20 +176,20 @@ drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev)
>   	dev->info.vce_harvest_config = dev->dev_info.vce_harvest_config;
>   	dev->info.pci_rev_id = dev->dev_info.pci_rev;
>
> -	for (i = 0; i < (int)dev->info.num_shader_engines; i++) {
> -		unsigned instance = (i << AMDGPU_INFO_MMR_SE_INDEX_SHIFT) |
> -				    (AMDGPU_INFO_MMR_SH_INDEX_MASK <<
> -				     AMDGPU_INFO_MMR_SH_INDEX_SHIFT);
> +	if (dev->info.family_id < AMDGPU_FAMILY_AI) {
> +		for (i = 0; i < (int)dev->info.num_shader_engines; i++) {
> +			unsigned instance = (i << AMDGPU_INFO_MMR_SE_INDEX_SHIFT) |
> +					    (AMDGPU_INFO_MMR_SH_INDEX_MASK <<
> +					     AMDGPU_INFO_MMR_SH_INDEX_SHIFT);
>
> -		r = amdgpu_read_mm_registers(dev, 0x263d, 1, instance, 0,
> -					     &dev->info.backend_disable[i]);
> -		if (r)
> -			return r;
> -		/* extract bitfield CC_RB_BACKEND_DISABLE.BACKEND_DISABLE */
> -		dev->info.backend_disable[i] =
> -			(dev->info.backend_disable[i] >> 16) & 0xff;
> +			r = amdgpu_read_mm_registers(dev, 0x263d, 1, instance, 0,
> +						     &dev->info.backend_disable[i]);
> +			if (r)
> +				return r;
> +			/* extract bitfield CC_RB_BACKEND_DISABLE.BACKEND_DISABLE */
> +			dev->info.backend_disable[i] =
> +				(dev->info.backend_disable[i] >> 16) & 0xff;
>
> -		if (dev->info.family_id < AMDGPU_FAMILY_AI) {
>   			r = amdgpu_read_mm_registers(dev, 0xa0d4, 1, instance, 0,
>   						     &dev->info.pa_sc_raster_cfg[i]);
>   			if (r)
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2017-03-28  1:33 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2017-03-27 13:44 [PATCH libdrm] amdgpu: stop reading CC_RB_BACKEND_DISABLE on Vega10 Christian König
     [not found] ` <1490622254-1835-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-03-27 13:48   ` Marek Olšák
2017-03-28  1:33   ` Zhang, Jerry (Junwei)

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