* [PATCH] drm/amdgpu: extend vm flags to 64-bit in tracepoint
@ 2017-04-24 6:43 Junwei Zhang
[not found] ` <1493016220-2645-1-git-send-email-Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 4+ messages in thread
From: Junwei Zhang @ 2017-04-24 6:43 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Junwei Zhang
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
index 8676eff..998ff4d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
@@ -221,7 +221,7 @@
__field(long, start)
__field(long, last)
__field(u64, offset)
- __field(u32, flags)
+ __field(u64, flags)
),
TP_fast_assign(
@@ -231,7 +231,7 @@
__entry->offset = mapping->offset;
__entry->flags = mapping->flags;
),
- TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%08x",
+ TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%010llx",
__entry->bo, __entry->start, __entry->last,
__entry->offset, __entry->flags)
);
@@ -245,7 +245,7 @@
__field(long, start)
__field(long, last)
__field(u64, offset)
- __field(u32, flags)
+ __field(u64, flags)
),
TP_fast_assign(
@@ -255,7 +255,7 @@
__entry->offset = mapping->offset;
__entry->flags = mapping->flags;
),
- TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%08x",
+ TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%010llx",
__entry->bo, __entry->start, __entry->last,
__entry->offset, __entry->flags)
);
@@ -266,7 +266,7 @@
TP_STRUCT__entry(
__field(u64, soffset)
__field(u64, eoffset)
- __field(u32, flags)
+ __field(u64, flags)
),
TP_fast_assign(
@@ -274,7 +274,7 @@
__entry->eoffset = mapping->it.last + 1;
__entry->flags = mapping->flags;
),
- TP_printk("soffs=%010llx, eoffs=%010llx, flags=%08x",
+ TP_printk("soffs=%010llx, eoffs=%010llx, flags=%010llx",
__entry->soffset, __entry->eoffset, __entry->flags)
);
@@ -290,14 +290,14 @@
TRACE_EVENT(amdgpu_vm_set_ptes,
TP_PROTO(uint64_t pe, uint64_t addr, unsigned count,
- uint32_t incr, uint32_t flags),
+ uint32_t incr, uint64_t flags),
TP_ARGS(pe, addr, count, incr, flags),
TP_STRUCT__entry(
__field(u64, pe)
__field(u64, addr)
__field(u32, count)
__field(u32, incr)
- __field(u32, flags)
+ __field(u64, flags)
),
TP_fast_assign(
@@ -307,7 +307,7 @@
__entry->incr = incr;
__entry->flags = flags;
),
- TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%08x, count=%u",
+ TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%010Lx, count=%u",
__entry->pe, __entry->addr, __entry->incr,
__entry->flags, __entry->count)
);
--
1.9.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread[parent not found: <1493016220-2645-1-git-send-email-Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>]
* Re: [PATCH] drm/amdgpu: extend vm flags to 64-bit in tracepoint [not found] ` <1493016220-2645-1-git-send-email-Jerry.Zhang-5C7GfCeVMHo@public.gmane.org> @ 2017-04-24 8:55 ` Christian König [not found] ` <87ebb269-c73d-1ab5-5004-aaf1f8bf9514-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> 0 siblings, 1 reply; 4+ messages in thread From: Christian König @ 2017-04-24 8:55 UTC (permalink / raw) To: Junwei Zhang, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Am 24.04.2017 um 08:43 schrieb Junwei Zhang: > Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 18 +++++++++--------- > 1 file changed, 9 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h > index 8676eff..998ff4d 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h > @@ -221,7 +221,7 @@ > __field(long, start) > __field(long, last) > __field(u64, offset) > - __field(u32, flags) > + __field(u64, flags) > ), > > TP_fast_assign( > @@ -231,7 +231,7 @@ > __entry->offset = mapping->offset; > __entry->flags = mapping->flags; > ), > - TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%08x", > + TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%010llx", The full 64bit flags need to be printed with %016llx. We only use %010llx for the 40bit addresses and even that needs to be extended to %048llx for Vega10. With that fixed the patch is Reviewed-by: Christian König <christian.koenig@amd.com> Regards, Christian. > __entry->bo, __entry->start, __entry->last, > __entry->offset, __entry->flags) > ); > @@ -245,7 +245,7 @@ > __field(long, start) > __field(long, last) > __field(u64, offset) > - __field(u32, flags) > + __field(u64, flags) > ), > > TP_fast_assign( > @@ -255,7 +255,7 @@ > __entry->offset = mapping->offset; > __entry->flags = mapping->flags; > ), > - TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%08x", > + TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%010llx", > __entry->bo, __entry->start, __entry->last, > __entry->offset, __entry->flags) > ); > @@ -266,7 +266,7 @@ > TP_STRUCT__entry( > __field(u64, soffset) > __field(u64, eoffset) > - __field(u32, flags) > + __field(u64, flags) > ), > > TP_fast_assign( > @@ -274,7 +274,7 @@ > __entry->eoffset = mapping->it.last + 1; > __entry->flags = mapping->flags; > ), > - TP_printk("soffs=%010llx, eoffs=%010llx, flags=%08x", > + TP_printk("soffs=%010llx, eoffs=%010llx, flags=%010llx", > __entry->soffset, __entry->eoffset, __entry->flags) > ); > > @@ -290,14 +290,14 @@ > > TRACE_EVENT(amdgpu_vm_set_ptes, > TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, > - uint32_t incr, uint32_t flags), > + uint32_t incr, uint64_t flags), > TP_ARGS(pe, addr, count, incr, flags), > TP_STRUCT__entry( > __field(u64, pe) > __field(u64, addr) > __field(u32, count) > __field(u32, incr) > - __field(u32, flags) > + __field(u64, flags) > ), > > TP_fast_assign( > @@ -307,7 +307,7 @@ > __entry->incr = incr; > __entry->flags = flags; > ), > - TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%08x, count=%u", > + TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%010Lx, count=%u", > __entry->pe, __entry->addr, __entry->incr, > __entry->flags, __entry->count) > ); _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 4+ messages in thread
[parent not found: <87ebb269-c73d-1ab5-5004-aaf1f8bf9514-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>]
* Re: [PATCH] drm/amdgpu: extend vm flags to 64-bit in tracepoint [not found] ` <87ebb269-c73d-1ab5-5004-aaf1f8bf9514-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> @ 2017-04-24 8:56 ` Christian König [not found] ` <8d18068b-37a3-4a1b-b86d-6d9fcb171699-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> 0 siblings, 1 reply; 4+ messages in thread From: Christian König @ 2017-04-24 8:56 UTC (permalink / raw) To: Junwei Zhang, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Am 24.04.2017 um 10:55 schrieb Christian König: > Am 24.04.2017 um 08:43 schrieb Junwei Zhang: >> Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> >> --- >> drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 18 +++++++++--------- >> 1 file changed, 9 insertions(+), 9 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h >> b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h >> index 8676eff..998ff4d 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h >> @@ -221,7 +221,7 @@ >> __field(long, start) >> __field(long, last) >> __field(u64, offset) >> - __field(u32, flags) >> + __field(u64, flags) >> ), >> TP_fast_assign( >> @@ -231,7 +231,7 @@ >> __entry->offset = mapping->offset; >> __entry->flags = mapping->flags; >> ), >> - TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, >> flags=%08x", >> + TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, >> flags=%010llx", > > The full 64bit flags need to be printed with %016llx. > > We only use %010llx for the 40bit addresses and even that needs to be > extended to %048llx for Vega10. Ups, hit send to early. That should read "needs to be extended to %012llx for Vega10 because it has 48bit addresses". Christian. > > With that fixed the patch is Reviewed-by: Christian König > <christian.koenig@amd.com> > > Regards, > Christian. > >> __entry->bo, __entry->start, __entry->last, >> __entry->offset, __entry->flags) >> ); >> @@ -245,7 +245,7 @@ >> __field(long, start) >> __field(long, last) >> __field(u64, offset) >> - __field(u32, flags) >> + __field(u64, flags) >> ), >> TP_fast_assign( >> @@ -255,7 +255,7 @@ >> __entry->offset = mapping->offset; >> __entry->flags = mapping->flags; >> ), >> - TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, >> flags=%08x", >> + TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, >> flags=%010llx", >> __entry->bo, __entry->start, __entry->last, >> __entry->offset, __entry->flags) >> ); >> @@ -266,7 +266,7 @@ >> TP_STRUCT__entry( >> __field(u64, soffset) >> __field(u64, eoffset) >> - __field(u32, flags) >> + __field(u64, flags) >> ), >> TP_fast_assign( >> @@ -274,7 +274,7 @@ >> __entry->eoffset = mapping->it.last + 1; >> __entry->flags = mapping->flags; >> ), >> - TP_printk("soffs=%010llx, eoffs=%010llx, flags=%08x", >> + TP_printk("soffs=%010llx, eoffs=%010llx, flags=%010llx", >> __entry->soffset, __entry->eoffset, __entry->flags) >> ); >> @@ -290,14 +290,14 @@ >> TRACE_EVENT(amdgpu_vm_set_ptes, >> TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, >> - uint32_t incr, uint32_t flags), >> + uint32_t incr, uint64_t flags), >> TP_ARGS(pe, addr, count, incr, flags), >> TP_STRUCT__entry( >> __field(u64, pe) >> __field(u64, addr) >> __field(u32, count) >> __field(u32, incr) >> - __field(u32, flags) >> + __field(u64, flags) >> ), >> TP_fast_assign( >> @@ -307,7 +307,7 @@ >> __entry->incr = incr; >> __entry->flags = flags; >> ), >> - TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%08x, >> count=%u", >> + TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%010Lx, >> count=%u", >> __entry->pe, __entry->addr, __entry->incr, >> __entry->flags, __entry->count) >> ); > > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 4+ messages in thread
[parent not found: <8d18068b-37a3-4a1b-b86d-6d9fcb171699-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>]
* Re: [PATCH] drm/amdgpu: extend vm flags to 64-bit in tracepoint [not found] ` <8d18068b-37a3-4a1b-b86d-6d9fcb171699-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> @ 2017-04-25 1:58 ` Zhang, Jerry (Junwei) 0 siblings, 0 replies; 4+ messages in thread From: Zhang, Jerry (Junwei) @ 2017-04-25 1:58 UTC (permalink / raw) To: Christian König, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW On 04/24/2017 04:56 PM, Christian König wrote: > Am 24.04.2017 um 10:55 schrieb Christian König: >> Am 24.04.2017 um 08:43 schrieb Junwei Zhang: >>> Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> >>> --- >>> drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 18 +++++++++--------- >>> 1 file changed, 9 insertions(+), 9 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h >>> index 8676eff..998ff4d 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h >>> @@ -221,7 +221,7 @@ >>> __field(long, start) >>> __field(long, last) >>> __field(u64, offset) >>> - __field(u32, flags) >>> + __field(u64, flags) >>> ), >>> TP_fast_assign( >>> @@ -231,7 +231,7 @@ >>> __entry->offset = mapping->offset; >>> __entry->flags = mapping->flags; >>> ), >>> - TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%08x", >>> + TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%010llx", >> >> The full 64bit flags need to be printed with %016llx. >> >> We only use %010llx for the 40bit addresses and even that needs to be >> extended to %048llx for Vega10. > > Ups, hit send to early. That should read "needs to be extended to %012llx for > Vega10 because it has 48bit addresses". You reminder me that the flags may be printed as: - flags: %015llx (58-bit at most for vega10) About the address, like offset/soffs/eoffs/pe/addr, need to be - addr: %012llx (48-bit) How do you think about it? BTW, anyway it turns out to print the correct result, even if the format is less than the output. Jerry > > Christian. > >> >> With that fixed the patch is Reviewed-by: Christian König >> <christian.koenig@amd.com> >> >> Regards, >> Christian. >> >>> __entry->bo, __entry->start, __entry->last, >>> __entry->offset, __entry->flags) >>> ); >>> @@ -245,7 +245,7 @@ >>> __field(long, start) >>> __field(long, last) >>> __field(u64, offset) >>> - __field(u32, flags) >>> + __field(u64, flags) >>> ), >>> TP_fast_assign( >>> @@ -255,7 +255,7 @@ >>> __entry->offset = mapping->offset; >>> __entry->flags = mapping->flags; >>> ), >>> - TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%08x", >>> + TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%010llx", >>> __entry->bo, __entry->start, __entry->last, >>> __entry->offset, __entry->flags) >>> ); >>> @@ -266,7 +266,7 @@ >>> TP_STRUCT__entry( >>> __field(u64, soffset) >>> __field(u64, eoffset) >>> - __field(u32, flags) >>> + __field(u64, flags) >>> ), >>> TP_fast_assign( >>> @@ -274,7 +274,7 @@ >>> __entry->eoffset = mapping->it.last + 1; >>> __entry->flags = mapping->flags; >>> ), >>> - TP_printk("soffs=%010llx, eoffs=%010llx, flags=%08x", >>> + TP_printk("soffs=%010llx, eoffs=%010llx, flags=%010llx", >>> __entry->soffset, __entry->eoffset, __entry->flags) >>> ); >>> @@ -290,14 +290,14 @@ >>> TRACE_EVENT(amdgpu_vm_set_ptes, >>> TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, >>> - uint32_t incr, uint32_t flags), >>> + uint32_t incr, uint64_t flags), >>> TP_ARGS(pe, addr, count, incr, flags), >>> TP_STRUCT__entry( >>> __field(u64, pe) >>> __field(u64, addr) >>> __field(u32, count) >>> __field(u32, incr) >>> - __field(u32, flags) >>> + __field(u64, flags) >>> ), >>> TP_fast_assign( >>> @@ -307,7 +307,7 @@ >>> __entry->incr = incr; >>> __entry->flags = flags; >>> ), >>> - TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%08x, count=%u", >>> + TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%010Lx, count=%u", >>> __entry->pe, __entry->addr, __entry->incr, >>> __entry->flags, __entry->count) >>> ); >> >> >> _______________________________________________ >> amd-gfx mailing list >> amd-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/amd-gfx > > _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-04-25 1:58 UTC | newest]
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2017-04-24 6:43 [PATCH] drm/amdgpu: extend vm flags to 64-bit in tracepoint Junwei Zhang
[not found] ` <1493016220-2645-1-git-send-email-Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>
2017-04-24 8:55 ` Christian König
[not found] ` <87ebb269-c73d-1ab5-5004-aaf1f8bf9514-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-04-24 8:56 ` Christian König
[not found] ` <8d18068b-37a3-4a1b-b86d-6d9fcb171699-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-04-25 1:58 ` Zhang, Jerry (Junwei)
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