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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: Stephen Boyd <sboyd@kernel.org>,
	Conor Dooley <conor.dooley@microchip.com>,
	Daire McNamara <daire.mcnamara@microchip.com>,
	pierre-henry.moussay@microchip.com,
	valentina.fernandezalanis@microchip.com,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Jassi Brar <jassisinghbrar@gmail.com>, Lee Jones <lee@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH v2 2/9] dt-bindings: soc: microchip: document the simple-mfd syscon on PolarFire SoC
Date: Wed, 26 Mar 2025 07:53:55 +0100	[thread overview]
Message-ID: <58bb1186-08ee-41cf-8593-a6664bd874e6@kernel.org> (raw)
In-Reply-To: <20250325-feline-roundworm-dc391b755673@spud>

On 25/03/2025 17:03, Conor Dooley wrote:
> On Tue, Mar 25, 2025 at 09:13:22AM +0100, Krzysztof Kozlowski wrote:
>> On Fri, Mar 21, 2025 at 05:22:35PM +0000, Conor Dooley wrote:
>>> +title: Microchip PolarFire SoC Microprocessor Subsystem (MSS) sysreg register region
>>> +
>>> +maintainers:
>>> +  - Conor Dooley <conor.dooley@microchip.com>
>>> +
>>> +description:
>>> +  An wide assortment of registers that control elements of the MSS on PolarFire
>>> +  SoC, including pinmuxing, resets and clocks among others.
>>> +
>>> +properties:
>>> +  compatible:
>>> +    items:
>>> +      - const: microchip,mpfs-mss-top-sysreg
>>> +      - const: syscon
>>> +      - const: simple-mfd
>>
>> You need to list the children if you use simple-mfd. Commit msg
>> mentioned clock controller, so where is it?
> 
> I don't think a child node is required here, there's not enough

Then this is not a simple-mfd.

Best regards,
Krzysztof

WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: Stephen Boyd <sboyd@kernel.org>,
	Conor Dooley <conor.dooley@microchip.com>,
	Daire McNamara <daire.mcnamara@microchip.com>,
	pierre-henry.moussay@microchip.com,
	valentina.fernandezalanis@microchip.com,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Jassi Brar <jassisinghbrar@gmail.com>, Lee Jones <lee@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH v2 2/9] dt-bindings: soc: microchip: document the simple-mfd syscon on PolarFire SoC
Date: Wed, 26 Mar 2025 07:53:55 +0100	[thread overview]
Message-ID: <58bb1186-08ee-41cf-8593-a6664bd874e6@kernel.org> (raw)
In-Reply-To: <20250325-feline-roundworm-dc391b755673@spud>

On 25/03/2025 17:03, Conor Dooley wrote:
> On Tue, Mar 25, 2025 at 09:13:22AM +0100, Krzysztof Kozlowski wrote:
>> On Fri, Mar 21, 2025 at 05:22:35PM +0000, Conor Dooley wrote:
>>> +title: Microchip PolarFire SoC Microprocessor Subsystem (MSS) sysreg register region
>>> +
>>> +maintainers:
>>> +  - Conor Dooley <conor.dooley@microchip.com>
>>> +
>>> +description:
>>> +  An wide assortment of registers that control elements of the MSS on PolarFire
>>> +  SoC, including pinmuxing, resets and clocks among others.
>>> +
>>> +properties:
>>> +  compatible:
>>> +    items:
>>> +      - const: microchip,mpfs-mss-top-sysreg
>>> +      - const: syscon
>>> +      - const: simple-mfd
>>
>> You need to list the children if you use simple-mfd. Commit msg
>> mentioned clock controller, so where is it?
> 
> I don't think a child node is required here, there's not enough

Then this is not a simple-mfd.

Best regards,
Krzysztof

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  reply	other threads:[~2025-03-26  6:54 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-21 17:22 [RFC PATCH v2 0/9] Redo PolarFire SoC's mailbox/clock devicestrees and related code Conor Dooley
2025-03-21 17:22 ` Conor Dooley
2025-03-21 17:22 ` [RFC PATCH v2 1/9] dt-bindings: mfd: syscon document the control-scb syscon on PolarFire SoC Conor Dooley
2025-03-21 17:22   ` Conor Dooley
2025-03-25  8:11   ` Krzysztof Kozlowski
2025-03-25  8:11     ` Krzysztof Kozlowski
2025-03-21 17:22 ` [RFC PATCH v2 2/9] dt-bindings: soc: microchip: document the simple-mfd " Conor Dooley
2025-03-21 17:22   ` Conor Dooley
2025-03-25  8:13   ` Krzysztof Kozlowski
2025-03-25  8:13     ` Krzysztof Kozlowski
2025-03-25 16:03     ` Conor Dooley
2025-03-25 16:03       ` Conor Dooley
2025-03-26  6:53       ` Krzysztof Kozlowski [this message]
2025-03-26  6:53         ` Krzysztof Kozlowski
2025-03-26 11:00         ` Conor Dooley
2025-03-26 11:00           ` Conor Dooley
2025-03-26 14:17           ` Krzysztof Kozlowski
2025-03-26 14:17             ` Krzysztof Kozlowski
2025-03-21 17:22 ` [RFC PATCH v2 3/9] soc: microchip: add mfd drivers for two syscon regions " Conor Dooley
2025-03-21 17:22   ` Conor Dooley
2025-03-21 17:22 ` [RFC PATCH v2 4/9] reset: mpfs: add non-auxiliary bus probing Conor Dooley
2025-03-21 17:22   ` Conor Dooley
2025-03-21 17:22 ` [RFC PATCH v2 5/9] dt-bindings: clk: microchip: mpfs: remove first reg region Conor Dooley
2025-03-21 17:22   ` Conor Dooley
2025-03-21 17:22 ` [RFC PATCH v2 6/9] riscv: dts: microchip: fix mailbox description Conor Dooley
2025-03-21 17:22   ` Conor Dooley
2025-03-21 17:22 ` [RFC PATCH v2 7/9] riscv: dts: microchip: convert clock and reset to use syscon Conor Dooley
2025-03-21 17:22   ` Conor Dooley
2025-03-21 17:22 ` [RFC PATCH v2 8/9] clk: divider, gate: create regmap-backed copies of gate and divider clocks Conor Dooley
2025-03-21 17:22   ` Conor Dooley
2025-05-01  8:51   ` Conor Dooley
2025-05-01  8:51     ` Conor Dooley
2025-05-27  8:46     ` Conor Dooley
2025-05-27  8:46       ` Conor Dooley
2025-03-21 17:22 ` [RFC PATCH v2 9/9] clk: microchip: mpfs: use regmap clock types Conor Dooley
2025-03-21 17:22   ` Conor Dooley

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