From: Alexander Stein <alexander.stein@ew.tq-group.com>
To: "Adam Ford" <aford173@gmail.com>, "Krzysztof Hałasa" <khalasa@piap.pl>
Cc: Stefan Klug <stefan.klug@ideasonboard.com>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Dafna Hirschfeld <dafna@fastmail.com>,
Heiko Stuebner <heiko@sntech.de>,
Paul Elder <paul.elder@ideasonboard.com>,
Jacopo Mondi <jacopo.mondi@ideasonboard.com>,
Ondrej Jirman <megi@xff.cz>,
linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: FYI: i.MX8MP ISP (RKISP1) MI registers corruption: resolved
Date: Tue, 02 Sep 2025 13:23:20 +0200 [thread overview]
Message-ID: <5921855.DvuYhMxLoT@steina-w> (raw)
In-Reply-To: <m31popxjqk.fsf@t19.piap.pl>
Am Dienstag, 2. September 2025, 11:54:27 CEST schrieb Krzysztof Hałasa:
> Hi,
>
> summary:
>
> I've done a few additional tests and it seems the MEDIA_AXI clock is the
> problem. Reducing it to 400 MHz while still running MEDIA_ISP at 500 MHz
> produces no errors.
> MEDIA_ISP at 400 MHz and MEDIA_AXI at 500 MHz produces errors, though
> (register address errors while reading and writing from/to ISP MI
> (memory interface) registers, only on the secondary ISP (isp1), and
> generally only while streaming data from the ISP).
>
> What is driven by MEDIA_AXI clock root? MEDIAMIX: ISI, LCDIF, ISP, DWE.
>
> According to both datasheets (industrial and commercial), MEDIA_AXI
> is limited to 400 MHz in normal mode and 500 MHz in overdrive mode.
> All my hardware is setup for overdrive mode, though (two manufacturers,
> both using the same PMIC setup).
>
> Since no hardware in the official Linux kernel tree (DT) uses the second
> ISP... Should we just add a warning to the imx8mp.dtsi and be done with
> it?
> Out of tree hardware using isp1 (csi1) obviously exists.
There is also [1] which addresses normal mode and clock limits. I don't know
if there is any progress.
Best regards
Alexander
[1] https://lore.kernel.org/all/20250218-imx8m-clk-v4-2-b7697dc2dcd0@pengutronix.de/
--
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/
WARNING: multiple messages have this Message-ID (diff)
From: Alexander Stein <alexander.stein@ew.tq-group.com>
To: "Adam Ford" <aford173@gmail.com>, "Krzysztof Hałasa" <khalasa@piap.pl>
Cc: Stefan Klug <stefan.klug@ideasonboard.com>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Dafna Hirschfeld <dafna@fastmail.com>,
Heiko Stuebner <heiko@sntech.de>,
Paul Elder <paul.elder@ideasonboard.com>,
Jacopo Mondi <jacopo.mondi@ideasonboard.com>,
Ondrej Jirman <megi@xff.cz>,
linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: FYI: i.MX8MP ISP (RKISP1) MI registers corruption: resolved
Date: Tue, 02 Sep 2025 13:23:20 +0200 [thread overview]
Message-ID: <5921855.DvuYhMxLoT@steina-w> (raw)
In-Reply-To: <m31popxjqk.fsf@t19.piap.pl>
Am Dienstag, 2. September 2025, 11:54:27 CEST schrieb Krzysztof Hałasa:
> Hi,
>
> summary:
>
> I've done a few additional tests and it seems the MEDIA_AXI clock is the
> problem. Reducing it to 400 MHz while still running MEDIA_ISP at 500 MHz
> produces no errors.
> MEDIA_ISP at 400 MHz and MEDIA_AXI at 500 MHz produces errors, though
> (register address errors while reading and writing from/to ISP MI
> (memory interface) registers, only on the secondary ISP (isp1), and
> generally only while streaming data from the ISP).
>
> What is driven by MEDIA_AXI clock root? MEDIAMIX: ISI, LCDIF, ISP, DWE.
>
> According to both datasheets (industrial and commercial), MEDIA_AXI
> is limited to 400 MHz in normal mode and 500 MHz in overdrive mode.
> All my hardware is setup for overdrive mode, though (two manufacturers,
> both using the same PMIC setup).
>
> Since no hardware in the official Linux kernel tree (DT) uses the second
> ISP... Should we just add a warning to the imx8mp.dtsi and be done with
> it?
> Out of tree hardware using isp1 (csi1) obviously exists.
There is also [1] which addresses normal mode and clock limits. I don't know
if there is any progress.
Best regards
Alexander
[1] https://lore.kernel.org/all/20250218-imx8m-clk-v4-2-b7697dc2dcd0@pengutronix.de/
--
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
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next prev parent reply other threads:[~2025-09-02 13:05 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-17 9:00 FYI: i.MX8MP ISP (RKISP1) MI registers corruption Krzysztof Hałasa
2025-07-17 9:00 ` Krzysztof Hałasa
2025-07-17 13:03 ` Krzysztof Hałasa
2025-07-17 13:03 ` Krzysztof Hałasa
2025-07-21 8:46 ` Stefan Klug
2025-07-21 8:46 ` Stefan Klug
2025-07-21 13:16 ` Krzysztof Hałasa
2025-07-21 13:16 ` Krzysztof Hałasa
2025-07-23 10:19 ` Stefan Klug
2025-07-23 10:19 ` Stefan Klug
2025-07-23 12:06 ` Krzysztof Hałasa
2025-07-23 12:06 ` Krzysztof Hałasa
2025-07-23 12:09 ` Laurent Pinchart
2025-07-23 12:09 ` Laurent Pinchart
2025-07-24 4:20 ` Krzysztof Hałasa
2025-07-24 4:20 ` Krzysztof Hałasa
2025-07-24 8:21 ` Krzysztof Hałasa
2025-07-24 8:21 ` Krzysztof Hałasa
2025-07-25 11:09 ` Stefan Klug
2025-07-25 11:09 ` Stefan Klug
2025-07-30 10:30 ` Krzysztof Hałasa
2025-07-30 10:30 ` Krzysztof Hałasa
2025-08-01 12:19 ` Krzysztof Hałasa
2025-08-01 12:19 ` Krzysztof Hałasa
2025-08-05 10:57 ` Krzysztof Hałasa
2025-08-05 10:57 ` Krzysztof Hałasa
2025-08-05 11:13 ` Krzysztof Hałasa
2025-08-05 11:13 ` Krzysztof Hałasa
2025-08-12 5:54 ` FYI: i.MX8MP ISP (RKISP1) MI registers corruption: resolved Krzysztof Hałasa
2025-08-12 5:54 ` Krzysztof Hałasa
2025-08-12 10:32 ` Laurent Pinchart
2025-08-12 10:32 ` Laurent Pinchart
2025-08-12 12:28 ` Krzysztof Hałasa
2025-08-12 12:28 ` Krzysztof Hałasa
2025-08-12 15:02 ` Stefan Klug
2025-08-12 15:02 ` Stefan Klug
2025-08-12 18:22 ` Adam Ford
2025-08-12 18:22 ` Adam Ford
2025-08-13 5:10 ` Krzysztof Hałasa
2025-08-13 5:10 ` Krzysztof Hałasa
2025-09-02 9:54 ` Krzysztof Hałasa
2025-09-02 9:54 ` Krzysztof Hałasa
2025-09-02 11:23 ` Alexander Stein [this message]
2025-09-02 11:23 ` Alexander Stein
2025-09-03 0:56 ` Paul Elder
2025-09-03 0:56 ` Paul Elder
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