* [PATCH] drm/amdgpu: check scratch registers to see if we need post (v2)
@ 2017-07-03 20:20 Alex Deucher
[not found] ` <1499113203-21777-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 2+ messages in thread
From: Alex Deucher @ 2017-07-03 20:20 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Alex Deucher
Rather than checking the CONGIG_MEMSIZE register as that may
not be reliable on some APUs.
v2: The scratch register is only used on CIK+
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 63f4bed..8042a8a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -722,7 +722,12 @@ bool amdgpu_need_post(struct amdgpu_device *adev)
adev->has_hw_reset = false;
return true;
}
- /* then check MEM_SIZE, in case the crtcs are off */
+
+ /* bios scratch used on CIK+ */
+ if (adev->asic_type >= CHIP_BONAIRE)
+ return amdgpu_atombios_scratch_need_asic_init(adev);
+
+ /* check MEM_SIZE for older asics */
reg = amdgpu_asic_get_config_memsize(adev);
if ((reg != 0) && (reg != 0xffffffff))
--
2.5.5
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^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] drm/amdgpu: check scratch registers to see if we need post (v2)
[not found] ` <1499113203-21777-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
@ 2017-07-07 4:59 ` Zhang, Jerry (Junwei)
0 siblings, 0 replies; 2+ messages in thread
From: Zhang, Jerry (Junwei) @ 2017-07-07 4:59 UTC (permalink / raw)
To: Alex Deucher, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Alex Deucher
Thanks for update.
That's fine for me.
Feel free to add my RB.
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
On 07/04/2017 04:20 AM, Alex Deucher wrote:
> Rather than checking the CONGIG_MEMSIZE register as that may
> not be reliable on some APUs.
>
> v2: The scratch register is only used on CIK+
>
> Reviewed-by: Christian König <christian.koenig@amd.com>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 63f4bed..8042a8a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -722,7 +722,12 @@ bool amdgpu_need_post(struct amdgpu_device *adev)
> adev->has_hw_reset = false;
> return true;
> }
> - /* then check MEM_SIZE, in case the crtcs are off */
> +
> + /* bios scratch used on CIK+ */
> + if (adev->asic_type >= CHIP_BONAIRE)
> + return amdgpu_atombios_scratch_need_asic_init(adev);
> +
> + /* check MEM_SIZE for older asics */
> reg = amdgpu_asic_get_config_memsize(adev);
>
> if ((reg != 0) && (reg != 0xffffffff))
>
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2017-07-03 20:20 [PATCH] drm/amdgpu: check scratch registers to see if we need post (v2) Alex Deucher
[not found] ` <1499113203-21777-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
2017-07-07 4:59 ` Zhang, Jerry (Junwei)
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