* [PATCH 1/2] drm/amdgpu: add get_clock_info for atomfirmware
@ 2017-07-10 21:15 Alex Deucher
[not found] ` <1499721334-4520-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 5+ messages in thread
From: Alex Deucher @ 2017-07-10 21:15 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Alex Deucher
The information has moved to different tables, notably
smu_info for core refclk and umc_info for mem refclk.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 93 ++++++++++++++++++++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h | 1 +
2 files changed, 94 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
index a7d65f0..f9ffe8e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
@@ -128,3 +128,96 @@ int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev)
return 0;
}
+
+union firmware_info {
+ struct atom_firmware_info_v3_1 v31;
+};
+
+union smu_info {
+ struct atom_smu_info_v3_1 v31;
+};
+
+union umc_info {
+ struct atom_umc_info_v3_1 v31;
+};
+
+int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev)
+{
+ struct amdgpu_mode_info *mode_info = &adev->mode_info;
+ struct amdgpu_pll *spll = &adev->clock.spll;
+ struct amdgpu_pll *mpll = &adev->clock.mpll;
+ uint8_t frev, crev;
+ uint16_t data_offset;
+ int ret = -EINVAL, index;
+
+ index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
+ firmwareinfo);
+ if (amdgpu_atom_parse_data_header(mode_info->atom_context, index, NULL,
+ &frev, &crev, &data_offset)) {
+ union firmware_info *firmware_info =
+ (union firmware_info *)(mode_info->atom_context->bios +
+ data_offset);
+
+ adev->clock.default_sclk =
+ le32_to_cpu(firmware_info->v31.bootup_sclk_in10khz);
+ adev->clock.default_mclk =
+ le32_to_cpu(firmware_info->v31.bootup_mclk_in10khz);
+
+ adev->pm.current_sclk = adev->clock.default_sclk;
+ adev->pm.current_mclk = adev->clock.default_mclk;
+
+ /* not technically a clock, but... */
+ adev->mode_info.firmware_flags =
+ le32_to_cpu(firmware_info->v31.firmware_capability);
+
+ ret = 0;
+ }
+
+ index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
+ smu_info);
+ if (amdgpu_atom_parse_data_header(mode_info->atom_context, index, NULL,
+ &frev, &crev, &data_offset)) {
+ union smu_info *smu_info =
+ (union smu_info *)(mode_info->atom_context->bios +
+ data_offset);
+
+ /* system clock */
+ spll->reference_freq = le32_to_cpu(smu_info->v31.core_refclk_10khz);
+
+ spll->reference_div = 0;
+ spll->min_post_div = 1;
+ spll->max_post_div = 1;
+ spll->min_ref_div = 2;
+ spll->max_ref_div = 0xff;
+ spll->min_feedback_div = 4;
+ spll->max_feedback_div = 0xff;
+ spll->best_vco = 0;
+
+ ret = 0;
+ }
+
+ index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
+ umc_info);
+ if (amdgpu_atom_parse_data_header(mode_info->atom_context, index, NULL,
+ &frev, &crev, &data_offset)) {
+ union umc_info *umc_info =
+ (union umc_info *)(mode_info->atom_context->bios +
+ data_offset);
+
+ /* memory clock */
+ mpll->reference_freq = le32_to_cpu(umc_info->v31.mem_refclk_10khz);
+
+ mpll->reference_div = 0;
+ mpll->min_post_div = 1;
+ mpll->max_post_div = 1;
+ mpll->min_ref_div = 2;
+ mpll->max_ref_div = 0xff;
+ mpll->min_feedback_div = 4;
+ mpll->max_feedback_div = 0xff;
+ mpll->best_vco = 0;
+
+ ret = 0;
+ }
+
+ return ret;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
index cedafbb..288b97e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
@@ -28,5 +28,6 @@ bool amdgpu_atomfirmware_gpu_supports_virtualization(struct amdgpu_device *adev)
void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev);
int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev);
int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev);
+int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev);
#endif
--
2.5.5
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread[parent not found: <1499721334-4520-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>]
* [PATCH 2/2] drm/amdgpu: call atomfirmware get_clock_info for atomfirmware systems [not found] ` <1499721334-4520-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org> @ 2017-07-10 21:15 ` Alex Deucher 2017-07-11 19:30 ` [PATCH 1/2] drm/amdgpu: add get_clock_info for atomfirmware Alex Deucher 1 sibling, 0 replies; 5+ messages in thread From: Alex Deucher @ 2017-07-10 21:15 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Alex Deucher Rather than the legacy atombios version. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index d17e54b..bbc5155 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -2231,7 +2231,15 @@ int amdgpu_device_init(struct amdgpu_device *adev, DRM_INFO("GPU post is not needed\n"); } - if (!adev->is_atom_fw) { + if (adev->is_atom_fw) { + /* Initialize clocks */ + r = amdgpu_atomfirmware_get_clock_info(adev); + if (r) { + dev_err(adev->dev, "amdgpu_atomfirmware_get_clock_info failed\n"); + amdgpu_vf_error_put(AMDGIM_ERROR_VF_ATOMBIOS_GET_CLOCK_FAIL, 0, 0); + goto failed; + } + } else { /* Initialize clocks */ r = amdgpu_atombios_get_clock_info(adev); if (r) { -- 2.5.5 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] drm/amdgpu: add get_clock_info for atomfirmware [not found] ` <1499721334-4520-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org> 2017-07-10 21:15 ` [PATCH 2/2] drm/amdgpu: call atomfirmware get_clock_info for atomfirmware systems Alex Deucher @ 2017-07-11 19:30 ` Alex Deucher [not found] ` <CADnq5_PK_wTPiL43Do+nEVPS_rEixqojeg0ZrthxRz_UT95BCw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 1 sibling, 1 reply; 5+ messages in thread From: Alex Deucher @ 2017-07-11 19:30 UTC (permalink / raw) To: amd-gfx list; +Cc: Alex Deucher On Mon, Jul 10, 2017 at 5:15 PM, Alex Deucher <alexdeucher@gmail.com> wrote: > The information has moved to different tables, notably > smu_info for core refclk and umc_info for mem refclk. > > Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ping? this fixes looking up the reference clocks on vega10 and raven. Alex > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 93 ++++++++++++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h | 1 + > 2 files changed, 94 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c > index a7d65f0..f9ffe8e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c > @@ -128,3 +128,96 @@ int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev) > > return 0; > } > + > +union firmware_info { > + struct atom_firmware_info_v3_1 v31; > +}; > + > +union smu_info { > + struct atom_smu_info_v3_1 v31; > +}; > + > +union umc_info { > + struct atom_umc_info_v3_1 v31; > +}; > + > +int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev) > +{ > + struct amdgpu_mode_info *mode_info = &adev->mode_info; > + struct amdgpu_pll *spll = &adev->clock.spll; > + struct amdgpu_pll *mpll = &adev->clock.mpll; > + uint8_t frev, crev; > + uint16_t data_offset; > + int ret = -EINVAL, index; > + > + index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1, > + firmwareinfo); > + if (amdgpu_atom_parse_data_header(mode_info->atom_context, index, NULL, > + &frev, &crev, &data_offset)) { > + union firmware_info *firmware_info = > + (union firmware_info *)(mode_info->atom_context->bios + > + data_offset); > + > + adev->clock.default_sclk = > + le32_to_cpu(firmware_info->v31.bootup_sclk_in10khz); > + adev->clock.default_mclk = > + le32_to_cpu(firmware_info->v31.bootup_mclk_in10khz); > + > + adev->pm.current_sclk = adev->clock.default_sclk; > + adev->pm.current_mclk = adev->clock.default_mclk; > + > + /* not technically a clock, but... */ > + adev->mode_info.firmware_flags = > + le32_to_cpu(firmware_info->v31.firmware_capability); > + > + ret = 0; > + } > + > + index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1, > + smu_info); > + if (amdgpu_atom_parse_data_header(mode_info->atom_context, index, NULL, > + &frev, &crev, &data_offset)) { > + union smu_info *smu_info = > + (union smu_info *)(mode_info->atom_context->bios + > + data_offset); > + > + /* system clock */ > + spll->reference_freq = le32_to_cpu(smu_info->v31.core_refclk_10khz); > + > + spll->reference_div = 0; > + spll->min_post_div = 1; > + spll->max_post_div = 1; > + spll->min_ref_div = 2; > + spll->max_ref_div = 0xff; > + spll->min_feedback_div = 4; > + spll->max_feedback_div = 0xff; > + spll->best_vco = 0; > + > + ret = 0; > + } > + > + index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1, > + umc_info); > + if (amdgpu_atom_parse_data_header(mode_info->atom_context, index, NULL, > + &frev, &crev, &data_offset)) { > + union umc_info *umc_info = > + (union umc_info *)(mode_info->atom_context->bios + > + data_offset); > + > + /* memory clock */ > + mpll->reference_freq = le32_to_cpu(umc_info->v31.mem_refclk_10khz); > + > + mpll->reference_div = 0; > + mpll->min_post_div = 1; > + mpll->max_post_div = 1; > + mpll->min_ref_div = 2; > + mpll->max_ref_div = 0xff; > + mpll->min_feedback_div = 4; > + mpll->max_feedback_div = 0xff; > + mpll->best_vco = 0; > + > + ret = 0; > + } > + > + return ret; > +} > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h > index cedafbb..288b97e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h > @@ -28,5 +28,6 @@ bool amdgpu_atomfirmware_gpu_supports_virtualization(struct amdgpu_device *adev) > void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev); > int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev); > int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev); > +int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev); > > #endif > -- > 2.5.5 > _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
[parent not found: <CADnq5_PK_wTPiL43Do+nEVPS_rEixqojeg0ZrthxRz_UT95BCw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>]
* Re: [PATCH 1/2] drm/amdgpu: add get_clock_info for atomfirmware [not found] ` <CADnq5_PK_wTPiL43Do+nEVPS_rEixqojeg0ZrthxRz_UT95BCw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> @ 2017-07-12 2:48 ` zhoucm1 [not found] ` <59658DF5.7070100-5C7GfCeVMHo@public.gmane.org> 0 siblings, 1 reply; 5+ messages in thread From: zhoucm1 @ 2017-07-12 2:48 UTC (permalink / raw) To: Alex Deucher, amd-gfx list; +Cc: Alex Deucher On 2017年07月12日 03:30, Alex Deucher wrote: > On Mon, Jul 10, 2017 at 5:15 PM, Alex Deucher <alexdeucher@gmail.com> wrote: >> The information has moved to different tables, notably >> smu_info for core refclk and umc_info for mem refclk. >> >> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> > ping? this fixes looking up the reference clocks on vega10 and raven. The both two are Acked-by: Chunming Zhou <david1.zhou@amd.com> > > Alex > > >> --- >> drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 93 ++++++++++++++++++++++++ >> drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h | 1 + >> 2 files changed, 94 insertions(+) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c >> index a7d65f0..f9ffe8e 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c >> @@ -128,3 +128,96 @@ int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev) >> >> return 0; >> } >> + >> +union firmware_info { >> + struct atom_firmware_info_v3_1 v31; >> +}; >> + >> +union smu_info { >> + struct atom_smu_info_v3_1 v31; >> +}; >> + >> +union umc_info { >> + struct atom_umc_info_v3_1 v31; >> +}; >> + >> +int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev) >> +{ >> + struct amdgpu_mode_info *mode_info = &adev->mode_info; >> + struct amdgpu_pll *spll = &adev->clock.spll; >> + struct amdgpu_pll *mpll = &adev->clock.mpll; >> + uint8_t frev, crev; >> + uint16_t data_offset; >> + int ret = -EINVAL, index; >> + >> + index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1, >> + firmwareinfo); >> + if (amdgpu_atom_parse_data_header(mode_info->atom_context, index, NULL, >> + &frev, &crev, &data_offset)) { >> + union firmware_info *firmware_info = >> + (union firmware_info *)(mode_info->atom_context->bios + >> + data_offset); >> + >> + adev->clock.default_sclk = >> + le32_to_cpu(firmware_info->v31.bootup_sclk_in10khz); >> + adev->clock.default_mclk = >> + le32_to_cpu(firmware_info->v31.bootup_mclk_in10khz); >> + >> + adev->pm.current_sclk = adev->clock.default_sclk; >> + adev->pm.current_mclk = adev->clock.default_mclk; >> + >> + /* not technically a clock, but... */ >> + adev->mode_info.firmware_flags = >> + le32_to_cpu(firmware_info->v31.firmware_capability); >> + >> + ret = 0; >> + } >> + >> + index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1, >> + smu_info); >> + if (amdgpu_atom_parse_data_header(mode_info->atom_context, index, NULL, >> + &frev, &crev, &data_offset)) { >> + union smu_info *smu_info = >> + (union smu_info *)(mode_info->atom_context->bios + >> + data_offset); >> + >> + /* system clock */ >> + spll->reference_freq = le32_to_cpu(smu_info->v31.core_refclk_10khz); >> + >> + spll->reference_div = 0; >> + spll->min_post_div = 1; >> + spll->max_post_div = 1; >> + spll->min_ref_div = 2; >> + spll->max_ref_div = 0xff; >> + spll->min_feedback_div = 4; >> + spll->max_feedback_div = 0xff; >> + spll->best_vco = 0; >> + >> + ret = 0; >> + } >> + >> + index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1, >> + umc_info); >> + if (amdgpu_atom_parse_data_header(mode_info->atom_context, index, NULL, >> + &frev, &crev, &data_offset)) { >> + union umc_info *umc_info = >> + (union umc_info *)(mode_info->atom_context->bios + >> + data_offset); >> + >> + /* memory clock */ >> + mpll->reference_freq = le32_to_cpu(umc_info->v31.mem_refclk_10khz); >> + >> + mpll->reference_div = 0; >> + mpll->min_post_div = 1; >> + mpll->max_post_div = 1; >> + mpll->min_ref_div = 2; >> + mpll->max_ref_div = 0xff; >> + mpll->min_feedback_div = 4; >> + mpll->max_feedback_div = 0xff; >> + mpll->best_vco = 0; >> + >> + ret = 0; >> + } >> + >> + return ret; >> +} >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h >> index cedafbb..288b97e 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h >> @@ -28,5 +28,6 @@ bool amdgpu_atomfirmware_gpu_supports_virtualization(struct amdgpu_device *adev) >> void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev); >> int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev); >> int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev); >> +int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev); >> >> #endif >> -- >> 2.5.5 >> > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
[parent not found: <59658DF5.7070100-5C7GfCeVMHo@public.gmane.org>]
* Re: [PATCH 1/2] drm/amdgpu: add get_clock_info for atomfirmware [not found] ` <59658DF5.7070100-5C7GfCeVMHo@public.gmane.org> @ 2017-07-12 7:31 ` Christian König 0 siblings, 0 replies; 5+ messages in thread From: Christian König @ 2017-07-12 7:31 UTC (permalink / raw) To: zhoucm1, Alex Deucher, amd-gfx list; +Cc: Alex Deucher Am 12.07.2017 um 04:48 schrieb zhoucm1: > > > On 2017年07月12日 03:30, Alex Deucher wrote: >> On Mon, Jul 10, 2017 at 5:15 PM, Alex Deucher <alexdeucher@gmail.com> >> wrote: >>> The information has moved to different tables, notably >>> smu_info for core refclk and umc_info for mem refclk. >>> >>> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> >> ping? this fixes looking up the reference clocks on vega10 and raven. > The both two are Acked-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian König <christian.koenig@amd.com> as well. I think somebody else should dig into the AtomBIOS/AtomFirmware stuff as well, otherwise Alex becomes our single point of failure one more (ok that sounds funny, but I think you know what I mean). Christian. >> >> Alex >> >> >>> --- >>> drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 93 >>> ++++++++++++++++++++++++ >>> drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h | 1 + >>> 2 files changed, 94 insertions(+) >>> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c >>> index a7d65f0..f9ffe8e 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c >>> @@ -128,3 +128,96 @@ int amdgpu_atomfirmware_get_vram_width(struct >>> amdgpu_device *adev) >>> >>> return 0; >>> } >>> + >>> +union firmware_info { >>> + struct atom_firmware_info_v3_1 v31; >>> +}; >>> + >>> +union smu_info { >>> + struct atom_smu_info_v3_1 v31; >>> +}; >>> + >>> +union umc_info { >>> + struct atom_umc_info_v3_1 v31; >>> +}; >>> + >>> +int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev) >>> +{ >>> + struct amdgpu_mode_info *mode_info = &adev->mode_info; >>> + struct amdgpu_pll *spll = &adev->clock.spll; >>> + struct amdgpu_pll *mpll = &adev->clock.mpll; >>> + uint8_t frev, crev; >>> + uint16_t data_offset; >>> + int ret = -EINVAL, index; >>> + >>> + index = >>> get_index_into_master_table(atom_master_list_of_data_tables_v2_1, >>> + firmwareinfo); >>> + if (amdgpu_atom_parse_data_header(mode_info->atom_context, >>> index, NULL, >>> + &frev, &crev, &data_offset)) { >>> + union firmware_info *firmware_info = >>> + (union firmware_info >>> *)(mode_info->atom_context->bios + >>> + data_offset); >>> + >>> + adev->clock.default_sclk = >>> + le32_to_cpu(firmware_info->v31.bootup_sclk_in10khz); >>> + adev->clock.default_mclk = >>> + le32_to_cpu(firmware_info->v31.bootup_mclk_in10khz); >>> + >>> + adev->pm.current_sclk = adev->clock.default_sclk; >>> + adev->pm.current_mclk = adev->clock.default_mclk; >>> + >>> + /* not technically a clock, but... */ >>> + adev->mode_info.firmware_flags = >>> + le32_to_cpu(firmware_info->v31.firmware_capability); >>> + >>> + ret = 0; >>> + } >>> + >>> + index = >>> get_index_into_master_table(atom_master_list_of_data_tables_v2_1, >>> + smu_info); >>> + if (amdgpu_atom_parse_data_header(mode_info->atom_context, >>> index, NULL, >>> + &frev, &crev, &data_offset)) { >>> + union smu_info *smu_info = >>> + (union smu_info >>> *)(mode_info->atom_context->bios + >>> + data_offset); >>> + >>> + /* system clock */ >>> + spll->reference_freq = >>> le32_to_cpu(smu_info->v31.core_refclk_10khz); >>> + >>> + spll->reference_div = 0; >>> + spll->min_post_div = 1; >>> + spll->max_post_div = 1; >>> + spll->min_ref_div = 2; >>> + spll->max_ref_div = 0xff; >>> + spll->min_feedback_div = 4; >>> + spll->max_feedback_div = 0xff; >>> + spll->best_vco = 0; >>> + >>> + ret = 0; >>> + } >>> + >>> + index = >>> get_index_into_master_table(atom_master_list_of_data_tables_v2_1, >>> + umc_info); >>> + if (amdgpu_atom_parse_data_header(mode_info->atom_context, >>> index, NULL, >>> + &frev, &crev, &data_offset)) { >>> + union umc_info *umc_info = >>> + (union umc_info >>> *)(mode_info->atom_context->bios + >>> + data_offset); >>> + >>> + /* memory clock */ >>> + mpll->reference_freq = >>> le32_to_cpu(umc_info->v31.mem_refclk_10khz); >>> + >>> + mpll->reference_div = 0; >>> + mpll->min_post_div = 1; >>> + mpll->max_post_div = 1; >>> + mpll->min_ref_div = 2; >>> + mpll->max_ref_div = 0xff; >>> + mpll->min_feedback_div = 4; >>> + mpll->max_feedback_div = 0xff; >>> + mpll->best_vco = 0; >>> + >>> + ret = 0; >>> + } >>> + >>> + return ret; >>> +} >>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h >>> index cedafbb..288b97e 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h >>> @@ -28,5 +28,6 @@ bool >>> amdgpu_atomfirmware_gpu_supports_virtualization(struct amdgpu_device >>> *adev) >>> void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device >>> *adev); >>> int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device >>> *adev); >>> int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev); >>> +int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev); >>> >>> #endif >>> -- >>> 2.5.5 >>> >> _______________________________________________ >> amd-gfx mailing list >> amd-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/amd-gfx > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
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2017-07-10 21:15 [PATCH 1/2] drm/amdgpu: add get_clock_info for atomfirmware Alex Deucher
[not found] ` <1499721334-4520-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
2017-07-10 21:15 ` [PATCH 2/2] drm/amdgpu: call atomfirmware get_clock_info for atomfirmware systems Alex Deucher
2017-07-11 19:30 ` [PATCH 1/2] drm/amdgpu: add get_clock_info for atomfirmware Alex Deucher
[not found] ` <CADnq5_PK_wTPiL43Do+nEVPS_rEixqojeg0ZrthxRz_UT95BCw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-07-12 2:48 ` zhoucm1
[not found] ` <59658DF5.7070100-5C7GfCeVMHo@public.gmane.org>
2017-07-12 7:31 ` Christian König
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