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From: zhangsenchuan <zhangsenchuan@eswincomputing.com>
To: "Manivannan Sadhasivam" <mani@kernel.org>
Cc: "Min Lin" <linmin@eswincomputing.com>,
	bhelgaas@google.com, krzk+dt@kernel.org, conor+dt@kernel.org,
	lpieralisi@kernel.org, kwilczynski@kernel.org, robh@kernel.org,
	p.zabel@pengutronix.de, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	christian.bruel@foss.st.com, shradha.t@samsung.com,
	krishna.chundru@oss.qualcomm.com, thippeswamy.havalige@amd.com,
	inochiama@gmail.com, Frank.li@nxp.com, ningyu@eswincomputing.com,
	pinkesh.vaghela@einfochips.com, ouyanghui@eswincomputing.com
Subject: Re: Re: [PATCH v11 2/2] PCI: eic7700: Add Eswin PCIe host controller driver
Date: Wed, 11 Mar 2026 18:35:12 +0800 (GMT+08:00)	[thread overview]
Message-ID: <597765c6.41f9.19cdc76ffa4.Coremail.zhangsenchuan@eswincomputing.com> (raw)
In-Reply-To: <twvubrxemm7nx2i5p65byehj7y2g43c5esq3go72t6qbsz7yal@dxwvslzvgdc5>

> > > Subject: Re: [PATCH v11 2/2] PCI: eic7700: Add Eswin PCIe host controller driver
> > > 
> > > On Fri, Feb 27, 2026 at 07:18:08PM +0800, zhangsenchuan@eswincomputing.com wrote:
> > > > From: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> > > > 
> > > > Add driver for the Eswin EIC7700 PCIe host controller, which is based on
> > > > the DesignWare PCIe core, IP revision 5.96a. The PCIe Gen.3 controller
> > > > supports a data rate of 8 GT/s and 4 channels, support INTx and MSI
> > > > interrupts.
> > > > 
> > > 
> > > Is the driver going to work only for the PCIe RC IP in EIC7700 SoC or for the
> > > upcoming Eswin SoCs as well? Just curious because, we don't name drivers based
> > > on one SoC name, but by the vendor so that the driver (if compatible) can be
> > > used across other SoCs from the vendor.
> > > 
> > > If it can work across other SoCs, then I can change 'eic7700' to 'eswin', where
> > > applicable while applying.
> > > 
> > 
> > This PCIe RC IP in EIC7700 will only be used for EIC7700 SoC. One thing for sure
> > is our next SoC will use a higher IP revision of the DesignWare PCIe core.
> > In the future, there is no doubt that the use of IP from other manufacturers may
> > be considered.
> > 
> > Based on this, may I ask which name do you think is better, eic7700' or 'eswin'?
> > 
> 
> I'd suggest going with just 'eswin'. If the future revisions come up with
> non-dwc based IPs, we can name them appropriately.
> 
> > I found there is a commit on drivers/pci/controller/dwc/pcie-tegra194.c
> > It added Tegra234 PCIe support in pcie-tegra194.c
> > Is this naming approach no longer recommended?
> > 
> 
> Yes, that predates my time with host controller drivers. I strongly suggest
> naming the drivers based on vendors or family to avoid creating an impression
> that the driver only supports one SoC version.
> 
> Since you agreed for renaming, I took the liberty to do the change myself and
> applied the patches. I also added the maintainers entry. Please take a look at
> the commits and confirm if everything is OK:
> https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/log/?h=controller/dwc-eswin

Hi Mani,

Thank you very much for helping me change 'eic7700' to 'eswin'.

I have verified that the code functions are intact. However, there are a few areas
that require your assistance to incorporate and make necessary modifications. 
After the modifications, I believe you can incorporate it.

Please see the following:

 /* Vendor and device ID value */
 #define PCI_VENDOR_ID_ESWIN            0x1fe1
-#define PCI_DEVICE_ID_ESWIN_ESWIN      0x2030
+#define PCI_DEVICE_ID_ESWIN_EIC7700    0x2030
 
-#define ESWIN_NUM_RSTS         ARRAY_SIZE(eswin_pcie_rsts)
+#define ESWIN_NUM_RSTS                 ARRAY_SIZE(eswin_pcie_rsts)
 
 static const char * const eswin_pcie_rsts[] = {
        "pwr",
@@ -91,7 +91,7 @@ static bool eswin_pcie_link_up(struct dw_pcie *pci)
 }
 
 static int eswin_pcie_perst_reset(struct eswin_pcie_port *port,
-                                   struct eswin_pcie *pcie)
+                                 struct eswin_pcie *pcie)
 {
        int ret;
 
@@ -123,7 +123,7 @@ static void eswin_pcie_assert(struct eswin_pcie *pcie)
 }
 
 static int eswin_pcie_parse_port(struct eswin_pcie *pcie,
-                                  struct device_node *node)
+                                struct device_node *node)
 {
        struct device *dev = pcie->pci.dev;
        struct eswin_pcie_port *port;
@@ -241,7 +241,7 @@ static int eswin_pcie_host_init(struct dw_pcie_rp *pp)
         */
        dw_pcie_dbi_ro_wr_en(pci);
        dw_pcie_writew_dbi(pci, PCI_VENDOR_ID, PCI_VENDOR_ID_ESWIN);
-       dw_pcie_writew_dbi(pci, PCI_DEVICE_ID, PCI_DEVICE_ID_ESWIN_ESWIN);
+       dw_pcie_writew_dbi(pci, PCI_DEVICE_ID, PCI_DEVICE_ID_ESWIN_EIC7700);
        dw_pcie_dbi_ro_wr_dis(pci);
 
        return 0;

Kind regards,
Senchuan

  reply	other threads:[~2026-03-11 10:35 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-27 11:15 [PATCH v11 0/2] Add driver support for Eswin EIC7700 SoC PCIe controller zhangsenchuan
2026-02-27 11:17 ` [PATCH v11 1/2] dt-bindings: PCI: eic7700: Add Eswin PCIe host controller zhangsenchuan
2026-02-27 11:18 ` [PATCH v11 2/2] PCI: eic7700: Add Eswin PCIe host controller driver zhangsenchuan
2026-02-27 17:15   ` Bjorn Helgaas
2026-02-28  7:53     ` zhangsenchuan
2026-02-28 15:06       ` Manivannan Sadhasivam
2026-03-05  6:07   ` Manivannan Sadhasivam
2026-03-05  8:01     ` Min Lin
2026-03-11  6:14       ` Manivannan Sadhasivam
2026-03-11 10:35         ` zhangsenchuan [this message]
2026-03-13 13:55           ` Manivannan Sadhasivam
2026-03-16  6:30             ` zhangsenchuan
2026-03-11  6:12 ` [PATCH v11 0/2] Add driver support for Eswin EIC7700 SoC PCIe controller Manivannan Sadhasivam

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