From: xuwei5@hisilicon.com (Wei Xu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2] arm64: dts: hi6220: add acpu_sctrl
Date: Wed, 16 Aug 2017 09:41:22 +0100 [thread overview]
Message-ID: <59940532.7010700@hisilicon.com> (raw)
In-Reply-To: <1502868395-11481-1-git-send-email-zhangfei.gao@linaro.org>
Hi Zhangfei,
On 2017/8/16 8:26, Zhangfei Gao wrote:
> Add acpu_sctrl clock node
>
> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
> Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
> ---
> Update name to acpu_sctrl at f6504000
>
> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> index eacbe0d..f8012d5 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> @@ -262,6 +262,12 @@
> #clock-cells = <1>;
> };
>
> + acpu_sctrl: acpu_sctrl at f6504000 {
> + compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
> + reg = <0x0 0xf6504000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> medianoc_ade: medianoc_ade at f4520000 {
> compatible = "syscon";
> reg = <0x0 0xf4520000 0x0 0x4000>;
>
Thanks!
Dropped the v1 and applied v2 to the hisilicon dt tree.
Best Regards,
Wei
WARNING: multiple messages have this Message-ID (diff)
From: Wei Xu <xuwei5@hisilicon.com>
To: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Li Pengcheng <lipengcheng8@huawei.com>
Subject: Re: [PATCH v2] arm64: dts: hi6220: add acpu_sctrl
Date: Wed, 16 Aug 2017 09:41:22 +0100 [thread overview]
Message-ID: <59940532.7010700@hisilicon.com> (raw)
In-Reply-To: <1502868395-11481-1-git-send-email-zhangfei.gao@linaro.org>
Hi Zhangfei,
On 2017/8/16 8:26, Zhangfei Gao wrote:
> Add acpu_sctrl clock node
>
> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
> Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
> ---
> Update name to acpu_sctrl@f6504000
>
> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> index eacbe0d..f8012d5 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> @@ -262,6 +262,12 @@
> #clock-cells = <1>;
> };
>
> + acpu_sctrl: acpu_sctrl@f6504000 {
> + compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
> + reg = <0x0 0xf6504000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> medianoc_ade: medianoc_ade@f4520000 {
> compatible = "syscon";
> reg = <0x0 0xf4520000 0x0 0x4000>;
>
Thanks!
Dropped the v1 and applied v2 to the hisilicon dt tree.
Best Regards,
Wei
next prev parent reply other threads:[~2017-08-16 8:41 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-16 7:26 [PATCH v2] arm64: dts: hi6220: add acpu_sctrl Zhangfei Gao
2017-08-16 7:26 ` Zhangfei Gao
2017-08-16 8:41 ` Wei Xu [this message]
2017-08-16 8:41 ` Wei Xu
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