Re: [PATCH] staging: rtl8192u: fix incorrect mask when calculating TxPowerLevelCCK

[walter harms <wharms@bfs.de>]

Am 05.09.2017 18:32, schrieb Colin King:
> From: Colin Ian King <colin.king@canonical.com>
> 
> The mask of 0xff and right shift of 8 bits on ret always results in
> a value of 0 for TxPowerLevelCCK.  I believe this should be a mask of
> 0xff00, however I do not have the hardware at hand to test this out,
> so there is a distinct possibility I may be wrong on this.
> 
> Detected by CoverityScan CID#1357110 ("Operands don't affect result")
> 
> Signed-off-by: Colin Ian King <colin.king@canonical.com>
> ---
>  drivers/staging/rtl8192u/r8192U_core.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c
> index 46b3f19e0878..ecc887636173 100644
> --- a/drivers/staging/rtl8192u/r8192U_core.c
> +++ b/drivers/staging/rtl8192u/r8192U_core.c
> @@ -2510,7 +2510,7 @@ static int rtl8192_read_eeprom_info(struct net_device *dev)
>  				ret = eprom_read(dev, (EEPROM_TxPwIndex_CCK >> 1));
>  				if (ret < 0)
>  					return ret;
> -				priv->EEPROMTxPowerLevelCCK = ((u16)ret & 0xff) >> 8;
> +				priv->EEPROMTxPowerLevelCCK = ((u16)ret & 0xff00) >> 8;

Is there any need for the mask ?
(u16) will already reduce ret to 16 bit, the >>8 will shift the lower bits into nirwana

re,
 wh

>  			} else
>  				priv->EEPROMTxPowerLevelCCK = 0x10;
>  			RT_TRACE(COMP_EPROM, "CCK Tx Power Levl: 0x%02x\n", priv->EEPROMTxPowerLevelCCK);