* [PATCH] drm/amdgpu: Set the correct value for PDEs/PTEs of ATC memory on Raven
@ 2017-10-06 15:35 Yong Zhao
[not found] ` <1507304133-21510-1-git-send-email-yong.zhao-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 4+ messages in thread
From: Yong Zhao @ 2017-10-06 15:35 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Yong Zhao
From: Yong Zhao <Yong.Zhao@amd.com>
Without the additional bits set in PDEs/PTEs, the ATC memory access
would have failed on Raven.
Change-Id: I28429ef6d39cdb01dc6f17fea4264ee22d7121d4
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 9 ++++++---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 10 ++++++++++
2 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index bca9eeb..d98d58a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -328,9 +328,10 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev,
AMDGPU_GEM_CREATE_SHADOW);
if (vm->pte_support_ats) {
- init_value = AMDGPU_PTE_SYSTEM;
+ init_value = AMDGPU_PTE_DEFAULT_ATC;
if (level != adev->vm_manager.num_level - 1)
init_value |= AMDGPU_PDE_PTE;
+
}
/* walk over the address space and allocate the page tables */
@@ -2017,7 +2018,7 @@ int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
list_del(&mapping->list);
if (vm->pte_support_ats)
- init_pte_value = AMDGPU_PTE_SYSTEM;
+ init_pte_value = AMDGPU_PTE_DEFAULT_ATC;
r = amdgpu_vm_bo_update_mapping(adev, NULL, NULL, vm,
mapping->start, mapping->last,
@@ -2629,7 +2630,9 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
if (adev->asic_type == CHIP_RAVEN) {
vm->pte_support_ats = true;
- init_pde_value = AMDGPU_PTE_SYSTEM | AMDGPU_PDE_PTE;
+ init_pde_value = AMDGPU_PTE_DEFAULT_ATC
+ | AMDGPU_PDE_PTE;
+
}
} else
vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode &
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 66efbc2..5d0cfc9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -73,6 +73,16 @@ struct amdgpu_bo_list_entry;
#define AMDGPU_PTE_MTYPE(a) ((uint64_t)a << 57)
#define AMDGPU_PTE_MTYPE_MASK AMDGPU_PTE_MTYPE(3ULL)
+/* For Raven */
+#define AMDGPU_MTYPE_CC 2
+
+#define AMDGPU_PTE_DEFAULT_ATC (AMDGPU_PTE_SYSTEM \
+ | AMDGPU_PTE_SNOOPED \
+ | AMDGPU_PTE_EXECUTABLE \
+ | AMDGPU_PTE_READABLE \
+ | AMDGPU_PTE_WRITEABLE \
+ | AMDGPU_PTE_MTYPE(AMDGPU_MTYPE_CC))
+
/* How to programm VM fault handling */
#define AMDGPU_VM_FAULT_STOP_NEVER 0
#define AMDGPU_VM_FAULT_STOP_FIRST 1
--
2.7.4
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/amdgpu: Set the correct value for PDEs/PTEs of ATC memory on Raven
[not found] ` <1507304133-21510-1-git-send-email-yong.zhao-5C7GfCeVMHo@public.gmane.org>
@ 2017-10-06 17:16 ` Christian König
[not found] ` <ff321dde-dac3-9f51-266a-bca5ada11e5c-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-10-09 6:34 ` Zhang, Jerry (Junwei)
1 sibling, 1 reply; 4+ messages in thread
From: Christian König @ 2017-10-06 17:16 UTC (permalink / raw)
To: Yong Zhao, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Am 06.10.2017 um 17:35 schrieb Yong Zhao:
> From: Yong Zhao <Yong.Zhao@amd.com>
>
> Without the additional bits set in PDEs/PTEs, the ATC memory access
> would have failed on Raven.
>
> Change-Id: I28429ef6d39cdb01dc6f17fea4264ee22d7121d4
> Signed-off-by: Yong Zhao <yong.zhao@amd.com>
> Acked-by: Alex Deucher <alexander.deucher@amd.com>
Nice solution for the define. Patch is Reviewed-by: Christian König
<christian.koenig@amd.com>.
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 9 ++++++---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 10 ++++++++++
> 2 files changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index bca9eeb..d98d58a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -328,9 +328,10 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev,
> AMDGPU_GEM_CREATE_SHADOW);
>
> if (vm->pte_support_ats) {
> - init_value = AMDGPU_PTE_SYSTEM;
> + init_value = AMDGPU_PTE_DEFAULT_ATC;
> if (level != adev->vm_manager.num_level - 1)
> init_value |= AMDGPU_PDE_PTE;
> +
> }
>
> /* walk over the address space and allocate the page tables */
> @@ -2017,7 +2018,7 @@ int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
> list_del(&mapping->list);
>
> if (vm->pte_support_ats)
> - init_pte_value = AMDGPU_PTE_SYSTEM;
> + init_pte_value = AMDGPU_PTE_DEFAULT_ATC;
>
> r = amdgpu_vm_bo_update_mapping(adev, NULL, NULL, vm,
> mapping->start, mapping->last,
> @@ -2629,7 +2630,9 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>
> if (adev->asic_type == CHIP_RAVEN) {
> vm->pte_support_ats = true;
> - init_pde_value = AMDGPU_PTE_SYSTEM | AMDGPU_PDE_PTE;
> + init_pde_value = AMDGPU_PTE_DEFAULT_ATC
> + | AMDGPU_PDE_PTE;
> +
> }
> } else
> vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode &
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index 66efbc2..5d0cfc9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -73,6 +73,16 @@ struct amdgpu_bo_list_entry;
> #define AMDGPU_PTE_MTYPE(a) ((uint64_t)a << 57)
> #define AMDGPU_PTE_MTYPE_MASK AMDGPU_PTE_MTYPE(3ULL)
>
> +/* For Raven */
> +#define AMDGPU_MTYPE_CC 2
> +
> +#define AMDGPU_PTE_DEFAULT_ATC (AMDGPU_PTE_SYSTEM \
> + | AMDGPU_PTE_SNOOPED \
> + | AMDGPU_PTE_EXECUTABLE \
> + | AMDGPU_PTE_READABLE \
> + | AMDGPU_PTE_WRITEABLE \
> + | AMDGPU_PTE_MTYPE(AMDGPU_MTYPE_CC))
> +
> /* How to programm VM fault handling */
> #define AMDGPU_VM_FAULT_STOP_NEVER 0
> #define AMDGPU_VM_FAULT_STOP_FIRST 1
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/amdgpu: Set the correct value for PDEs/PTEs of ATC memory on Raven
[not found] ` <ff321dde-dac3-9f51-266a-bca5ada11e5c-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
@ 2017-10-06 19:02 ` Zhao, Yong
0 siblings, 0 replies; 4+ messages in thread
From: Zhao, Yong @ 2017-10-06 19:02 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
Koenig, Christian
[-- Attachment #1.1: Type: text/plain, Size: 3767 bytes --]
Thanks. Pushed.
Yong
________________________________
From: Christian König <ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Sent: Friday, October 6, 2017 1:16:36 PM
To: Zhao, Yong; amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: Re: [PATCH] drm/amdgpu: Set the correct value for PDEs/PTEs of ATC memory on Raven
Am 06.10.2017 um 17:35 schrieb Yong Zhao:
> From: Yong Zhao <Yong.Zhao-5C7GfCeVMHo@public.gmane.org>
>
> Without the additional bits set in PDEs/PTEs, the ATC memory access
> would have failed on Raven.
>
> Change-Id: I28429ef6d39cdb01dc6f17fea4264ee22d7121d4
> Signed-off-by: Yong Zhao <yong.zhao-5C7GfCeVMHo@public.gmane.org>
> Acked-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
Nice solution for the define. Patch is Reviewed-by: Christian König
<christian.koenig-5C7GfCeVMHo@public.gmane.org>.
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 9 ++++++---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 10 ++++++++++
> 2 files changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index bca9eeb..d98d58a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -328,9 +328,10 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev,
> AMDGPU_GEM_CREATE_SHADOW);
>
> if (vm->pte_support_ats) {
> - init_value = AMDGPU_PTE_SYSTEM;
> + init_value = AMDGPU_PTE_DEFAULT_ATC;
> if (level != adev->vm_manager.num_level - 1)
> init_value |= AMDGPU_PDE_PTE;
> +
> }
>
> /* walk over the address space and allocate the page tables */
> @@ -2017,7 +2018,7 @@ int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
> list_del(&mapping->list);
>
> if (vm->pte_support_ats)
> - init_pte_value = AMDGPU_PTE_SYSTEM;
> + init_pte_value = AMDGPU_PTE_DEFAULT_ATC;
>
> r = amdgpu_vm_bo_update_mapping(adev, NULL, NULL, vm,
> mapping->start, mapping->last,
> @@ -2629,7 +2630,9 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>
> if (adev->asic_type == CHIP_RAVEN) {
> vm->pte_support_ats = true;
> - init_pde_value = AMDGPU_PTE_SYSTEM | AMDGPU_PDE_PTE;
> + init_pde_value = AMDGPU_PTE_DEFAULT_ATC
> + | AMDGPU_PDE_PTE;
> +
> }
> } else
> vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode &
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index 66efbc2..5d0cfc9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -73,6 +73,16 @@ struct amdgpu_bo_list_entry;
> #define AMDGPU_PTE_MTYPE(a) ((uint64_t)a << 57)
> #define AMDGPU_PTE_MTYPE_MASK AMDGPU_PTE_MTYPE(3ULL)
>
> +/* For Raven */
> +#define AMDGPU_MTYPE_CC 2
> +
> +#define AMDGPU_PTE_DEFAULT_ATC (AMDGPU_PTE_SYSTEM \
> + | AMDGPU_PTE_SNOOPED \
> + | AMDGPU_PTE_EXECUTABLE \
> + | AMDGPU_PTE_READABLE \
> + | AMDGPU_PTE_WRITEABLE \
> + | AMDGPU_PTE_MTYPE(AMDGPU_MTYPE_CC))
> +
> /* How to programm VM fault handling */
> #define AMDGPU_VM_FAULT_STOP_NEVER 0
> #define AMDGPU_VM_FAULT_STOP_FIRST 1
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_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/amdgpu: Set the correct value for PDEs/PTEs of ATC memory on Raven
[not found] ` <1507304133-21510-1-git-send-email-yong.zhao-5C7GfCeVMHo@public.gmane.org>
2017-10-06 17:16 ` Christian König
@ 2017-10-09 6:34 ` Zhang, Jerry (Junwei)
1 sibling, 0 replies; 4+ messages in thread
From: Zhang, Jerry (Junwei) @ 2017-10-09 6:34 UTC (permalink / raw)
To: Yong Zhao, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On 10/06/2017 11:35 PM, Yong Zhao wrote:
> From: Yong Zhao <Yong.Zhao@amd.com>
>
> Without the additional bits set in PDEs/PTEs, the ATC memory access
> would have failed on Raven.
>
> Change-Id: I28429ef6d39cdb01dc6f17fea4264ee22d7121d4
> Signed-off-by: Yong Zhao <yong.zhao@amd.com>
> Acked-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 9 ++++++---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 10 ++++++++++
> 2 files changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index bca9eeb..d98d58a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -328,9 +328,10 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev,
> AMDGPU_GEM_CREATE_SHADOW);
>
> if (vm->pte_support_ats) {
> - init_value = AMDGPU_PTE_SYSTEM;
> + init_value = AMDGPU_PTE_DEFAULT_ATC;
> if (level != adev->vm_manager.num_level - 1)
> init_value |= AMDGPU_PDE_PTE;
> +
> }
>
> /* walk over the address space and allocate the page tables */
> @@ -2017,7 +2018,7 @@ int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
> list_del(&mapping->list);
>
> if (vm->pte_support_ats)
> - init_pte_value = AMDGPU_PTE_SYSTEM;
> + init_pte_value = AMDGPU_PTE_DEFAULT_ATC;
>
> r = amdgpu_vm_bo_update_mapping(adev, NULL, NULL, vm,
> mapping->start, mapping->last,
> @@ -2629,7 +2630,9 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>
> if (adev->asic_type == CHIP_RAVEN) {
> vm->pte_support_ats = true;
> - init_pde_value = AMDGPU_PTE_SYSTEM | AMDGPU_PDE_PTE;
> + init_pde_value = AMDGPU_PTE_DEFAULT_ATC
> + | AMDGPU_PDE_PTE;
> +
> }
> } else
> vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode &
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index 66efbc2..5d0cfc9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -73,6 +73,16 @@ struct amdgpu_bo_list_entry;
> #define AMDGPU_PTE_MTYPE(a) ((uint64_t)a << 57)
> #define AMDGPU_PTE_MTYPE_MASK AMDGPU_PTE_MTYPE(3ULL)
>
> +/* For Raven */
> +#define AMDGPU_MTYPE_CC 2
We may use MTYPE_CC directly.
Jerry
> +
> +#define AMDGPU_PTE_DEFAULT_ATC (AMDGPU_PTE_SYSTEM \
> + | AMDGPU_PTE_SNOOPED \
> + | AMDGPU_PTE_EXECUTABLE \
> + | AMDGPU_PTE_READABLE \
> + | AMDGPU_PTE_WRITEABLE \
> + | AMDGPU_PTE_MTYPE(AMDGPU_MTYPE_CC))
> +
> /* How to programm VM fault handling */
> #define AMDGPU_VM_FAULT_STOP_NEVER 0
> #define AMDGPU_VM_FAULT_STOP_FIRST 1
>
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-10-09 6:34 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2017-10-06 15:35 [PATCH] drm/amdgpu: Set the correct value for PDEs/PTEs of ATC memory on Raven Yong Zhao
[not found] ` <1507304133-21510-1-git-send-email-yong.zhao-5C7GfCeVMHo@public.gmane.org>
2017-10-06 17:16 ` Christian König
[not found] ` <ff321dde-dac3-9f51-266a-bca5ada11e5c-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-10-06 19:02 ` Zhao, Yong
2017-10-09 6:34 ` Zhang, Jerry (Junwei)
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