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From: James Morse <james.morse-5wv7dgnIgG8@public.gmane.org>
To: Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Lorenzo Pieralisi
	<lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>,
	Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>,
	Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Loc Ho <lho-qTEPVZfXA3Y@public.gmane.org>,
	kvmarm-FPEHb7Xf0XXUo1n7N8X6UoWGPAHP3yOg@public.gmane.org,
	Christoffer Dall
	<christoffer.dall-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Subject: Re: [PATCH v3 04/13] arm64: alternatives: use tpidr_el2 on VHE hosts
Date: Fri, 13 Oct 2017 17:50:45 +0100	[thread overview]
Message-ID: <59E0EEE5.2020208@arm.com> (raw)
In-Reply-To: <20171013153148.dnejsvhxeui6opfw-+1aNUgJU5qkijLcmloz0ER/iLCjYCKR+VpNB7YpNyf8@public.gmane.org>

Hi Catalin,

On 13/10/17 16:31, Catalin Marinas wrote:
> On Fri, Sep 22, 2017 at 07:26:05PM +0100, James Morse wrote:
>> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
>> index cd52d365d1f0..8e4c7da2b126 100644
>> --- a/arch/arm64/kernel/cpufeature.c
>> +++ b/arch/arm64/kernel/cpufeature.c

>> @@ -1308,3 +1309,25 @@ static int __init enable_mrs_emulation(void)
>>  }
>>  
>>  late_initcall(enable_mrs_emulation);
>> +
>> +int cpu_copy_el2regs(void *__unused)
>> +{
>> +	int do_copyregs = 0;
>> +
>> +	/*
>> +	 * Copy register values that aren't redirected by hardware.
>> +	 *
>> +	 * Before code patching, we only set tpidr_el1, all CPUs need to copy
>> +	 * this value to tpidr_el2 before we patch the code. Once we've done
>> +	 * that, freshly-onlined CPUs will set tpidr_el2, so we don't need to
>> +	 * do anything here.
>> +	 */
>> +	asm volatile(ALTERNATIVE("mov %0, #1", "mov %0, #0",
>> +				 ARM64_HAS_VIRT_HOST_EXTN)
>> +		    : "=r" (do_copyregs) : : );
> 
> Can you just do:
> 
> 	if (cpu_have_const_cap(ARM64_HAS_VIRT_HOST_EXTN))
> 		write_sysreg(read_sysreg(tpidr_el1), tpidr_el2);
> 
> At this point the capability bits should be set and the jump labels
> enabled.

These are enabled too early, we haven't done patching yet.

We need to copy tpidr_el1 -> tpidr_el2 on all CPUs that are online before code
patching.

After code patching new CPUs set tpidr_el2 when they come online, so we don't
need to do the copy... but this enable method is still called. There is nothing
for us to do, and tpidr_el1 now contains junk, so the copy


cpu_have_const_cap() is great for knowing if we have a feature, here we want to
know if we've done the patching for this feature.

I can wrap the ALTERNATIVE() into a helper, something like:
> arm64_alternatives_applied(ARM64_HAS_VIRT_HOST_EXTN)

which should make it clearer.

Christoffer had the same question at connect, so I evidently haven't found the
right way of describing this yet.


> Otherwise:
> 
> Reviewed-by: Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>

Thanks for taking a look, I'll leave this RB until your happy with the
ALTERNATIVE() hackery above.


James
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WARNING: multiple messages have this Message-ID (diff)
From: james.morse@arm.com (James Morse)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 04/13] arm64: alternatives: use tpidr_el2 on VHE hosts
Date: Fri, 13 Oct 2017 17:50:45 +0100	[thread overview]
Message-ID: <59E0EEE5.2020208@arm.com> (raw)
In-Reply-To: <20171013153148.dnejsvhxeui6opfw@armageddon.cambridge.arm.com>

Hi Catalin,

On 13/10/17 16:31, Catalin Marinas wrote:
> On Fri, Sep 22, 2017 at 07:26:05PM +0100, James Morse wrote:
>> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
>> index cd52d365d1f0..8e4c7da2b126 100644
>> --- a/arch/arm64/kernel/cpufeature.c
>> +++ b/arch/arm64/kernel/cpufeature.c

>> @@ -1308,3 +1309,25 @@ static int __init enable_mrs_emulation(void)
>>  }
>>  
>>  late_initcall(enable_mrs_emulation);
>> +
>> +int cpu_copy_el2regs(void *__unused)
>> +{
>> +	int do_copyregs = 0;
>> +
>> +	/*
>> +	 * Copy register values that aren't redirected by hardware.
>> +	 *
>> +	 * Before code patching, we only set tpidr_el1, all CPUs need to copy
>> +	 * this value to tpidr_el2 before we patch the code. Once we've done
>> +	 * that, freshly-onlined CPUs will set tpidr_el2, so we don't need to
>> +	 * do anything here.
>> +	 */
>> +	asm volatile(ALTERNATIVE("mov %0, #1", "mov %0, #0",
>> +				 ARM64_HAS_VIRT_HOST_EXTN)
>> +		    : "=r" (do_copyregs) : : );
> 
> Can you just do:
> 
> 	if (cpu_have_const_cap(ARM64_HAS_VIRT_HOST_EXTN))
> 		write_sysreg(read_sysreg(tpidr_el1), tpidr_el2);
> 
> At this point the capability bits should be set and the jump labels
> enabled.

These are enabled too early, we haven't done patching yet.

We need to copy tpidr_el1 -> tpidr_el2 on all CPUs that are online before code
patching.

After code patching new CPUs set tpidr_el2 when they come online, so we don't
need to do the copy... but this enable method is still called. There is nothing
for us to do, and tpidr_el1 now contains junk, so the copy


cpu_have_const_cap() is great for knowing if we have a feature, here we want to
know if we've done the patching for this feature.

I can wrap the ALTERNATIVE() into a helper, something like:
> arm64_alternatives_applied(ARM64_HAS_VIRT_HOST_EXTN)

which should make it clearer.

Christoffer had the same question at connect, so I evidently haven't found the
right way of describing this yet.


> Otherwise:
> 
> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>

Thanks for taking a look, I'll leave this RB until your happy with the
ALTERNATIVE() hackery above.


James

  parent reply	other threads:[~2017-10-13 16:50 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-22 18:26 [PATCH v3 00/13] arm64/firmware: Software Delegated Exception Interface James Morse
2017-09-22 18:26 ` James Morse
     [not found] ` <20170922182614.27885-1-james.morse-5wv7dgnIgG8@public.gmane.org>
2017-09-22 18:26   ` [PATCH v3 01/13] KVM: arm64: Store vcpu on the stack during __guest_enter() James Morse
2017-09-22 18:26     ` James Morse
2017-09-22 18:26   ` [PATCH v3 02/13] KVM: arm/arm64: Convert kvm_host_cpu_state to a static per-cpu allocation James Morse
2017-09-22 18:26     ` James Morse
2017-09-22 18:26   ` [PATCH v3 03/13] KVM: arm64: Change hyp_panic()s dependency on tpidr_el2 James Morse
2017-09-22 18:26     ` James Morse
2017-09-22 18:26   ` [PATCH v3 04/13] arm64: alternatives: use tpidr_el2 on VHE hosts James Morse
2017-09-22 18:26     ` James Morse
     [not found]     ` <20170922182614.27885-5-james.morse-5wv7dgnIgG8@public.gmane.org>
2017-10-13 15:31       ` Catalin Marinas
2017-10-13 15:31         ` Catalin Marinas
     [not found]         ` <20171013153148.dnejsvhxeui6opfw-+1aNUgJU5qkijLcmloz0ER/iLCjYCKR+VpNB7YpNyf8@public.gmane.org>
2017-10-13 16:50           ` James Morse [this message]
2017-10-13 16:50             ` James Morse
     [not found]             ` <59E0EEE5.2020208-5wv7dgnIgG8@public.gmane.org>
2017-10-16  9:58               ` Catalin Marinas
2017-10-16  9:58                 ` Catalin Marinas
     [not found]                 ` <20171016095845.htg2g4jkyw3nvzub-+1aNUgJU5qkijLcmloz0ER/iLCjYCKR+VpNB7YpNyf8@public.gmane.org>
2017-10-17 16:36                   ` James Morse
2017-10-17 16:36                     ` James Morse
2017-10-16 10:17     ` Catalin Marinas
2017-10-16 10:17       ` Catalin Marinas
2017-09-22 18:26   ` [PATCH v3 05/13] KVM: arm64: Stop save/restoring host tpidr_el1 on VHE James Morse
2017-09-22 18:26     ` James Morse
2017-09-22 18:26   ` [PATCH v3 06/13] Docs: dt: add devicetree binding for describing arm64 SDEI firmware James Morse
2017-09-22 18:26     ` James Morse
2017-09-22 18:26   ` [PATCH v3 07/13] firmware: arm_sdei: Add driver for Software Delegated Exceptions James Morse
2017-09-22 18:26     ` James Morse
2017-10-13 15:49     ` Catalin Marinas
2017-10-13 15:49       ` Catalin Marinas
2017-09-22 18:26   ` [PATCH v3 08/13] arm64: Add vmap_stack header file James Morse
2017-09-22 18:26     ` James Morse
     [not found]     ` <20170922182614.27885-9-james.morse-5wv7dgnIgG8@public.gmane.org>
2017-10-13 15:42       ` Catalin Marinas
2017-10-13 15:42         ` Catalin Marinas
     [not found]         ` <20171013154226.xswo4y2viht22wvk-+1aNUgJU5qkijLcmloz0ER/iLCjYCKR+VpNB7YpNyf8@public.gmane.org>
2017-10-17 16:34           ` James Morse
2017-10-17 16:34             ` James Morse
2017-09-22 18:26   ` [PATCH v3 10/13] firmware: arm_sdei: Add support for CPU and system power states James Morse
2017-09-22 18:26     ` James Morse
     [not found]     ` <20170922182614.27885-11-james.morse-5wv7dgnIgG8@public.gmane.org>
2017-10-16 13:52       ` Catalin Marinas
2017-10-16 13:52         ` Catalin Marinas
2017-10-17 16:34         ` James Morse
2017-10-17 16:34           ` James Morse
2017-09-22 18:26   ` [PATCH v3 11/13] firmware: arm_sdei: add support for CPU private events James Morse
2017-09-22 18:26     ` James Morse
2017-09-22 18:26   ` [PATCH v3 12/13] arm64: acpi: Remove __init from acpi_psci_use_hvc() for use by SDEI James Morse
2017-09-22 18:26     ` James Morse
2017-09-22 18:26   ` [PATCH v3 13/13] firmware: arm_sdei: Discover SDEI support via ACPI James Morse
2017-09-22 18:26     ` James Morse
2017-09-22 18:26 ` [PATCH v3 09/13] arm64: kernel: Add arch-specific SDEI entry code and CPU masking James Morse
2017-09-22 18:26   ` James Morse
2017-10-16 13:41   ` Catalin Marinas
2017-10-16 13:41     ` Catalin Marinas
     [not found]     ` <20171016134139.sqe6xabdson2d5rd-+1aNUgJU5qkijLcmloz0ER/iLCjYCKR+VpNB7YpNyf8@public.gmane.org>
2017-10-17 16:34       ` James Morse
2017-10-17 16:34         ` James Morse
     [not found]         ` <59E63105.9080804-5wv7dgnIgG8@public.gmane.org>
2017-10-18 10:54           ` Catalin Marinas
2017-10-18 10:54             ` Catalin Marinas

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