From: Eddie James <eajames@linux.ibm.com>
To: linux-aspeed@lists.ozlabs.org
Subject: [PATCH v2] ARM: dts: rainier: Set PCA9552 pin types
Date: Fri, 28 Feb 2020 09:14:52 -0600 [thread overview]
Message-ID: <59ceccbd-b776-51fc-e80b-39427c70ec70@linux.ibm.com> (raw)
In-Reply-To: <20200225201415.431668-1-msbarth@linux.ibm.com>
On 2/25/20 2:14 PM, Matthew Barth wrote:
> All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type
> GPIO.
>
> Signed-off-by: Matthew Barth <msbarth@linux.ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
> ---
> v2: Added leds-pca955x.h include
> Added upstream to patch
> ---
> ---
> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index c63cefce636d..d9fa9fd48058 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -4,6 +4,7 @@
>
> #include "aspeed-g6.dtsi"
> #include <dt-bindings/gpio/aspeed-gpio.h>
> +#include <dt-bindings/leds/leds-pca955x.h>
>
> / {
> model = "Rainier";
> @@ -351,66 +352,82 @@
>
> gpio at 0 {
> reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 1 {
> reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 2 {
> reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 3 {
> reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 4 {
> reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 5 {
> reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 6 {
> reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 7 {
> reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 8 {
> reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 9 {
> reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 10 {
> reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 11 {
> reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 12 {
> reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 13 {
> reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 14 {
> reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio at 15 {
> reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> };
> };
>
WARNING: multiple messages have this Message-ID (diff)
From: Eddie James <eajames@linux.ibm.com>
To: Matthew Barth <msbarth@linux.ibm.com>,
Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>,
openbmc@lists.ozlabs.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
Brandon Wyman <bjwyman@gmail.com>
Subject: Re: [PATCH v2] ARM: dts: rainier: Set PCA9552 pin types
Date: Fri, 28 Feb 2020 09:14:52 -0600 [thread overview]
Message-ID: <59ceccbd-b776-51fc-e80b-39427c70ec70@linux.ibm.com> (raw)
In-Reply-To: <20200225201415.431668-1-msbarth@linux.ibm.com>
On 2/25/20 2:14 PM, Matthew Barth wrote:
> All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type
> GPIO.
>
> Signed-off-by: Matthew Barth <msbarth@linux.ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
> ---
> v2: Added leds-pca955x.h include
> Added upstream to patch
> ---
> ---
> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index c63cefce636d..d9fa9fd48058 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -4,6 +4,7 @@
>
> #include "aspeed-g6.dtsi"
> #include <dt-bindings/gpio/aspeed-gpio.h>
> +#include <dt-bindings/leds/leds-pca955x.h>
>
> / {
> model = "Rainier";
> @@ -351,66 +352,82 @@
>
> gpio@0 {
> reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@1 {
> reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@2 {
> reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@3 {
> reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@4 {
> reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@5 {
> reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@6 {
> reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@7 {
> reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@8 {
> reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@9 {
> reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@10 {
> reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@11 {
> reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@12 {
> reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@13 {
> reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@14 {
> reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@15 {
> reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> };
> };
>
WARNING: multiple messages have this Message-ID (diff)
From: Eddie James <eajames@linux.ibm.com>
To: Matthew Barth <msbarth@linux.ibm.com>,
Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>,
openbmc@lists.ozlabs.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
Brandon Wyman <bjwyman@gmail.com>
Subject: Re: [PATCH v2] ARM: dts: rainier: Set PCA9552 pin types
Date: Fri, 28 Feb 2020 09:14:52 -0600 [thread overview]
Message-ID: <59ceccbd-b776-51fc-e80b-39427c70ec70@linux.ibm.com> (raw)
In-Reply-To: <20200225201415.431668-1-msbarth@linux.ibm.com>
On 2/25/20 2:14 PM, Matthew Barth wrote:
> All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type
> GPIO.
>
> Signed-off-by: Matthew Barth <msbarth@linux.ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
> ---
> v2: Added leds-pca955x.h include
> Added upstream to patch
> ---
> ---
> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index c63cefce636d..d9fa9fd48058 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -4,6 +4,7 @@
>
> #include "aspeed-g6.dtsi"
> #include <dt-bindings/gpio/aspeed-gpio.h>
> +#include <dt-bindings/leds/leds-pca955x.h>
>
> / {
> model = "Rainier";
> @@ -351,66 +352,82 @@
>
> gpio@0 {
> reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@1 {
> reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@2 {
> reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@3 {
> reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@4 {
> reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@5 {
> reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@6 {
> reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@7 {
> reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@8 {
> reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@9 {
> reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@10 {
> reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@11 {
> reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@12 {
> reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@13 {
> reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@14 {
> reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> };
>
> gpio@15 {
> reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> };
> };
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-02-28 15:14 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-25 20:14 [PATCH v2] ARM: dts: rainier: Set PCA9552 pin types Matthew Barth
2020-02-25 20:14 ` Matthew Barth
2020-02-25 20:14 ` Matthew Barth
2020-02-25 20:14 ` Matthew Barth
2020-02-28 15:14 ` Eddie James [this message]
2020-02-28 15:14 ` Eddie James
2020-02-28 15:14 ` Eddie James
2020-02-28 17:24 ` Brandon Wyman
2020-02-28 17:24 ` Brandon Wyman
2020-02-28 17:24 ` Brandon Wyman
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=59ceccbd-b776-51fc-e80b-39427c70ec70@linux.ibm.com \
--to=eajames@linux.ibm.com \
--cc=linux-aspeed@lists.ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.