* [PATCH v2 0/5] Add imem clock for Exynos 5433 [not found] <CGME20181129155144eucas1p25ff3b4c969bd61830befd975ed5085ce@eucas1p2.samsung.com> @ 2018-11-29 15:51 ` Kamil Konieczny 2018-11-29 15:51 ` [PATCH v2 1/5] clk: samsung: exynos5433: fix typo in imem divider Kamil Konieczny ` (4 more replies) 0 siblings, 5 replies; 14+ messages in thread From: Kamil Konieczny @ 2018-11-29 15:51 UTC (permalink / raw) To: k.konieczny, linux-samsung-soc Cc: linux-clk, Chanwoo Choi, devicetree, Krzysztof Kozlowski, Kukjin Kim, Mark Rutland, Rob Herring, Sylwester Nawrocki, Bartlomiej Zolnierkiewicz, Marek Szyprowski Add imem clock for Exynos 5433. This will allow to use SSS and SlimSSS (Security SubSystem) with crypto functions. Changes since v1: - splitted typo patch into two, one of them for stable, suggested by Krzystof Kozlowski - added more registers as suggested by Chanwoo Choi Kamil Konieczny (5): clk: samsung: exynos5433: fix typo in imem divider clk: samsung: exynos5433: fix name typo in sssx arm64: dts: bindings: document imem clock arm64: dts: exynos: add imem clock clk: samsung: exynos5433: add imem clock .../bindings/clock/exynos5433-clock.txt | 23 +++ arch/arm64/boot/dts/exynos/exynos5433.dtsi | 15 ++ drivers/clk/samsung/clk-exynos5433.c | 195 +++++++++++++++++- include/dt-bindings/clock/exynos5433.h | 57 ++++- 4 files changed, 286 insertions(+), 4 deletions(-) -- 2.19.1 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 1/5] clk: samsung: exynos5433: fix typo in imem divider 2018-11-29 15:51 ` [PATCH v2 0/5] Add imem clock for Exynos 5433 Kamil Konieczny @ 2018-11-29 15:51 ` Kamil Konieczny 2018-11-29 22:53 ` Chanwoo Choi 2018-11-29 15:51 ` [PATCH v2 2/5] clk: samsung: exynos5433: fix name typo in sssx Kamil Konieczny ` (3 subsequent siblings) 4 siblings, 1 reply; 14+ messages in thread From: Kamil Konieczny @ 2018-11-29 15:51 UTC (permalink / raw) To: k.konieczny, linux-samsung-soc Cc: linux-clk, Chanwoo Choi, devicetree, Krzysztof Kozlowski, Kukjin Kim, Mark Rutland, Rob Herring, Sylwester Nawrocki, Bartlomiej Zolnierkiewicz, Marek Szyprowski, stable Fix typo in imem clock divider 200 switched with 266. Fixes: 5785d6e61f27 ("clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains") Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> --- drivers/clk/samsung/clk-exynos5433.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 751e2c4fb65b..ea47f49abc7f 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -568,10 +568,10 @@ static const struct samsung_gate_clock top_gate_clks[] __initconst = { GATE(CLK_ACLK_BUS1_400, "aclk_bus1_400", "div_aclk_bus1_400", ENABLE_ACLK_TOP, 25, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), - GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_266", + GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_200", ENABLE_ACLK_TOP, 24, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), - GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_200", + GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_266", ENABLE_ACLK_TOP, 23, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), GATE(CLK_ACLK_PERIC_66, "aclk_peric_66", "div_aclk_peric_66_b", -- 2.19.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 1/5] clk: samsung: exynos5433: fix typo in imem divider 2018-11-29 15:51 ` [PATCH v2 1/5] clk: samsung: exynos5433: fix typo in imem divider Kamil Konieczny @ 2018-11-29 22:53 ` Chanwoo Choi 0 siblings, 0 replies; 14+ messages in thread From: Chanwoo Choi @ 2018-11-29 22:53 UTC (permalink / raw) To: Kamil Konieczny, linux-samsung-soc Cc: linux-clk, devicetree, Krzysztof Kozlowski, Kukjin Kim, Mark Rutland, Rob Herring, Sylwester Nawrocki, Bartlomiej Zolnierkiewicz, Marek Szyprowski, stable Hi, On 2018년 11월 30일 00:51, Kamil Konieczny wrote: > Fix typo in imem clock divider 200 switched with 266. > > Fixes: 5785d6e61f27 ("clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains") > Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> > --- > drivers/clk/samsung/clk-exynos5433.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c > index 751e2c4fb65b..ea47f49abc7f 100644 > --- a/drivers/clk/samsung/clk-exynos5433.c > +++ b/drivers/clk/samsung/clk-exynos5433.c > @@ -568,10 +568,10 @@ static const struct samsung_gate_clock top_gate_clks[] __initconst = { > GATE(CLK_ACLK_BUS1_400, "aclk_bus1_400", "div_aclk_bus1_400", > ENABLE_ACLK_TOP, 25, > CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), > - GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_266", > + GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_200", > ENABLE_ACLK_TOP, 24, > CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), > - GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_200", > + GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_266", > ENABLE_ACLK_TOP, 23, > CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), > GATE(CLK_ACLK_PERIC_66, "aclk_peric_66", "div_aclk_peric_66_b", > Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> -- Best Regards, Chanwoo Choi Samsung Electronics ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 2/5] clk: samsung: exynos5433: fix name typo in sssx 2018-11-29 15:51 ` [PATCH v2 0/5] Add imem clock for Exynos 5433 Kamil Konieczny 2018-11-29 15:51 ` [PATCH v2 1/5] clk: samsung: exynos5433: fix typo in imem divider Kamil Konieczny @ 2018-11-29 15:51 ` Kamil Konieczny 2018-11-29 22:54 ` Chanwoo Choi 2018-11-29 15:51 ` [PATCH v2 3/5] arm64: dts: bindings: document imem clock Kamil Konieczny ` (2 subsequent siblings) 4 siblings, 1 reply; 14+ messages in thread From: Kamil Konieczny @ 2018-11-29 15:51 UTC (permalink / raw) To: k.konieczny, linux-samsung-soc Cc: linux-clk, Chanwoo Choi, devicetree, Krzysztof Kozlowski, Kukjin Kim, Mark Rutland, Rob Herring, Sylwester Nawrocki, Bartlomiej Zolnierkiewicz, Marek Szyprowski Fix typo in sssx name, there should be three letters 's'. Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> --- drivers/clk/samsung/clk-exynos5433.c | 2 +- include/dt-bindings/clock/exynos5433.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index ea47f49abc7f..24c3360db65b 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -559,7 +559,7 @@ static const struct samsung_gate_clock top_gate_clks[] __initconst = { /* ENABLE_ACLK_TOP */ GATE(CLK_ACLK_G3D_400, "aclk_g3d_400", "div_aclk_g3d_400", ENABLE_ACLK_TOP, 30, CLK_IS_CRITICAL, 0), - GATE(CLK_ACLK_IMEM_SSX_266, "aclk_imem_ssx_266", + GATE(CLK_ACLK_IMEM_SSSX_266, "aclk_imem_sssx_266", "div_aclk_imem_sssx_266", ENABLE_ACLK_TOP, 29, CLK_IGNORE_UNUSED, 0), GATE(CLK_ACLK_BUS0_400, "aclk_bus0_400", "div_aclk_bus0_400", diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h index 98bd85ce1e45..87bb2b017143 100644 --- a/include/dt-bindings/clock/exynos5433.h +++ b/include/dt-bindings/clock/exynos5433.h @@ -156,7 +156,7 @@ #define CLK_ACLK_G2D_266 220 #define CLK_ACLK_G2D_400 221 #define CLK_ACLK_G3D_400 222 -#define CLK_ACLK_IMEM_SSX_266 223 +#define CLK_ACLK_IMEM_SSSX_266 223 #define CLK_ACLK_BUS0_400 224 #define CLK_ACLK_BUS1_400 225 #define CLK_ACLK_IMEM_200 226 -- 2.19.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 2/5] clk: samsung: exynos5433: fix name typo in sssx 2018-11-29 15:51 ` [PATCH v2 2/5] clk: samsung: exynos5433: fix name typo in sssx Kamil Konieczny @ 2018-11-29 22:54 ` Chanwoo Choi 0 siblings, 0 replies; 14+ messages in thread From: Chanwoo Choi @ 2018-11-29 22:54 UTC (permalink / raw) To: Kamil Konieczny, linux-samsung-soc Cc: linux-clk, devicetree, Krzysztof Kozlowski, Kukjin Kim, Mark Rutland, Rob Herring, Sylwester Nawrocki, Bartlomiej Zolnierkiewicz, Marek Szyprowski Hi, On 2018년 11월 30일 00:51, Kamil Konieczny wrote: > Fix typo in sssx name, there should be three letters 's'. > > Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> > --- > drivers/clk/samsung/clk-exynos5433.c | 2 +- > include/dt-bindings/clock/exynos5433.h | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c > index ea47f49abc7f..24c3360db65b 100644 > --- a/drivers/clk/samsung/clk-exynos5433.c > +++ b/drivers/clk/samsung/clk-exynos5433.c > @@ -559,7 +559,7 @@ static const struct samsung_gate_clock top_gate_clks[] __initconst = { > /* ENABLE_ACLK_TOP */ > GATE(CLK_ACLK_G3D_400, "aclk_g3d_400", "div_aclk_g3d_400", > ENABLE_ACLK_TOP, 30, CLK_IS_CRITICAL, 0), > - GATE(CLK_ACLK_IMEM_SSX_266, "aclk_imem_ssx_266", > + GATE(CLK_ACLK_IMEM_SSSX_266, "aclk_imem_sssx_266", > "div_aclk_imem_sssx_266", ENABLE_ACLK_TOP, > 29, CLK_IGNORE_UNUSED, 0), > GATE(CLK_ACLK_BUS0_400, "aclk_bus0_400", "div_aclk_bus0_400", > diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h > index 98bd85ce1e45..87bb2b017143 100644 > --- a/include/dt-bindings/clock/exynos5433.h > +++ b/include/dt-bindings/clock/exynos5433.h > @@ -156,7 +156,7 @@ > #define CLK_ACLK_G2D_266 220 > #define CLK_ACLK_G2D_400 221 > #define CLK_ACLK_G3D_400 222 > -#define CLK_ACLK_IMEM_SSX_266 223 > +#define CLK_ACLK_IMEM_SSSX_266 223 > #define CLK_ACLK_BUS0_400 224 > #define CLK_ACLK_BUS1_400 225 > #define CLK_ACLK_IMEM_200 226 > Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> -- Best Regards, Chanwoo Choi Samsung Electronics ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 3/5] arm64: dts: bindings: document imem clock 2018-11-29 15:51 ` [PATCH v2 0/5] Add imem clock for Exynos 5433 Kamil Konieczny 2018-11-29 15:51 ` [PATCH v2 1/5] clk: samsung: exynos5433: fix typo in imem divider Kamil Konieczny 2018-11-29 15:51 ` [PATCH v2 2/5] clk: samsung: exynos5433: fix name typo in sssx Kamil Konieczny @ 2018-11-29 15:51 ` Kamil Konieczny 2018-11-29 23:42 ` Stephen Boyd 2018-11-29 15:51 ` [PATCH v2 4/5] arm64: dts: exynos: add " Kamil Konieczny 2018-11-29 15:51 ` Kamil Konieczny 4 siblings, 1 reply; 14+ messages in thread From: Kamil Konieczny @ 2018-11-29 15:51 UTC (permalink / raw) To: k.konieczny, linux-samsung-soc Cc: linux-clk, Chanwoo Choi, devicetree, Krzysztof Kozlowski, Kukjin Kim, Mark Rutland, Rob Herring, Sylwester Nawrocki, Bartlomiej Zolnierkiewicz, Marek Szyprowski Document imem clock bindings for SSS (Security SubSystem) and SlimSSS IPs. Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> --- .../bindings/clock/exynos5433-clock.txt | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt index 50d5897c9849..4e4352bf5a0b 100644 --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -19,6 +19,8 @@ Required Properties: which generates clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC IPs. - "samsung,exynos5433-cmu-fsys" - clock controller compatible for CMU_FSYS which generates clocks for USB/UFS/SDMMC/TSI/PDMA IPs. + - "samsung,exynos5433-cmu-imem" - clock controller compatible for CMU_IMEM + which generates clocks for SSS (Security SubSystem) and SlimSSS IPs. - "samsung,exynos5433-cmu-g2d" - clock controller compatible for CMU_G2D which generates clocks for G2D/MDMA IPs. - "samsung,exynos5433-cmu-disp" - clock controller compatible for CMU_DISP @@ -88,6 +90,12 @@ Required Properties: - sclk_usbhost30_fsys - sclk_usbdrd30_fsys + Input clocks for imem clock controller: + - oscclk + - aclk_imem_sssx_266 + - aclk_imem_266 + - aclk_imem_200 + Input clocks for g2d clock controller: - oscclk - aclk_g2d_266 @@ -264,6 +272,21 @@ Example 2: Examples of clock controller nodes are listed below. <&cmu_top CLK_SCLK_USBDRD30_FSYS>; }; + cmu_imem: clock-controller@11060000 { + compatible = "samsung,exynos5433-cmu-imem"; + reg = <0x11060000 0x1000>; + #clock-cells = <1>; + + clock-names = "oscclk", + "aclk_imem_sssx_266", + "aclk_imem_266", + "aclk_imem_200"; + clocks = <&xxti>, + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_200>; + }; + cmu_g2d: clock-controller@12460000 { compatible = "samsung,exynos5433-cmu-g2d"; reg = <0x12460000 0x0b08>; -- 2.19.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 3/5] arm64: dts: bindings: document imem clock 2018-11-29 15:51 ` [PATCH v2 3/5] arm64: dts: bindings: document imem clock Kamil Konieczny @ 2018-11-29 23:42 ` Stephen Boyd 2018-12-03 10:44 ` Sylwester Nawrocki 0 siblings, 1 reply; 14+ messages in thread From: Stephen Boyd @ 2018-11-29 23:42 UTC (permalink / raw) To: k.konieczny, linux-samsung-soc Cc: linux-clk, Chanwoo Choi, devicetree, Krzysztof Kozlowski, Kukjin Kim, Mark Rutland, Rob Herring, Sylwester Nawrocki, Bartlomiej Zolnierkiewicz, Marek Szyprowski Quoting Kamil Konieczny (2018-11-29 07:51:32) > Document imem clock bindings for SSS (Security SubSystem) and SlimSSS IPs. > > Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> > --- Fix the subject of this patch please. It's not arm64: or dts: > .../bindings/clock/exynos5433-clock.txt | 23 +++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > index 50d5897c9849..4e4352bf5a0b 100644 > --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > @@ -264,6 +272,21 @@ Example 2: Examples of clock controller nodes are listed below. > <&cmu_top CLK_SCLK_USBDRD30_FSYS>; > }; > > + cmu_imem: clock-controller@11060000 { > + compatible = "samsung,exynos5433-cmu-imem"; > + reg = <0x11060000 0x1000>; > + #clock-cells = <1>; > + > + clock-names = "oscclk", How about just osc? clk seems redundant. > + "aclk_imem_sssx_266", > + "aclk_imem_266", > + "aclk_imem_200"; And what is 'aclk'? Also redundant? > + clocks = <&xxti>, > + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, > + <&cmu_top CLK_DIV_ACLK_IMEM_266>, > + <&cmu_top CLK_DIV_ACLK_IMEM_200>; > + }; > + > cmu_g2d: clock-controller@12460000 { > compatible = "samsung,exynos5433-cmu-g2d"; > reg = <0x12460000 0x0b08>; > -- > 2.19.1 > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 3/5] arm64: dts: bindings: document imem clock 2018-11-29 23:42 ` Stephen Boyd @ 2018-12-03 10:44 ` Sylwester Nawrocki 2018-12-05 19:46 ` Stephen Boyd 0 siblings, 1 reply; 14+ messages in thread From: Sylwester Nawrocki @ 2018-12-03 10:44 UTC (permalink / raw) To: Stephen Boyd, k.konieczny Cc: linux-samsung-soc, linux-clk, Chanwoo Choi, devicetree, Krzysztof Kozlowski, Kukjin Kim, Mark Rutland, Rob Herring, Bartlomiej Zolnierkiewicz, Marek Szyprowski Hi, On 11/30/18 00:42, Stephen Boyd wrote: > Quoting Kamil Konieczny (2018-11-29 07:51:32) >> Document imem clock bindings for SSS (Security SubSystem) and SlimSSS IPs. >> >> Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> >> --- > > Fix the subject of this patch please. It's not arm64: or dts: > >> .../bindings/clock/exynos5433-clock.txt | 23 +++++++++++++++++++ >> 1 file changed, 23 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt >> index 50d5897c9849..4e4352bf5a0b 100644 >> --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt >> +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt >> @@ -264,6 +272,21 @@ Example 2: Examples of clock controller nodes are listed below. >> <&cmu_top CLK_SCLK_USBDRD30_FSYS>; >> }; >> >> + cmu_imem: clock-controller@11060000 { >> + compatible = "samsung,exynos5433-cmu-imem"; >> + reg = <0x11060000 0x1000>; >> + #clock-cells = <1>; >> + >> + clock-names = "oscclk", > > How about just osc? clk seems redundant. Can we keep this "oscclk" name? This patch just adds missing definition of one of multiple CMUs in the SoC and for the all other CMUs "oscclk" name has been adopted for the OSCCLK root oscillator clock. The name is exactly as on the diagrams in the datasheet, just in lower case. To avoid confusion I would prefer to stay with same name as used for the other CMUs. >> + "aclk_imem_sssx_266", >> + "aclk_imem_266", >> + "aclk_imem_200"; > > And what is 'aclk'? Also redundant? Again the names used here are exactly as in the SoC datasheet. I know we could use shorted names for these consumer clocks however at this point I would prefer to use same convention as for the other CMUs. ACLK means AXI bus clock, the IMEM CMU is basically just gates that pass the clocks further to the SoC peripheral blocks. >> + clocks = <&xxti>, >> + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, >> + <&cmu_top CLK_DIV_ACLK_IMEM_266>, >> + <&cmu_top CLK_DIV_ACLK_IMEM_200>; >> + }; >> -- Regards, Sylwester ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 3/5] arm64: dts: bindings: document imem clock 2018-12-03 10:44 ` Sylwester Nawrocki @ 2018-12-05 19:46 ` Stephen Boyd 0 siblings, 0 replies; 14+ messages in thread From: Stephen Boyd @ 2018-12-05 19:46 UTC (permalink / raw) To: Sylwester Nawrocki, k.konieczny Cc: linux-samsung-soc, linux-clk, Chanwoo Choi, devicetree, Krzysztof Kozlowski, Kukjin Kim, Mark Rutland, Rob Herring, Bartlomiej Zolnierkiewicz, Marek Szyprowski Quoting Sylwester Nawrocki (2018-12-03 02:44:17) > Hi, > > On 11/30/18 00:42, Stephen Boyd wrote: > > Quoting Kamil Konieczny (2018-11-29 07:51:32) > >> Document imem clock bindings for SSS (Security SubSystem) and SlimSSS IPs. > >> > >> Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> > >> --- > > > > Fix the subject of this patch please. It's not arm64: or dts: > > > >> .../bindings/clock/exynos5433-clock.txt | 23 +++++++++++++++++++ > >> 1 file changed, 23 insertions(+) > >> > >> diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > >> index 50d5897c9849..4e4352bf5a0b 100644 > >> --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > >> +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > >> @@ -264,6 +272,21 @@ Example 2: Examples of clock controller nodes are listed below. > >> <&cmu_top CLK_SCLK_USBDRD30_FSYS>; > >> }; > >> > >> + cmu_imem: clock-controller@11060000 { > >> + compatible = "samsung,exynos5433-cmu-imem"; > >> + reg = <0x11060000 0x1000>; > >> + #clock-cells = <1>; > >> + > >> + clock-names = "oscclk", > > > > How about just osc? clk seems redundant. > > Can we keep this "oscclk" name? This patch just adds missing definition > of one of multiple CMUs in the SoC and for the all other CMUs "oscclk" > name has been adopted for the OSCCLK root oscillator clock. The name is > exactly as on the diagrams in the datasheet, just in lower case. > To avoid confusion I would prefer to stay with same name as used for the > other CMUs. Ok. > > >> + "aclk_imem_sssx_266", > >> + "aclk_imem_266", > >> + "aclk_imem_200"; > > > > And what is 'aclk'? Also redundant? > > Again the names used here are exactly as in the SoC datasheet. I know we > could use shorted names for these consumer clocks however at this point > I would prefer to use same convention as for the other CMUs. > > ACLK means AXI bus clock, the IMEM CMU is basically just gates that pass > the clocks further to the SoC peripheral blocks. Sure! Was just hoping to avoid 'clk' everywhere. ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 4/5] arm64: dts: exynos: add imem clock 2018-11-29 15:51 ` [PATCH v2 0/5] Add imem clock for Exynos 5433 Kamil Konieczny ` (2 preceding siblings ...) 2018-11-29 15:51 ` [PATCH v2 3/5] arm64: dts: bindings: document imem clock Kamil Konieczny @ 2018-11-29 15:51 ` Kamil Konieczny 2018-11-29 15:51 ` Kamil Konieczny 4 siblings, 0 replies; 14+ messages in thread From: Kamil Konieczny @ 2018-11-29 15:51 UTC (permalink / raw) To: k.konieczny, linux-samsung-soc Cc: linux-clk, Chanwoo Choi, devicetree, Krzysztof Kozlowski, Kukjin Kim, Mark Rutland, Rob Herring, Sylwester Nawrocki, Bartlomiej Zolnierkiewicz, Marek Szyprowski Add description for imem clock. The users can use compatibility "samsung,exynos5433-cmu-imem". Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 2131f12364cb..34055fa3a9d0 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -340,6 +340,21 @@ <&cmu_top CLK_SCLK_USBDRD30_FSYS>; }; + cmu_imem: clock-controller@11060000 { + compatible = "samsung,exynos5433-cmu-imem"; + reg = <0x11060000 0x1000>; + #clock-cells = <1>; + + clock-names = "oscclk", + "aclk_imem_sssx_266", + "aclk_imem_266", + "aclk_imem_200"; + clocks = <&xxti>, + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_200>; + }; + cmu_g2d: clock-controller@12460000 { compatible = "samsung,exynos5433-cmu-g2d"; reg = <0x12460000 0x1000>; -- 2.19.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 5/5] clk: samsung: exynos5433: add imem clock 2018-11-29 15:51 ` [PATCH v2 0/5] Add imem clock for Exynos 5433 Kamil Konieczny @ 2018-11-29 15:51 ` Kamil Konieczny 2018-11-29 15:51 ` [PATCH v2 2/5] clk: samsung: exynos5433: fix name typo in sssx Kamil Konieczny ` (3 subsequent siblings) 4 siblings, 0 replies; 14+ messages in thread From: Kamil Konieczny @ 2018-11-29 15:51 UTC (permalink / raw) To: k.konieczny Cc: Rob Herring, Mark Rutland, Kukjin Kim, Krzysztof Kozlowski, devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel Add imem clock for exynos5433. This will enable to use crypto Security SubSystem (in short SSS) and SlimSSS IP blocks. Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> --- drivers/clk/samsung/clk-exynos5433.c | 189 +++++++++++++++++++++++++ include/dt-bindings/clock/exynos5433.h | 55 +++++++ 2 files changed, 244 insertions(+) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 24c3360db65b..ab03126f350b 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -2345,6 +2345,192 @@ static const struct samsung_cmu_info fsys_cmu_info __initconst = { .clk_name = "aclk_fsys_200", }; +/* + * Register offset definitions for CMU_IMEM + * + */ +#define ENABLE_ACLK_IMEM 0x0800 +#define ENABLE_ACLK_IMEM_INT_MEM 0x0804 +#define ENABLE_ACLK_IMEM_SSS 0x0808 +#define ENABLE_ACLK_IMEM_SLIMSSS 0x080c +#define ENABLE_ACLK_IMEM_RTIC 0x0810 +#define ENABLE_ACLK_IMEM_SMMU_SSS 0x0814 +#define ENABLE_ACLK_IMEM_SMMU_SLIMSSS 0x0818 +#define ENABLE_ACLK_IMEM_SMMU_RTIC 0x081c +#define ENABLE_ACLK_IMEM_ARBG_TX 0x0820 +#define ENABLE_ACLK_IMEM_SMMU_ARBG_TX 0x0824 +#define ENABLE_PCLK_IMEM 0x0900 +#define ENABLE_PCLK_IMEM_SSS 0x0904 +#define ENABLE_PCLK_IMEM_SLIMSSS 0x0908 +#define ENABLE_PCLK_IMEM_RTIC 0x090c +#define ENABLE_PCLK_IMEM_SMMU_SSS 0x0910 +#define ENABLE_PCLK_IMEM_SMMU_SLIMSSS 0x0914 +#define ENABLE_PCLK_IMEM_SMMU_RTIC 0x0918 +#define ENABLE_PCLK_IMEM_SMMU_ARGB_TX 0x091c + +static const unsigned long imem_clk_regs[] __initconst = { + ENABLE_ACLK_IMEM, + ENABLE_ACLK_IMEM_INT_MEM, + ENABLE_ACLK_IMEM_SSS, + ENABLE_ACLK_IMEM_SLIMSSS, + ENABLE_ACLK_IMEM_RTIC, + ENABLE_ACLK_IMEM_SMMU_SSS, + ENABLE_ACLK_IMEM_SMMU_SLIMSSS, + ENABLE_ACLK_IMEM_SMMU_RTIC, + ENABLE_ACLK_IMEM_ARBG_TX, + ENABLE_ACLK_IMEM_SMMU_ARBG_TX, + ENABLE_PCLK_IMEM, + ENABLE_PCLK_IMEM_SSS, + ENABLE_PCLK_IMEM_SLIMSSS, + ENABLE_PCLK_IMEM_RTIC, + ENABLE_PCLK_IMEM_SMMU_SSS, + ENABLE_PCLK_IMEM_SMMU_SLIMSSS, + ENABLE_PCLK_IMEM_SMMU_RTIC, + ENABLE_PCLK_IMEM_SMMU_ARGB_TX, +}; + +static const struct samsung_gate_clock imem_gate_clks[] __initconst = { + /* ENABLE_ACLK_IMEM */ + GATE(CLK_ACLK_AXI2AHB_IMEMH, "aclk_axi2ahb_imemh", "aclk_imem_200", + ENABLE_ACLK_IMEM, 24, 0, 0), + GATE(CLK_ACLK_AXIDS_SROMC, "aclk_axids_sromc", "aclk_imem_200", + ENABLE_ACLK_IMEM, 23, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_SROMC, "aclk_sromc", "aclk_imem_200", + ENABLE_ACLK_IMEM, 22, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_ARBG_TX, "aclk_bts_arbg_tx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 21, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXI_IMEMX, "aclk_asyncaxi_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 20, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIUS_IMEMX, "aclk_axius_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 19, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_IMEMX, "aclk_xiu_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 18, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXI_SSSX, "aclk_asyncaxi_sssx", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 17, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SLIMSSS, "aclk_bts_slimsss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 15, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SSS_DRAM, "aclk_bts_sss_dram", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 14, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SSS_CCI, "aclk_bts_sss_cci", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 13, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ALB_IMEM, "aclk_alb_imem", "aclk_imem_266", + ENABLE_ACLK_IMEM, 12, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_IMEM1P, "aclk_axids_pimemx_imem1p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 11, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_IMEM0P, "aclk_axids_pimemx_imem0p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 10, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_GIC, "aclk_axids_pimemx_gic", "aclk_imem_200", + ENABLE_ACLK_IMEM, 9, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAHBM_SSS_ATLAS, "aclk_asyncahbm_sss_atlas", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 7, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXIS_MIF_PIMEMX, "aclk_asyncaxis_mif_pimemx", "aclk_imem_200", + ENABLE_ACLK_IMEM, 6, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXI2APB_IMEM1P, "aclk_axi2apb_imem1p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 5, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXI2APB_IMEM0P, "aclk_axi2apb_imem0p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 4, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_SSSX, "aclk_xiu_sssx", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 3, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_PIMEMX, "aclk_xiu_pimemx", "aclk_imem_200", + ENABLE_ACLK_IMEM, 2, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_IMEMND_266, "aclk_imemnd_266", "aclk_imem_266", + ENABLE_ACLK_IMEM, 1, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_GIC, "aclk_gic", "aclk_imem_200", + ENABLE_ACLK_IMEM, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_ACLK_IMEM_INT_MEM */ + GATE(CLK_ACLK_INT_MEM, "aclk_int_mem", "aclk_imem_200", + ENABLE_ACLK_IMEM_INT_MEM, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_SSS */ + GATE(CLK_ACLK_SSS, "aclk_sss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_SLIMSSS */ + GATE(CLK_ACLK_SLIMSSS, "aclk_slimsss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_RTIC */ + GATE(CLK_ACLK_RTIC, "aclk_rtic", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_RTIC, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_SMMU_SSS */ + GATE(CLK_ACLK_SMMU_SSS_DRAM, "aclk_smmu_sss_dram", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_SSS, 1, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_SMMU_SSS_CCI, "aclk_smmu_sss_cci", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_SSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_SMMU_SLIMSSS */ + GATE(CLK_ACLK_SMMU_SLIMSSS, "aclk_smmu_slimsss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_SMMU_RTIC */ + GATE(CLK_ACLK_SMMU_RTIC, "aclk_smmu_rtic", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_RTIC, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_ARBG_TX */ + GATE(CLK_ACLK_ARBG_TX, "aclk_arbg_tx", "aclk_imem_266", + ENABLE_ACLK_IMEM_ARBG_TX, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_SMMU_ARBG_TX */ + GATE(CLK_ACLK_SMMU_ARBG_TX, "aclk_smmu_arbg_tx", "aclk_imem_266", + ENABLE_ACLK_IMEM_SMMU_ARBG_TX, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_PCLK_IMEM */ + GATE(CLK_PCLK_GPIO_IMEM, "pclk_gpio_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 17, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ASYNCAXI_IMEMX, "pclk_asyncaxi_imemx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 16, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_ARBG_TX, "pclk_bts_arbg_tx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 15, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ASYNCAPB_ARBG_TX, "pclk_asyncapb_arbg_tx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 14, CLK_IGNORE_UNUSED, 0), + + GATE(CLK_PCLK_BTS_SLIMSSS, "pclk_bts_slimsss", "aclk_imem_200", + ENABLE_PCLK_IMEM, 8, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_SSS_DRAM, "pclk_bts_sss_dram", "aclk_imem_200", + ENABLE_PCLK_IMEM, 7, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_SSS_CCI, "pclk_bts_sss_cci", "aclk_imem_200", + ENABLE_PCLK_IMEM, 6, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ALB_IMEM, "pclk_alb_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 5, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_PMU_IMEM, "pclk_pmu_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 4, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_SYSREG_IMEM, "pclk_sysreg_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 3, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SSS */ + GATE(CLK_PCLK_SSS, "pclk_sss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SLIMSSS */ + GATE(CLK_PCLK_SLIMSSS, "pclk_slimsss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_RTIC */ + GATE(CLK_PCLK_RTIC, "pclk_rtic", "aclk_imem_200", + ENABLE_PCLK_IMEM_RTIC, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SMMU_SSS */ + GATE(CLK_PCLK_SMMU_SSS_DRAM, "pclk_smmu_sss_dram", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_SSS, 1, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_SMMU_SSS_CCI, "pclk_smmu_sss_cci", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_SSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SMMU_SLIMSSS */ + GATE(CLK_PCLK_SMMU_SLIMSSS, "pclk_smmu_slimsss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SMMU_RTIC */ + GATE(CLK_PCLK_SMMU_RTIC, "pclk_sss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_RTIC, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SMMU_ARGB_TX */ + GATE(CLK_PCLK_SMMU_ARBG_TX, "pclk_smmu_arbg_tx", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_ARGB_TX, 0, CLK_IGNORE_UNUSED, 0), +}; + +static const struct samsung_cmu_info imem_cmu_info __initconst = { + .gate_clks = imem_gate_clks, + .nr_gate_clks = ARRAY_SIZE(imem_gate_clks), + .nr_clk_ids = IMEM_NR_CLK, + .clk_regs = imem_clk_regs, + .nr_clk_regs = ARRAY_SIZE(imem_clk_regs), +}; + +static void __init exynos5433_cmu_imem_init(struct device_node *np) +{ + samsung_cmu_register_one(np, &imem_cmu_info); +} + +CLK_OF_DECLARE(exynos5433_cmu_imem, "samsung,exynos5433-cmu-imem", + exynos5433_cmu_imem_init); + /* * Register offset definitions for CMU_G2D */ @@ -5648,6 +5834,9 @@ static const struct of_device_id exynos5433_cmu_of_match[] = { }, { .compatible = "samsung,exynos5433-cmu-hevc", .data = &hevc_cmu_info, + }, { + .compatible = "samsung,exynos5433-cmu-imem", + .data = &imem_cmu_info, }, { .compatible = "samsung,exynos5433-cmu-isp", .data = &isp_cmu_info, diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h index 87bb2b017143..312d8810b56d 100644 --- a/include/dt-bindings/clock/exynos5433.h +++ b/include/dt-bindings/clock/exynos5433.h @@ -623,6 +623,61 @@ #define FSYS_NR_CLK 116 +/* CMU_IMEM */ +#define CLK_ACLK_SSS 1 +#define CLK_ACLK_SLIMSSS 2 +#define CLK_ACLK_RTIC 3 +#define CLK_ACLK_XIU_SSSX 4 +#define CLK_ACLK_ASYNCAHBM_SSS_ATLAS 5 +#define CLK_ACLK_ASYNCAXI_SSSX 6 +#define CLK_ACLK_BTS_SSS_CCI 7 +#define CLK_ACLK_BTS_SSS_DRAM 8 +#define CLK_ACLK_BTS_SLIMSSS 9 +#define CLK_ACLK_SMMU_SSS_CCI 10 +#define CLK_ACLK_SMMU_SSS_DRAM 11 +#define CLK_ACLK_SMMU_SLIMSSS 12 +#define CLK_ACLK_SMMU_RTIC 13 +#define CLK_ACLK_IMEMND_266 14 +#define CLK_ACLK_ALB_IMEM 15 +#define CLK_ACLK_XIU_IMEMX 16 +#define CLK_ACLK_AXIUS_IMEMX 17 +#define CLK_ACLK_ASYNCAXI_IMEMX 18 +#define CLK_ACLK_ARBG_TX 19 +#define CLK_ACLK_BTS_ARBG_TX 20 +#define CLK_ACLK_SMMU_ARBG_TX 21 +#define CLK_ACLK_GIC 22 +#define CLK_ACLK_INT_MEM 23 +#define CLK_ACLK_XIU_PIMEMX 24 +#define CLK_ACLK_AXI2APB_IMEM0P 25 +#define CLK_ACLK_AXI2APB_IMEM1P 26 +#define CLK_ACLK_ASYNCAXIS_MIF_PIMEMX 27 +#define CLK_ACLK_AXIDS_PIMEMX_GIC 28 +#define CLK_ACLK_AXIDS_PIMEMX_IMEM0P 29 +#define CLK_ACLK_AXIDS_PIMEMX_IMEM1P 30 +#define CLK_ACLK_SROMC 31 +#define CLK_ACLK_AXIDS_SROMC 32 +#define CLK_ACLK_AXI2AHB_IMEMH 33 +#define CLK_PCLK_SSS 34 +#define CLK_PCLK_SLIMSSS 35 +#define CLK_PCLK_RTIC 36 +#define CLK_PCLK_SYSREG_IMEM 37 +#define CLK_PCLK_PMU_IMEM 38 +#define CLK_PCLK_ALB_IMEM 39 +#define CLK_PCLK_BTS_SSS_CCI 40 +#define CLK_PCLK_BTS_SSS_DRAM 41 +#define CLK_PCLK_BTS_SLIMSSS 42 +#define CLK_PCLK_SMMU_SSS_CCI 43 +#define CLK_PCLK_SMMU_SSS_DRAM 44 +#define CLK_PCLK_SMMU_SLIMSSS 45 +#define CLK_PCLK_SMMU_RTIC 46 +#define CLK_PCLK_ASYNCAPB_ARBG_TX 47 +#define CLK_PCLK_BTS_ARBG_TX 48 +#define CLK_PCLK_SMMU_ARBG_TX 49 +#define CLK_PCLK_ASYNCAXI_IMEMX 50 +#define CLK_PCLK_GPIO_IMEM 51 + +#define IMEM_NR_CLK 52 + /* CMU_G2D */ #define CLK_MUX_ACLK_G2D_266_USER 1 #define CLK_MUX_ACLK_G2D_400_USER 2 -- 2.19.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 5/5] clk: samsung: exynos5433: add imem clock @ 2018-11-29 15:51 ` Kamil Konieczny 0 siblings, 0 replies; 14+ messages in thread From: Kamil Konieczny @ 2018-11-29 15:51 UTC (permalink / raw) To: k.konieczny Cc: Mark Rutland, devicetree, linux-samsung-soc, linux-kernel, Krzysztof Kozlowski, Rob Herring, Kukjin Kim, linux-arm-kernel Add imem clock for exynos5433. This will enable to use crypto Security SubSystem (in short SSS) and SlimSSS IP blocks. Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> --- drivers/clk/samsung/clk-exynos5433.c | 189 +++++++++++++++++++++++++ include/dt-bindings/clock/exynos5433.h | 55 +++++++ 2 files changed, 244 insertions(+) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 24c3360db65b..ab03126f350b 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -2345,6 +2345,192 @@ static const struct samsung_cmu_info fsys_cmu_info __initconst = { .clk_name = "aclk_fsys_200", }; +/* + * Register offset definitions for CMU_IMEM + * + */ +#define ENABLE_ACLK_IMEM 0x0800 +#define ENABLE_ACLK_IMEM_INT_MEM 0x0804 +#define ENABLE_ACLK_IMEM_SSS 0x0808 +#define ENABLE_ACLK_IMEM_SLIMSSS 0x080c +#define ENABLE_ACLK_IMEM_RTIC 0x0810 +#define ENABLE_ACLK_IMEM_SMMU_SSS 0x0814 +#define ENABLE_ACLK_IMEM_SMMU_SLIMSSS 0x0818 +#define ENABLE_ACLK_IMEM_SMMU_RTIC 0x081c +#define ENABLE_ACLK_IMEM_ARBG_TX 0x0820 +#define ENABLE_ACLK_IMEM_SMMU_ARBG_TX 0x0824 +#define ENABLE_PCLK_IMEM 0x0900 +#define ENABLE_PCLK_IMEM_SSS 0x0904 +#define ENABLE_PCLK_IMEM_SLIMSSS 0x0908 +#define ENABLE_PCLK_IMEM_RTIC 0x090c +#define ENABLE_PCLK_IMEM_SMMU_SSS 0x0910 +#define ENABLE_PCLK_IMEM_SMMU_SLIMSSS 0x0914 +#define ENABLE_PCLK_IMEM_SMMU_RTIC 0x0918 +#define ENABLE_PCLK_IMEM_SMMU_ARGB_TX 0x091c + +static const unsigned long imem_clk_regs[] __initconst = { + ENABLE_ACLK_IMEM, + ENABLE_ACLK_IMEM_INT_MEM, + ENABLE_ACLK_IMEM_SSS, + ENABLE_ACLK_IMEM_SLIMSSS, + ENABLE_ACLK_IMEM_RTIC, + ENABLE_ACLK_IMEM_SMMU_SSS, + ENABLE_ACLK_IMEM_SMMU_SLIMSSS, + ENABLE_ACLK_IMEM_SMMU_RTIC, + ENABLE_ACLK_IMEM_ARBG_TX, + ENABLE_ACLK_IMEM_SMMU_ARBG_TX, + ENABLE_PCLK_IMEM, + ENABLE_PCLK_IMEM_SSS, + ENABLE_PCLK_IMEM_SLIMSSS, + ENABLE_PCLK_IMEM_RTIC, + ENABLE_PCLK_IMEM_SMMU_SSS, + ENABLE_PCLK_IMEM_SMMU_SLIMSSS, + ENABLE_PCLK_IMEM_SMMU_RTIC, + ENABLE_PCLK_IMEM_SMMU_ARGB_TX, +}; + +static const struct samsung_gate_clock imem_gate_clks[] __initconst = { + /* ENABLE_ACLK_IMEM */ + GATE(CLK_ACLK_AXI2AHB_IMEMH, "aclk_axi2ahb_imemh", "aclk_imem_200", + ENABLE_ACLK_IMEM, 24, 0, 0), + GATE(CLK_ACLK_AXIDS_SROMC, "aclk_axids_sromc", "aclk_imem_200", + ENABLE_ACLK_IMEM, 23, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_SROMC, "aclk_sromc", "aclk_imem_200", + ENABLE_ACLK_IMEM, 22, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_ARBG_TX, "aclk_bts_arbg_tx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 21, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXI_IMEMX, "aclk_asyncaxi_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 20, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIUS_IMEMX, "aclk_axius_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 19, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_IMEMX, "aclk_xiu_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 18, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXI_SSSX, "aclk_asyncaxi_sssx", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 17, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SLIMSSS, "aclk_bts_slimsss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 15, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SSS_DRAM, "aclk_bts_sss_dram", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 14, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SSS_CCI, "aclk_bts_sss_cci", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 13, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ALB_IMEM, "aclk_alb_imem", "aclk_imem_266", + ENABLE_ACLK_IMEM, 12, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_IMEM1P, "aclk_axids_pimemx_imem1p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 11, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_IMEM0P, "aclk_axids_pimemx_imem0p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 10, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_GIC, "aclk_axids_pimemx_gic", "aclk_imem_200", + ENABLE_ACLK_IMEM, 9, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAHBM_SSS_ATLAS, "aclk_asyncahbm_sss_atlas", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 7, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXIS_MIF_PIMEMX, "aclk_asyncaxis_mif_pimemx", "aclk_imem_200", + ENABLE_ACLK_IMEM, 6, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXI2APB_IMEM1P, "aclk_axi2apb_imem1p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 5, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXI2APB_IMEM0P, "aclk_axi2apb_imem0p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 4, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_SSSX, "aclk_xiu_sssx", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 3, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_PIMEMX, "aclk_xiu_pimemx", "aclk_imem_200", + ENABLE_ACLK_IMEM, 2, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_IMEMND_266, "aclk_imemnd_266", "aclk_imem_266", + ENABLE_ACLK_IMEM, 1, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_GIC, "aclk_gic", "aclk_imem_200", + ENABLE_ACLK_IMEM, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_ACLK_IMEM_INT_MEM */ + GATE(CLK_ACLK_INT_MEM, "aclk_int_mem", "aclk_imem_200", + ENABLE_ACLK_IMEM_INT_MEM, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_SSS */ + GATE(CLK_ACLK_SSS, "aclk_sss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_SLIMSSS */ + GATE(CLK_ACLK_SLIMSSS, "aclk_slimsss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_RTIC */ + GATE(CLK_ACLK_RTIC, "aclk_rtic", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_RTIC, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_SMMU_SSS */ + GATE(CLK_ACLK_SMMU_SSS_DRAM, "aclk_smmu_sss_dram", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_SSS, 1, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_SMMU_SSS_CCI, "aclk_smmu_sss_cci", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_SSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_SMMU_SLIMSSS */ + GATE(CLK_ACLK_SMMU_SLIMSSS, "aclk_smmu_slimsss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_SMMU_RTIC */ + GATE(CLK_ACLK_SMMU_RTIC, "aclk_smmu_rtic", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_RTIC, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_ARBG_TX */ + GATE(CLK_ACLK_ARBG_TX, "aclk_arbg_tx", "aclk_imem_266", + ENABLE_ACLK_IMEM_ARBG_TX, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_SMMU_ARBG_TX */ + GATE(CLK_ACLK_SMMU_ARBG_TX, "aclk_smmu_arbg_tx", "aclk_imem_266", + ENABLE_ACLK_IMEM_SMMU_ARBG_TX, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_PCLK_IMEM */ + GATE(CLK_PCLK_GPIO_IMEM, "pclk_gpio_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 17, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ASYNCAXI_IMEMX, "pclk_asyncaxi_imemx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 16, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_ARBG_TX, "pclk_bts_arbg_tx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 15, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ASYNCAPB_ARBG_TX, "pclk_asyncapb_arbg_tx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 14, CLK_IGNORE_UNUSED, 0), + + GATE(CLK_PCLK_BTS_SLIMSSS, "pclk_bts_slimsss", "aclk_imem_200", + ENABLE_PCLK_IMEM, 8, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_SSS_DRAM, "pclk_bts_sss_dram", "aclk_imem_200", + ENABLE_PCLK_IMEM, 7, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_SSS_CCI, "pclk_bts_sss_cci", "aclk_imem_200", + ENABLE_PCLK_IMEM, 6, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ALB_IMEM, "pclk_alb_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 5, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_PMU_IMEM, "pclk_pmu_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 4, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_SYSREG_IMEM, "pclk_sysreg_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 3, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SSS */ + GATE(CLK_PCLK_SSS, "pclk_sss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SLIMSSS */ + GATE(CLK_PCLK_SLIMSSS, "pclk_slimsss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_RTIC */ + GATE(CLK_PCLK_RTIC, "pclk_rtic", "aclk_imem_200", + ENABLE_PCLK_IMEM_RTIC, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SMMU_SSS */ + GATE(CLK_PCLK_SMMU_SSS_DRAM, "pclk_smmu_sss_dram", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_SSS, 1, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_SMMU_SSS_CCI, "pclk_smmu_sss_cci", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_SSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SMMU_SLIMSSS */ + GATE(CLK_PCLK_SMMU_SLIMSSS, "pclk_smmu_slimsss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SMMU_RTIC */ + GATE(CLK_PCLK_SMMU_RTIC, "pclk_sss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_RTIC, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SMMU_ARGB_TX */ + GATE(CLK_PCLK_SMMU_ARBG_TX, "pclk_smmu_arbg_tx", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_ARGB_TX, 0, CLK_IGNORE_UNUSED, 0), +}; + +static const struct samsung_cmu_info imem_cmu_info __initconst = { + .gate_clks = imem_gate_clks, + .nr_gate_clks = ARRAY_SIZE(imem_gate_clks), + .nr_clk_ids = IMEM_NR_CLK, + .clk_regs = imem_clk_regs, + .nr_clk_regs = ARRAY_SIZE(imem_clk_regs), +}; + +static void __init exynos5433_cmu_imem_init(struct device_node *np) +{ + samsung_cmu_register_one(np, &imem_cmu_info); +} + +CLK_OF_DECLARE(exynos5433_cmu_imem, "samsung,exynos5433-cmu-imem", + exynos5433_cmu_imem_init); + /* * Register offset definitions for CMU_G2D */ @@ -5648,6 +5834,9 @@ static const struct of_device_id exynos5433_cmu_of_match[] = { }, { .compatible = "samsung,exynos5433-cmu-hevc", .data = &hevc_cmu_info, + }, { + .compatible = "samsung,exynos5433-cmu-imem", + .data = &imem_cmu_info, }, { .compatible = "samsung,exynos5433-cmu-isp", .data = &isp_cmu_info, diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h index 87bb2b017143..312d8810b56d 100644 --- a/include/dt-bindings/clock/exynos5433.h +++ b/include/dt-bindings/clock/exynos5433.h @@ -623,6 +623,61 @@ #define FSYS_NR_CLK 116 +/* CMU_IMEM */ +#define CLK_ACLK_SSS 1 +#define CLK_ACLK_SLIMSSS 2 +#define CLK_ACLK_RTIC 3 +#define CLK_ACLK_XIU_SSSX 4 +#define CLK_ACLK_ASYNCAHBM_SSS_ATLAS 5 +#define CLK_ACLK_ASYNCAXI_SSSX 6 +#define CLK_ACLK_BTS_SSS_CCI 7 +#define CLK_ACLK_BTS_SSS_DRAM 8 +#define CLK_ACLK_BTS_SLIMSSS 9 +#define CLK_ACLK_SMMU_SSS_CCI 10 +#define CLK_ACLK_SMMU_SSS_DRAM 11 +#define CLK_ACLK_SMMU_SLIMSSS 12 +#define CLK_ACLK_SMMU_RTIC 13 +#define CLK_ACLK_IMEMND_266 14 +#define CLK_ACLK_ALB_IMEM 15 +#define CLK_ACLK_XIU_IMEMX 16 +#define CLK_ACLK_AXIUS_IMEMX 17 +#define CLK_ACLK_ASYNCAXI_IMEMX 18 +#define CLK_ACLK_ARBG_TX 19 +#define CLK_ACLK_BTS_ARBG_TX 20 +#define CLK_ACLK_SMMU_ARBG_TX 21 +#define CLK_ACLK_GIC 22 +#define CLK_ACLK_INT_MEM 23 +#define CLK_ACLK_XIU_PIMEMX 24 +#define CLK_ACLK_AXI2APB_IMEM0P 25 +#define CLK_ACLK_AXI2APB_IMEM1P 26 +#define CLK_ACLK_ASYNCAXIS_MIF_PIMEMX 27 +#define CLK_ACLK_AXIDS_PIMEMX_GIC 28 +#define CLK_ACLK_AXIDS_PIMEMX_IMEM0P 29 +#define CLK_ACLK_AXIDS_PIMEMX_IMEM1P 30 +#define CLK_ACLK_SROMC 31 +#define CLK_ACLK_AXIDS_SROMC 32 +#define CLK_ACLK_AXI2AHB_IMEMH 33 +#define CLK_PCLK_SSS 34 +#define CLK_PCLK_SLIMSSS 35 +#define CLK_PCLK_RTIC 36 +#define CLK_PCLK_SYSREG_IMEM 37 +#define CLK_PCLK_PMU_IMEM 38 +#define CLK_PCLK_ALB_IMEM 39 +#define CLK_PCLK_BTS_SSS_CCI 40 +#define CLK_PCLK_BTS_SSS_DRAM 41 +#define CLK_PCLK_BTS_SLIMSSS 42 +#define CLK_PCLK_SMMU_SSS_CCI 43 +#define CLK_PCLK_SMMU_SSS_DRAM 44 +#define CLK_PCLK_SMMU_SLIMSSS 45 +#define CLK_PCLK_SMMU_RTIC 46 +#define CLK_PCLK_ASYNCAPB_ARBG_TX 47 +#define CLK_PCLK_BTS_ARBG_TX 48 +#define CLK_PCLK_SMMU_ARBG_TX 49 +#define CLK_PCLK_ASYNCAXI_IMEMX 50 +#define CLK_PCLK_GPIO_IMEM 51 + +#define IMEM_NR_CLK 52 + /* CMU_G2D */ #define CLK_MUX_ACLK_G2D_266_USER 1 #define CLK_MUX_ACLK_G2D_400_USER 2 -- 2.19.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 5/5] clk: samsung: exynos5433: add imem clock 2018-11-29 15:51 ` Kamil Konieczny @ 2018-11-29 23:18 ` Chanwoo Choi -1 siblings, 0 replies; 14+ messages in thread From: Chanwoo Choi @ 2018-11-29 23:18 UTC (permalink / raw) To: Kamil Konieczny Cc: Rob Herring, Mark Rutland, Kukjin Kim, Krzysztof Kozlowski, devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel Hi Kamil, On 2018년 11월 30일 00:51, Kamil Konieczny wrote: > Add imem clock for exynos5433. This will enable to use crypto Security s/clock/clocks > SubSystem (in short SSS) and SlimSSS IP blocks. > > Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> > --- > drivers/clk/samsung/clk-exynos5433.c | 189 +++++++++++++++++++++++++ > include/dt-bindings/clock/exynos5433.h | 55 +++++++ > 2 files changed, 244 insertions(+) > > diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c > index 24c3360db65b..ab03126f350b 100644 > --- a/drivers/clk/samsung/clk-exynos5433.c > +++ b/drivers/clk/samsung/clk-exynos5433.c > @@ -2345,6 +2345,192 @@ static const struct samsung_cmu_info fsys_cmu_info __initconst = { > .clk_name = "aclk_fsys_200", > }; > > +/* > + * Register offset definitions for CMU_IMEM > + * Remove unneeded blank line. > + */ > +#define ENABLE_ACLK_IMEM 0x0800 > +#define ENABLE_ACLK_IMEM_INT_MEM 0x0804 > +#define ENABLE_ACLK_IMEM_SSS 0x0808 > +#define ENABLE_ACLK_IMEM_SLIMSSS 0x080c > +#define ENABLE_ACLK_IMEM_RTIC 0x0810 > +#define ENABLE_ACLK_IMEM_SMMU_SSS 0x0814 > +#define ENABLE_ACLK_IMEM_SMMU_SLIMSSS 0x0818 > +#define ENABLE_ACLK_IMEM_SMMU_RTIC 0x081c > +#define ENABLE_ACLK_IMEM_ARBG_TX 0x0820 > +#define ENABLE_ACLK_IMEM_SMMU_ARBG_TX 0x0824 > +#define ENABLE_PCLK_IMEM 0x0900 > +#define ENABLE_PCLK_IMEM_SSS 0x0904 > +#define ENABLE_PCLK_IMEM_SLIMSSS 0x0908 > +#define ENABLE_PCLK_IMEM_RTIC 0x090c > +#define ENABLE_PCLK_IMEM_SMMU_SSS 0x0910 > +#define ENABLE_PCLK_IMEM_SMMU_SLIMSSS 0x0914 > +#define ENABLE_PCLK_IMEM_SMMU_RTIC 0x0918 > +#define ENABLE_PCLK_IMEM_SMMU_ARGB_TX 0x091c > + > +static const unsigned long imem_clk_regs[] __initconst = { > + ENABLE_ACLK_IMEM, > + ENABLE_ACLK_IMEM_INT_MEM, > + ENABLE_ACLK_IMEM_SSS, > + ENABLE_ACLK_IMEM_SLIMSSS, > + ENABLE_ACLK_IMEM_RTIC, > + ENABLE_ACLK_IMEM_SMMU_SSS, > + ENABLE_ACLK_IMEM_SMMU_SLIMSSS, > + ENABLE_ACLK_IMEM_SMMU_RTIC, > + ENABLE_ACLK_IMEM_ARBG_TX, > + ENABLE_ACLK_IMEM_SMMU_ARBG_TX, > + ENABLE_PCLK_IMEM, > + ENABLE_PCLK_IMEM_SSS, > + ENABLE_PCLK_IMEM_SLIMSSS, > + ENABLE_PCLK_IMEM_RTIC, > + ENABLE_PCLK_IMEM_SMMU_SSS, > + ENABLE_PCLK_IMEM_SMMU_SLIMSSS, > + ENABLE_PCLK_IMEM_SMMU_RTIC, > + ENABLE_PCLK_IMEM_SMMU_ARGB_TX, > +}; > + > +static const struct samsung_gate_clock imem_gate_clks[] __initconst = { > + /* ENABLE_ACLK_IMEM */ > + GATE(CLK_ACLK_AXI2AHB_IMEMH, "aclk_axi2ahb_imemh", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 24, 0, 0), > + GATE(CLK_ACLK_AXIDS_SROMC, "aclk_axids_sromc", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 23, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_SROMC, "aclk_sromc", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 22, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_BTS_ARBG_TX, "aclk_bts_arbg_tx", "aclk_imem_266", > + ENABLE_ACLK_IMEM, 21, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_ASYNCAXI_IMEMX, "aclk_asyncaxi_imemx", "aclk_imem_266", > + ENABLE_ACLK_IMEM, 20, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_AXIUS_IMEMX, "aclk_axius_imemx", "aclk_imem_266", > + ENABLE_ACLK_IMEM, 19, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_XIU_IMEMX, "aclk_xiu_imemx", "aclk_imem_266", > + ENABLE_ACLK_IMEM, 18, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_ASYNCAXI_SSSX, "aclk_asyncaxi_sssx", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM, 17, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_BTS_SLIMSSS, "aclk_bts_slimsss", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM, 15, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_BTS_SSS_DRAM, "aclk_bts_sss_dram", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM, 14, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_BTS_SSS_CCI, "aclk_bts_sss_cci", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM, 13, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_ALB_IMEM, "aclk_alb_imem", "aclk_imem_266", > + ENABLE_ACLK_IMEM, 12, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_AXIDS_PIMEMX_IMEM1P, "aclk_axids_pimemx_imem1p", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 11, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_AXIDS_PIMEMX_IMEM0P, "aclk_axids_pimemx_imem0p", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 10, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_AXIDS_PIMEMX_GIC, "aclk_axids_pimemx_gic", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 9, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_ASYNCAHBM_SSS_ATLAS, "aclk_asyncahbm_sss_atlas", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM, 7, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_ASYNCAXIS_MIF_PIMEMX, "aclk_asyncaxis_mif_pimemx", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 6, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_AXI2APB_IMEM1P, "aclk_axi2apb_imem1p", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 5, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_AXI2APB_IMEM0P, "aclk_axi2apb_imem0p", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 4, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_XIU_SSSX, "aclk_xiu_sssx", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM, 3, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_XIU_PIMEMX, "aclk_xiu_pimemx", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 2, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_IMEMND_266, "aclk_imemnd_266", "aclk_imem_266", > + ENABLE_ACLK_IMEM, 1, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_GIC, "aclk_gic", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 0, CLK_IGNORE_UNUSED, 0), > + > + /* ENABLE_ACLK_IMEM_INT_MEM */ > + GATE(CLK_ACLK_INT_MEM, "aclk_int_mem", "aclk_imem_200", > + ENABLE_ACLK_IMEM_INT_MEM, 0, CLK_IGNORE_UNUSED, 0), Nitpick. Need to add blank line between different registers in order to keep the same format on this driver. > + /* ENABLE_ACLK_IMEM_SSS */ > + GATE(CLK_ACLK_SSS, "aclk_sss", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM_SSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_ACLK_IMEM_SLIMSSS */ > + GATE(CLK_ACLK_SLIMSSS, "aclk_slimsss", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_ACLK_IMEM_RTIC */ > + GATE(CLK_ACLK_RTIC, "aclk_rtic", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM_RTIC, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_ACLK_SMMU_SSS */ > + GATE(CLK_ACLK_SMMU_SSS_DRAM, "aclk_smmu_sss_dram", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM_SMMU_SSS, 1, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_SMMU_SSS_CCI, "aclk_smmu_sss_cci", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM_SMMU_SSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_ACLK_SMMU_SLIMSSS */ > + GATE(CLK_ACLK_SMMU_SLIMSSS, "aclk_smmu_slimsss", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM_SMMU_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_ACLK_SMMU_RTIC */ > + GATE(CLK_ACLK_SMMU_RTIC, "aclk_smmu_rtic", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM_SMMU_RTIC, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_ACLK_IMEM_ARBG_TX */ > + GATE(CLK_ACLK_ARBG_TX, "aclk_arbg_tx", "aclk_imem_266", > + ENABLE_ACLK_IMEM_ARBG_TX, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_ACLK_IMEM_SMMU_ARBG_TX */ > + GATE(CLK_ACLK_SMMU_ARBG_TX, "aclk_smmu_arbg_tx", "aclk_imem_266", > + ENABLE_ACLK_IMEM_SMMU_ARBG_TX, 0, CLK_IGNORE_UNUSED, 0), > + > + /* ENABLE_PCLK_IMEM */ > + GATE(CLK_PCLK_GPIO_IMEM, "pclk_gpio_imem", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 17, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_ASYNCAXI_IMEMX, "pclk_asyncaxi_imemx", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 16, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_BTS_ARBG_TX, "pclk_bts_arbg_tx", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 15, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_ASYNCAPB_ARBG_TX, "pclk_asyncapb_arbg_tx", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 14, CLK_IGNORE_UNUSED, 0), > + Remove blank line. > + GATE(CLK_PCLK_BTS_SLIMSSS, "pclk_bts_slimsss", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 8, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_BTS_SSS_DRAM, "pclk_bts_sss_dram", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 7, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_BTS_SSS_CCI, "pclk_bts_sss_cci", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 6, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_ALB_IMEM, "pclk_alb_imem", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 5, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_PMU_IMEM, "pclk_pmu_imem", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 4, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_SYSREG_IMEM, "pclk_sysreg_imem", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 3, CLK_IGNORE_UNUSED, 0), Need to add blank line. > + /* ENABLE_PCLK_IMEM_SSS */ > + GATE(CLK_PCLK_SSS, "pclk_sss", "aclk_imem_200", > + ENABLE_PCLK_IMEM_SSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_PCLK_IMEM_SLIMSSS */ > + GATE(CLK_PCLK_SLIMSSS, "pclk_slimsss", "aclk_imem_200", > + ENABLE_PCLK_IMEM_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_PCLK_IMEM_RTIC */ > + GATE(CLK_PCLK_RTIC, "pclk_rtic", "aclk_imem_200", > + ENABLE_PCLK_IMEM_RTIC, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_PCLK_IMEM_SMMU_SSS */ > + GATE(CLK_PCLK_SMMU_SSS_DRAM, "pclk_smmu_sss_dram", "aclk_imem_200", > + ENABLE_PCLK_IMEM_SMMU_SSS, 1, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_SMMU_SSS_CCI, "pclk_smmu_sss_cci", "aclk_imem_200", > + ENABLE_PCLK_IMEM_SMMU_SSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_PCLK_IMEM_SMMU_SLIMSSS */ > + GATE(CLK_PCLK_SMMU_SLIMSSS, "pclk_smmu_slimsss", "aclk_imem_200", > + ENABLE_PCLK_IMEM_SMMU_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_PCLK_IMEM_SMMU_RTIC */ > + GATE(CLK_PCLK_SMMU_RTIC, "pclk_sss", "aclk_imem_200", > + ENABLE_PCLK_IMEM_SMMU_RTIC, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_PCLK_IMEM_SMMU_ARGB_TX */ > + GATE(CLK_PCLK_SMMU_ARBG_TX, "pclk_smmu_arbg_tx", "aclk_imem_200", > + ENABLE_PCLK_IMEM_SMMU_ARGB_TX, 0, CLK_IGNORE_UNUSED, 0), > +}; > + > +static const struct samsung_cmu_info imem_cmu_info __initconst = { > + .gate_clks = imem_gate_clks, > + .nr_gate_clks = ARRAY_SIZE(imem_gate_clks), > + .nr_clk_ids = IMEM_NR_CLK, > + .clk_regs = imem_clk_regs, > + .nr_clk_regs = ARRAY_SIZE(imem_clk_regs), > +}; > + > +static void __init exynos5433_cmu_imem_init(struct device_node *np) > +{ > + samsung_cmu_register_one(np, &imem_cmu_info); > +} > + > +CLK_OF_DECLARE(exynos5433_cmu_imem, "samsung,exynos5433-cmu-imem", > + exynos5433_cmu_imem_init); > + CLK_OF_DECLARE() declaration and adding new entry to exynos5433_cmu_of_match[] for imem clocks are redundant. CLK_OF_DECLARE() is not needed because you added the 'samsung,exynos5433-cmu-imem' entries to exynos5433_cmu_of_match table. > /* > * Register offset definitions for CMU_G2D > */ > @@ -5648,6 +5834,9 @@ static const struct of_device_id exynos5433_cmu_of_match[] = { > }, { > .compatible = "samsung,exynos5433-cmu-hevc", > .data = &hevc_cmu_info, > + }, { > + .compatible = "samsung,exynos5433-cmu-imem", > + .data = &imem_cmu_info, You added the codes before cmu_g2d on following codes - arch/arm64/boot/dts/exynos/exynos5433.dtsi - include/dt-bindings/clock/exynos5433.h - drivers/clk/samsung/clk-exynos5433.c But, in the exynos5433_cmu_of_match, you added the new entry between 'cmu-hevc' and 'cmu-isp'. There is no consistent reason. If there is no any special reason to add it on the middle, you better to add it at the end. > }, { > .compatible = "samsung,exynos5433-cmu-isp", > .data = &isp_cmu_info, > diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h > index 87bb2b017143..312d8810b56d 100644 > --- a/include/dt-bindings/clock/exynos5433.h > +++ b/include/dt-bindings/clock/exynos5433.h > @@ -623,6 +623,61 @@ > > #define FSYS_NR_CLK 116 > > +/* CMU_IMEM */ > +#define CLK_ACLK_SSS 1 > +#define CLK_ACLK_SLIMSSS 2 > +#define CLK_ACLK_RTIC 3 > +#define CLK_ACLK_XIU_SSSX 4 > +#define CLK_ACLK_ASYNCAHBM_SSS_ATLAS 5 > +#define CLK_ACLK_ASYNCAXI_SSSX 6 > +#define CLK_ACLK_BTS_SSS_CCI 7 > +#define CLK_ACLK_BTS_SSS_DRAM 8 > +#define CLK_ACLK_BTS_SLIMSSS 9 > +#define CLK_ACLK_SMMU_SSS_CCI 10 > +#define CLK_ACLK_SMMU_SSS_DRAM 11 > +#define CLK_ACLK_SMMU_SLIMSSS 12 > +#define CLK_ACLK_SMMU_RTIC 13 > +#define CLK_ACLK_IMEMND_266 14 > +#define CLK_ACLK_ALB_IMEM 15 > +#define CLK_ACLK_XIU_IMEMX 16 > +#define CLK_ACLK_AXIUS_IMEMX 17 > +#define CLK_ACLK_ASYNCAXI_IMEMX 18 > +#define CLK_ACLK_ARBG_TX 19 > +#define CLK_ACLK_BTS_ARBG_TX 20 > +#define CLK_ACLK_SMMU_ARBG_TX 21 > +#define CLK_ACLK_GIC 22 > +#define CLK_ACLK_INT_MEM 23 > +#define CLK_ACLK_XIU_PIMEMX 24 > +#define CLK_ACLK_AXI2APB_IMEM0P 25 > +#define CLK_ACLK_AXI2APB_IMEM1P 26 > +#define CLK_ACLK_ASYNCAXIS_MIF_PIMEMX 27 > +#define CLK_ACLK_AXIDS_PIMEMX_GIC 28 > +#define CLK_ACLK_AXIDS_PIMEMX_IMEM0P 29 > +#define CLK_ACLK_AXIDS_PIMEMX_IMEM1P 30 > +#define CLK_ACLK_SROMC 31 > +#define CLK_ACLK_AXIDS_SROMC 32 > +#define CLK_ACLK_AXI2AHB_IMEMH 33 > +#define CLK_PCLK_SSS 34 > +#define CLK_PCLK_SLIMSSS 35 > +#define CLK_PCLK_RTIC 36 > +#define CLK_PCLK_SYSREG_IMEM 37 > +#define CLK_PCLK_PMU_IMEM 38 > +#define CLK_PCLK_ALB_IMEM 39 > +#define CLK_PCLK_BTS_SSS_CCI 40 > +#define CLK_PCLK_BTS_SSS_DRAM 41 > +#define CLK_PCLK_BTS_SLIMSSS 42 > +#define CLK_PCLK_SMMU_SSS_CCI 43 > +#define CLK_PCLK_SMMU_SSS_DRAM 44 > +#define CLK_PCLK_SMMU_SLIMSSS 45 > +#define CLK_PCLK_SMMU_RTIC 46 > +#define CLK_PCLK_ASYNCAPB_ARBG_TX 47 > +#define CLK_PCLK_BTS_ARBG_TX 48 > +#define CLK_PCLK_SMMU_ARBG_TX 49 > +#define CLK_PCLK_ASYNCAXI_IMEMX 50 > +#define CLK_PCLK_GPIO_IMEM 51 > + > +#define IMEM_NR_CLK 52 > + > /* CMU_G2D */ > #define CLK_MUX_ACLK_G2D_266_USER 1 > #define CLK_MUX_ACLK_G2D_400_USER 2 > -- Best Regards, Chanwoo Choi Samsung Electronics ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 5/5] clk: samsung: exynos5433: add imem clock @ 2018-11-29 23:18 ` Chanwoo Choi 0 siblings, 0 replies; 14+ messages in thread From: Chanwoo Choi @ 2018-11-29 23:18 UTC (permalink / raw) To: Kamil Konieczny Cc: Mark Rutland, devicetree, linux-samsung-soc, linux-kernel, Krzysztof Kozlowski, Rob Herring, Kukjin Kim, linux-arm-kernel Hi Kamil, On 2018년 11월 30일 00:51, Kamil Konieczny wrote: > Add imem clock for exynos5433. This will enable to use crypto Security s/clock/clocks > SubSystem (in short SSS) and SlimSSS IP blocks. > > Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> > --- > drivers/clk/samsung/clk-exynos5433.c | 189 +++++++++++++++++++++++++ > include/dt-bindings/clock/exynos5433.h | 55 +++++++ > 2 files changed, 244 insertions(+) > > diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c > index 24c3360db65b..ab03126f350b 100644 > --- a/drivers/clk/samsung/clk-exynos5433.c > +++ b/drivers/clk/samsung/clk-exynos5433.c > @@ -2345,6 +2345,192 @@ static const struct samsung_cmu_info fsys_cmu_info __initconst = { > .clk_name = "aclk_fsys_200", > }; > > +/* > + * Register offset definitions for CMU_IMEM > + * Remove unneeded blank line. > + */ > +#define ENABLE_ACLK_IMEM 0x0800 > +#define ENABLE_ACLK_IMEM_INT_MEM 0x0804 > +#define ENABLE_ACLK_IMEM_SSS 0x0808 > +#define ENABLE_ACLK_IMEM_SLIMSSS 0x080c > +#define ENABLE_ACLK_IMEM_RTIC 0x0810 > +#define ENABLE_ACLK_IMEM_SMMU_SSS 0x0814 > +#define ENABLE_ACLK_IMEM_SMMU_SLIMSSS 0x0818 > +#define ENABLE_ACLK_IMEM_SMMU_RTIC 0x081c > +#define ENABLE_ACLK_IMEM_ARBG_TX 0x0820 > +#define ENABLE_ACLK_IMEM_SMMU_ARBG_TX 0x0824 > +#define ENABLE_PCLK_IMEM 0x0900 > +#define ENABLE_PCLK_IMEM_SSS 0x0904 > +#define ENABLE_PCLK_IMEM_SLIMSSS 0x0908 > +#define ENABLE_PCLK_IMEM_RTIC 0x090c > +#define ENABLE_PCLK_IMEM_SMMU_SSS 0x0910 > +#define ENABLE_PCLK_IMEM_SMMU_SLIMSSS 0x0914 > +#define ENABLE_PCLK_IMEM_SMMU_RTIC 0x0918 > +#define ENABLE_PCLK_IMEM_SMMU_ARGB_TX 0x091c > + > +static const unsigned long imem_clk_regs[] __initconst = { > + ENABLE_ACLK_IMEM, > + ENABLE_ACLK_IMEM_INT_MEM, > + ENABLE_ACLK_IMEM_SSS, > + ENABLE_ACLK_IMEM_SLIMSSS, > + ENABLE_ACLK_IMEM_RTIC, > + ENABLE_ACLK_IMEM_SMMU_SSS, > + ENABLE_ACLK_IMEM_SMMU_SLIMSSS, > + ENABLE_ACLK_IMEM_SMMU_RTIC, > + ENABLE_ACLK_IMEM_ARBG_TX, > + ENABLE_ACLK_IMEM_SMMU_ARBG_TX, > + ENABLE_PCLK_IMEM, > + ENABLE_PCLK_IMEM_SSS, > + ENABLE_PCLK_IMEM_SLIMSSS, > + ENABLE_PCLK_IMEM_RTIC, > + ENABLE_PCLK_IMEM_SMMU_SSS, > + ENABLE_PCLK_IMEM_SMMU_SLIMSSS, > + ENABLE_PCLK_IMEM_SMMU_RTIC, > + ENABLE_PCLK_IMEM_SMMU_ARGB_TX, > +}; > + > +static const struct samsung_gate_clock imem_gate_clks[] __initconst = { > + /* ENABLE_ACLK_IMEM */ > + GATE(CLK_ACLK_AXI2AHB_IMEMH, "aclk_axi2ahb_imemh", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 24, 0, 0), > + GATE(CLK_ACLK_AXIDS_SROMC, "aclk_axids_sromc", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 23, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_SROMC, "aclk_sromc", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 22, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_BTS_ARBG_TX, "aclk_bts_arbg_tx", "aclk_imem_266", > + ENABLE_ACLK_IMEM, 21, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_ASYNCAXI_IMEMX, "aclk_asyncaxi_imemx", "aclk_imem_266", > + ENABLE_ACLK_IMEM, 20, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_AXIUS_IMEMX, "aclk_axius_imemx", "aclk_imem_266", > + ENABLE_ACLK_IMEM, 19, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_XIU_IMEMX, "aclk_xiu_imemx", "aclk_imem_266", > + ENABLE_ACLK_IMEM, 18, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_ASYNCAXI_SSSX, "aclk_asyncaxi_sssx", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM, 17, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_BTS_SLIMSSS, "aclk_bts_slimsss", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM, 15, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_BTS_SSS_DRAM, "aclk_bts_sss_dram", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM, 14, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_BTS_SSS_CCI, "aclk_bts_sss_cci", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM, 13, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_ALB_IMEM, "aclk_alb_imem", "aclk_imem_266", > + ENABLE_ACLK_IMEM, 12, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_AXIDS_PIMEMX_IMEM1P, "aclk_axids_pimemx_imem1p", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 11, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_AXIDS_PIMEMX_IMEM0P, "aclk_axids_pimemx_imem0p", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 10, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_AXIDS_PIMEMX_GIC, "aclk_axids_pimemx_gic", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 9, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_ASYNCAHBM_SSS_ATLAS, "aclk_asyncahbm_sss_atlas", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM, 7, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_ASYNCAXIS_MIF_PIMEMX, "aclk_asyncaxis_mif_pimemx", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 6, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_AXI2APB_IMEM1P, "aclk_axi2apb_imem1p", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 5, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_AXI2APB_IMEM0P, "aclk_axi2apb_imem0p", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 4, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_XIU_SSSX, "aclk_xiu_sssx", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM, 3, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_XIU_PIMEMX, "aclk_xiu_pimemx", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 2, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_IMEMND_266, "aclk_imemnd_266", "aclk_imem_266", > + ENABLE_ACLK_IMEM, 1, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_GIC, "aclk_gic", "aclk_imem_200", > + ENABLE_ACLK_IMEM, 0, CLK_IGNORE_UNUSED, 0), > + > + /* ENABLE_ACLK_IMEM_INT_MEM */ > + GATE(CLK_ACLK_INT_MEM, "aclk_int_mem", "aclk_imem_200", > + ENABLE_ACLK_IMEM_INT_MEM, 0, CLK_IGNORE_UNUSED, 0), Nitpick. Need to add blank line between different registers in order to keep the same format on this driver. > + /* ENABLE_ACLK_IMEM_SSS */ > + GATE(CLK_ACLK_SSS, "aclk_sss", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM_SSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_ACLK_IMEM_SLIMSSS */ > + GATE(CLK_ACLK_SLIMSSS, "aclk_slimsss", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_ACLK_IMEM_RTIC */ > + GATE(CLK_ACLK_RTIC, "aclk_rtic", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM_RTIC, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_ACLK_SMMU_SSS */ > + GATE(CLK_ACLK_SMMU_SSS_DRAM, "aclk_smmu_sss_dram", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM_SMMU_SSS, 1, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_ACLK_SMMU_SSS_CCI, "aclk_smmu_sss_cci", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM_SMMU_SSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_ACLK_SMMU_SLIMSSS */ > + GATE(CLK_ACLK_SMMU_SLIMSSS, "aclk_smmu_slimsss", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM_SMMU_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_ACLK_SMMU_RTIC */ > + GATE(CLK_ACLK_SMMU_RTIC, "aclk_smmu_rtic", "aclk_imem_sssx_266", > + ENABLE_ACLK_IMEM_SMMU_RTIC, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_ACLK_IMEM_ARBG_TX */ > + GATE(CLK_ACLK_ARBG_TX, "aclk_arbg_tx", "aclk_imem_266", > + ENABLE_ACLK_IMEM_ARBG_TX, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_ACLK_IMEM_SMMU_ARBG_TX */ > + GATE(CLK_ACLK_SMMU_ARBG_TX, "aclk_smmu_arbg_tx", "aclk_imem_266", > + ENABLE_ACLK_IMEM_SMMU_ARBG_TX, 0, CLK_IGNORE_UNUSED, 0), > + > + /* ENABLE_PCLK_IMEM */ > + GATE(CLK_PCLK_GPIO_IMEM, "pclk_gpio_imem", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 17, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_ASYNCAXI_IMEMX, "pclk_asyncaxi_imemx", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 16, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_BTS_ARBG_TX, "pclk_bts_arbg_tx", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 15, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_ASYNCAPB_ARBG_TX, "pclk_asyncapb_arbg_tx", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 14, CLK_IGNORE_UNUSED, 0), > + Remove blank line. > + GATE(CLK_PCLK_BTS_SLIMSSS, "pclk_bts_slimsss", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 8, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_BTS_SSS_DRAM, "pclk_bts_sss_dram", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 7, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_BTS_SSS_CCI, "pclk_bts_sss_cci", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 6, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_ALB_IMEM, "pclk_alb_imem", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 5, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_PMU_IMEM, "pclk_pmu_imem", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 4, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_SYSREG_IMEM, "pclk_sysreg_imem", "aclk_imem_200", > + ENABLE_PCLK_IMEM, 3, CLK_IGNORE_UNUSED, 0), Need to add blank line. > + /* ENABLE_PCLK_IMEM_SSS */ > + GATE(CLK_PCLK_SSS, "pclk_sss", "aclk_imem_200", > + ENABLE_PCLK_IMEM_SSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_PCLK_IMEM_SLIMSSS */ > + GATE(CLK_PCLK_SLIMSSS, "pclk_slimsss", "aclk_imem_200", > + ENABLE_PCLK_IMEM_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_PCLK_IMEM_RTIC */ > + GATE(CLK_PCLK_RTIC, "pclk_rtic", "aclk_imem_200", > + ENABLE_PCLK_IMEM_RTIC, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_PCLK_IMEM_SMMU_SSS */ > + GATE(CLK_PCLK_SMMU_SSS_DRAM, "pclk_smmu_sss_dram", "aclk_imem_200", > + ENABLE_PCLK_IMEM_SMMU_SSS, 1, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_PCLK_SMMU_SSS_CCI, "pclk_smmu_sss_cci", "aclk_imem_200", > + ENABLE_PCLK_IMEM_SMMU_SSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_PCLK_IMEM_SMMU_SLIMSSS */ > + GATE(CLK_PCLK_SMMU_SLIMSSS, "pclk_smmu_slimsss", "aclk_imem_200", > + ENABLE_PCLK_IMEM_SMMU_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_PCLK_IMEM_SMMU_RTIC */ > + GATE(CLK_PCLK_SMMU_RTIC, "pclk_sss", "aclk_imem_200", > + ENABLE_PCLK_IMEM_SMMU_RTIC, 0, CLK_IGNORE_UNUSED, 0), ditto. > + /* ENABLE_PCLK_IMEM_SMMU_ARGB_TX */ > + GATE(CLK_PCLK_SMMU_ARBG_TX, "pclk_smmu_arbg_tx", "aclk_imem_200", > + ENABLE_PCLK_IMEM_SMMU_ARGB_TX, 0, CLK_IGNORE_UNUSED, 0), > +}; > + > +static const struct samsung_cmu_info imem_cmu_info __initconst = { > + .gate_clks = imem_gate_clks, > + .nr_gate_clks = ARRAY_SIZE(imem_gate_clks), > + .nr_clk_ids = IMEM_NR_CLK, > + .clk_regs = imem_clk_regs, > + .nr_clk_regs = ARRAY_SIZE(imem_clk_regs), > +}; > + > +static void __init exynos5433_cmu_imem_init(struct device_node *np) > +{ > + samsung_cmu_register_one(np, &imem_cmu_info); > +} > + > +CLK_OF_DECLARE(exynos5433_cmu_imem, "samsung,exynos5433-cmu-imem", > + exynos5433_cmu_imem_init); > + CLK_OF_DECLARE() declaration and adding new entry to exynos5433_cmu_of_match[] for imem clocks are redundant. CLK_OF_DECLARE() is not needed because you added the 'samsung,exynos5433-cmu-imem' entries to exynos5433_cmu_of_match table. > /* > * Register offset definitions for CMU_G2D > */ > @@ -5648,6 +5834,9 @@ static const struct of_device_id exynos5433_cmu_of_match[] = { > }, { > .compatible = "samsung,exynos5433-cmu-hevc", > .data = &hevc_cmu_info, > + }, { > + .compatible = "samsung,exynos5433-cmu-imem", > + .data = &imem_cmu_info, You added the codes before cmu_g2d on following codes - arch/arm64/boot/dts/exynos/exynos5433.dtsi - include/dt-bindings/clock/exynos5433.h - drivers/clk/samsung/clk-exynos5433.c But, in the exynos5433_cmu_of_match, you added the new entry between 'cmu-hevc' and 'cmu-isp'. There is no consistent reason. If there is no any special reason to add it on the middle, you better to add it at the end. > }, { > .compatible = "samsung,exynos5433-cmu-isp", > .data = &isp_cmu_info, > diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h > index 87bb2b017143..312d8810b56d 100644 > --- a/include/dt-bindings/clock/exynos5433.h > +++ b/include/dt-bindings/clock/exynos5433.h > @@ -623,6 +623,61 @@ > > #define FSYS_NR_CLK 116 > > +/* CMU_IMEM */ > +#define CLK_ACLK_SSS 1 > +#define CLK_ACLK_SLIMSSS 2 > +#define CLK_ACLK_RTIC 3 > +#define CLK_ACLK_XIU_SSSX 4 > +#define CLK_ACLK_ASYNCAHBM_SSS_ATLAS 5 > +#define CLK_ACLK_ASYNCAXI_SSSX 6 > +#define CLK_ACLK_BTS_SSS_CCI 7 > +#define CLK_ACLK_BTS_SSS_DRAM 8 > +#define CLK_ACLK_BTS_SLIMSSS 9 > +#define CLK_ACLK_SMMU_SSS_CCI 10 > +#define CLK_ACLK_SMMU_SSS_DRAM 11 > +#define CLK_ACLK_SMMU_SLIMSSS 12 > +#define CLK_ACLK_SMMU_RTIC 13 > +#define CLK_ACLK_IMEMND_266 14 > +#define CLK_ACLK_ALB_IMEM 15 > +#define CLK_ACLK_XIU_IMEMX 16 > +#define CLK_ACLK_AXIUS_IMEMX 17 > +#define CLK_ACLK_ASYNCAXI_IMEMX 18 > +#define CLK_ACLK_ARBG_TX 19 > +#define CLK_ACLK_BTS_ARBG_TX 20 > +#define CLK_ACLK_SMMU_ARBG_TX 21 > +#define CLK_ACLK_GIC 22 > +#define CLK_ACLK_INT_MEM 23 > +#define CLK_ACLK_XIU_PIMEMX 24 > +#define CLK_ACLK_AXI2APB_IMEM0P 25 > +#define CLK_ACLK_AXI2APB_IMEM1P 26 > +#define CLK_ACLK_ASYNCAXIS_MIF_PIMEMX 27 > +#define CLK_ACLK_AXIDS_PIMEMX_GIC 28 > +#define CLK_ACLK_AXIDS_PIMEMX_IMEM0P 29 > +#define CLK_ACLK_AXIDS_PIMEMX_IMEM1P 30 > +#define CLK_ACLK_SROMC 31 > +#define CLK_ACLK_AXIDS_SROMC 32 > +#define CLK_ACLK_AXI2AHB_IMEMH 33 > +#define CLK_PCLK_SSS 34 > +#define CLK_PCLK_SLIMSSS 35 > +#define CLK_PCLK_RTIC 36 > +#define CLK_PCLK_SYSREG_IMEM 37 > +#define CLK_PCLK_PMU_IMEM 38 > +#define CLK_PCLK_ALB_IMEM 39 > +#define CLK_PCLK_BTS_SSS_CCI 40 > +#define CLK_PCLK_BTS_SSS_DRAM 41 > +#define CLK_PCLK_BTS_SLIMSSS 42 > +#define CLK_PCLK_SMMU_SSS_CCI 43 > +#define CLK_PCLK_SMMU_SSS_DRAM 44 > +#define CLK_PCLK_SMMU_SLIMSSS 45 > +#define CLK_PCLK_SMMU_RTIC 46 > +#define CLK_PCLK_ASYNCAPB_ARBG_TX 47 > +#define CLK_PCLK_BTS_ARBG_TX 48 > +#define CLK_PCLK_SMMU_ARBG_TX 49 > +#define CLK_PCLK_ASYNCAXI_IMEMX 50 > +#define CLK_PCLK_GPIO_IMEM 51 > + > +#define IMEM_NR_CLK 52 > + > /* CMU_G2D */ > #define CLK_MUX_ACLK_G2D_266_USER 1 > #define CLK_MUX_ACLK_G2D_400_USER 2 > -- Best Regards, Chanwoo Choi Samsung Electronics _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 14+ messages in thread
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[not found] <CGME20181129155144eucas1p25ff3b4c969bd61830befd975ed5085ce@eucas1p2.samsung.com>
2018-11-29 15:51 ` [PATCH v2 0/5] Add imem clock for Exynos 5433 Kamil Konieczny
2018-11-29 15:51 ` [PATCH v2 1/5] clk: samsung: exynos5433: fix typo in imem divider Kamil Konieczny
2018-11-29 22:53 ` Chanwoo Choi
2018-11-29 15:51 ` [PATCH v2 2/5] clk: samsung: exynos5433: fix name typo in sssx Kamil Konieczny
2018-11-29 22:54 ` Chanwoo Choi
2018-11-29 15:51 ` [PATCH v2 3/5] arm64: dts: bindings: document imem clock Kamil Konieczny
2018-11-29 23:42 ` Stephen Boyd
2018-12-03 10:44 ` Sylwester Nawrocki
2018-12-05 19:46 ` Stephen Boyd
2018-11-29 15:51 ` [PATCH v2 4/5] arm64: dts: exynos: add " Kamil Konieczny
2018-11-29 15:51 ` [PATCH v2 5/5] clk: samsung: exynos5433: " Kamil Konieczny
2018-11-29 15:51 ` Kamil Konieczny
2018-11-29 23:18 ` Chanwoo Choi
2018-11-29 23:18 ` Chanwoo Choi
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