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From: Andrii Anisov <andrii.anisov@gmail.com>
To: Julien Grall <julien.grall@arm.com>,
	"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>
Cc: "andre.przywara@arm.com" <andre.przywara@arm.com>,
	"sstabellini@kernel.org" <sstabellini@kernel.org>,
	Andrii Anisov <Andrii_Anisov@epam.com>,
	Oleksandr Tyshchenko <Oleksandr_Tyshchenko@epam.com>
Subject: Re: [PATCH 1/4] xen/arm: gic: Ensure we have an ISB between ack and do_IRQ()
Date: Mon, 19 Nov 2018 17:54:50 +0200	[thread overview]
Message-ID: <5ad76791-075d-e588-2669-e01c79674f0d@gmail.com> (raw)
In-Reply-To: <VI1PR0302MB26882FD1B2445807F8C2B026E6C60@VI1PR0302MB2688.eurprd03.prod.outlook.com>

Julien,


It's me again about your patch:)

I've found this patch useful and even can give a motivation to have it 
in the mainline. The patch ensures that vgic_sync_from_lrs is performed 
on guest to hyp switch prior to any IRQ processing.

So, do you plan to push it for review? Could I do that on behalf of you?


On 09.11.18 16:42, Andrii Anisov wrote:
> Hello Julien,
>
> I just wonder, do you plan to upstream the patch below?
>
> Andrii Anisov
>
>
>
> commit 11e360b93be81a58a41832d714f33f797ad312a9
> Author: Julien Grall <julien.grall@arm.com>
> Date:   Mon Oct 29 13:32:56 2018 +0000
>
>       xen/arm: Re-enable interrupt later in the trap path
>
>       Signed-off-by: Julien Grall <julien.grall@arm.com>
>
> diff --git a/xen/arch/arm/arm64/entry.S b/xen/arch/arm/arm64/entry.S
> index 97b05f53ea..8f287891b6 100644
> --- a/xen/arch/arm/arm64/entry.S
> +++ b/xen/arch/arm/arm64/entry.S
> @@ -195,7 +195,6 @@ hyp_error_invalid:
>
>    hyp_error:
>            entry   hyp=1
> -        msr     daifclr, #2
>            mov     x0, sp
>            bl      do_trap_hyp_serror
>            exit    hyp=1
> @@ -203,7 +202,7 @@ hyp_error:
>    /* Traps taken in Current EL with SP_ELx */
>    hyp_sync:
>            entry   hyp=1
> -        msr     daifclr, #6
> +        msr     daifclr, #4
>            mov     x0, sp
>            bl      do_trap_hyp_sync
>            exit    hyp=1
> @@ -304,7 +303,7 @@ guest_sync_slowpath:
>            ALTERNATIVE("bl check_pending_vserror; cbnz x0, 1f",
>                        "nop; nop",
>                        SKIP_SYNCHRONIZE_SERROR_ENTRY_EXIT)
> -        msr     daifclr, #6
> +        msr     daifclr, #4
>            mov     x0, sp
>            bl      do_trap_guest_sync
>    1:
> @@ -332,7 +331,7 @@ guest_fiq_invalid:
>
>    guest_error:
>            entry   hyp=0, compat=0
> -        msr     daifclr, #6
> +        msr     daifclr, #4
>            mov     x0, sp
>            bl      do_trap_guest_serror
>            exit    hyp=0, compat=0
> @@ -347,7 +346,7 @@ guest_sync_compat:
>            ALTERNATIVE("bl check_pending_vserror; cbnz x0, 1f",
>                        "nop; nop",
>                        SKIP_SYNCHRONIZE_SERROR_ENTRY_EXIT)
> -        msr     daifclr, #6
> +        msr     daifclr, #4
>            mov     x0, sp
>            bl      do_trap_guest_sync
>    1:
> @@ -375,7 +374,7 @@ guest_fiq_invalid_compat:
>
>    guest_error_compat:
>            entry   hyp=0, compat=1
> -        msr     daifclr, #6
> +        msr     daifclr, #4
>            mov     x0, sp
>            bl      do_trap_guest_serror
>            exit    hyp=0, compat=1
> diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
> index 51d2e42c77..c18f89b41f 100644
> --- a/xen/arch/arm/traps.c
> +++ b/xen/arch/arm/traps.c
> @@ -2039,6 +2039,8 @@ static void enter_hypervisor_head(struct cpu_user_regs *regs)
>        {
>            struct vcpu *v = current;
>
> +        ASSERT(!local_irq_is_enabled());
> +
>            /* If the guest has disabled the workaround, bring it back on. */
>            if ( needs_ssbd_flip(v) )
>                arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_2_FID, 1, NULL);
> @@ -2073,6 +2075,7 @@ void do_trap_guest_sync(struct cpu_user_regs *regs)
>        const union hsr hsr = { .bits = regs->hsr };
>
>        enter_hypervisor_head(regs);
> +    local_irq_enable();
>
>        switch ( hsr.ec )
>        {
> @@ -2208,6 +2211,7 @@ void do_trap_hyp_sync(struct cpu_user_regs *regs)
>        const union hsr hsr = { .bits = regs->hsr };
>
>        enter_hypervisor_head(regs);
> +    local_irq_enable();
>
>        switch ( hsr.ec )
>        {
> @@ -2246,6 +2250,7 @@ void do_trap_hyp_sync(struct cpu_user_regs *regs)
>    void do_trap_hyp_serror(struct cpu_user_regs *regs)
>    {
>        enter_hypervisor_head(regs);
> +    local_irq_enable();
>
>        __do_trap_serror(regs, VABORT_GEN_BY_GUEST(regs));
>    }
> @@ -2253,6 +2258,7 @@ void do_trap_hyp_serror(struct cpu_user_regs *regs)
>    void do_trap_guest_serror(struct cpu_user_regs *regs)
>    {
>        enter_hypervisor_head(regs);
> +    local_irq_enable();
>
>        __do_trap_serror(regs, true);
>    }
>
-- 
Sincerely,
Andrii Anisov.


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  parent reply	other threads:[~2018-11-19 15:54 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-23 18:17 [PATCH 0/4] xen/arm: GIC fixes and improvement Julien Grall
2018-10-23 18:17 ` [PATCH 1/4] xen/arm: gic: Ensure we have an ISB between ack and do_IRQ() Julien Grall
2018-10-24  9:38   ` Andrii Anisov
2018-10-24 14:41     ` Julien Grall
2018-10-25 14:11       ` Andrii Anisov
2018-10-25 14:22         ` Julien Grall
2018-10-25 17:45           ` Andrii Anisov
2018-10-26 12:49         ` Andrii Anisov
2018-10-26 21:55           ` Julien Grall
2018-10-27 12:14             ` Andrii Anisov
2018-10-28 11:46               ` Julien Grall
2018-10-29 10:06               ` Andrii Anisov
2018-10-29 13:36                 ` Julien Grall
2018-10-29 16:16                   ` Andrii Anisov
2018-10-29 16:22                     ` Julien Grall
2018-10-30  8:07                       ` Andrii Anisov
2018-11-09 14:42                   ` Andrii Anisov
2018-11-09 17:47                     ` Julien Grall
2018-11-19 15:54                     ` Andrii Anisov [this message]
2018-11-19 16:42                       ` Julien Grall
2018-11-20 18:10                         ` Andrii Anisov
2018-11-20 18:47                           ` Julien Grall
2018-11-22 16:51                             ` Andrii Anisov
2018-11-22 17:22                               ` Julien Grall
2018-11-23 10:09                                 ` Andrii Anisov
2018-11-23 12:18                                   ` Andre Przywara
2018-11-23 13:04                                     ` Andrii Anisov
2018-11-30 19:52                                     ` Andrii Anisov
2018-12-03 13:46                                       ` Andre Przywara
2018-12-03 13:53                                         ` Juergen Gross
2018-12-03 14:36                                           ` Andrii Anisov
2018-12-04 17:16                                             ` Julien Grall
2018-12-03 15:28                                         ` Andrii Anisov
2018-11-28  0:30                                 ` Stefano Stabellini
2018-11-22 18:04                               ` Andre Przywara
2018-11-23 12:58                                 ` Andrii Anisov
2018-11-23 13:27                                   ` Julien Grall
2018-11-27 13:30                                     ` Andrii Anisov
2018-11-27 15:13                                       ` Julien Grall
2018-12-03 12:08                                         ` Andrii Anisov
2018-12-03 12:17                                           ` Julien Grall
2018-12-03 12:58                                             ` Andrii Anisov
2018-12-03 13:10                                               ` Julien Grall
2018-10-25 17:46   ` Andrii Anisov
2018-11-09 23:02   ` Stefano Stabellini
2018-10-23 18:17 ` [PATCH 2/4] xen/arm: gic: Ensure ordering between read of INTACK and shared data Julien Grall
2018-10-24 15:40   ` Andrii Anisov
2018-11-09 23:02   ` Stefano Stabellini
2018-10-23 18:17 ` [PATCH 3/4] xen/arm: gic: Remove duplicated comment in do_sgi Julien Grall
2018-10-24 10:26   ` Andrii Anisov
2018-11-09 23:03   ` Stefano Stabellini
2018-10-23 18:17 ` [PATCH 4/4] xen/arm: gic: Relax barrier when sending an SGI Julien Grall
2018-10-24 13:32   ` Andrii Anisov
2018-10-24 14:46     ` Julien Grall
2018-10-24 15:40       ` Andrii Anisov
2018-10-24 15:44         ` Julien Grall
2018-11-09 23:14   ` Stefano Stabellini
2018-11-12 12:15     ` Julien Grall
  -- strict thread matches above, loose matches on Subject: below --
2018-10-29 16:46 [PATCH 1/4] xen/arm: gic: Ensure we have an ISB between ack and do_IRQ() Andrii Anisov

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