Re: [PATCH v3 12/15] drm/amdgpu/gfx: add a gfx engine soft reset

["Timur Kristóf" <timur.kristof@gmail.com>]

On Wed, 2026-10-28 at 16:56 +0800, Jesse Zhang wrote:
> Add amdgpu_gfx_soft_reset_engine(), the soft_reset_engine() IP block
> callback of the gfx IPs, around the reset_engine callback. It only
> supports the graphics engine so far. The IP block soft reset stops,
> backs up and replays the kernel gfx rings around it; the compute
> rings
> aren't stopped.
> 
> MES is suspended across the reset, so that it doesn't schedule or map
> queues while the CP front-end is reset. The compute queues are
> preempted
> meanwhile: their work is only paused. MES
> fetches its commands through the CP front-end though, and a hung gfx
> stream can keep it from completing the suspend. Reset the engine
> anyway:
> the reset frees the front-end.
> 
> The reset also clears the HQDs of the gfx user queues. Call
> amdgpu_userq_pre_engine_reset() after the MES suspend, to save the
> ring
> state of the queues still on a HQD, and
> amdgpu_userq_post_engine_reset()
> after the reset, before MES resumes, to restore them. @guilty_queue
> is
> the gfx user queue that hung, if any: it is hung instead. If the
> engine
> reset fails, amdgpu_userq_cancel_engine_reset() drops the saved ring
> state for the full reset that follows.
> 
> Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 41
> +++++++++++++++++++++++++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h |  3 ++
>  2 files changed, 44 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index 0ae6e990c310..f1a26e4eb06c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -2181,6 +2181,47 @@ int amdgpu_gfx_reset_mes_gfx(struct
> amdgpu_device *adev,
>  	return r;
>  }
>  
> +/**
> + * amdgpu_gfx_soft_reset_engine() - Soft reset one engine of the GFX
> IP.
> + *
> + * @ip_block: The GFX IP block.
> + * @engine: The engine to reset.
> + * @guilty_queue: The user queue that hung, or NULL.
> + *
> + * soft_reset_engine() IP block callback around the reset_engine
> callback,
> + * which resets the CP of the engine. Only the graphics engine is
> supported
> + * so far.
> + */
> +int amdgpu_gfx_soft_reset_engine(struct amdgpu_ip_block *ip_block,
> +				 enum amd_ip_engine engine,
> +				 struct amdgpu_usermode_queue
> *guilty_queue)
> +{
> +	struct amdgpu_device *adev = ip_block->adev;
> +	int r;
> +
> +	if (engine != AMD_IP_ENGINE_GFX || !adev->gfx.funcs-
> >reset_engine)
> +		return -EOPNOTSUPP;
> +
> +	mutex_lock(&adev->gfx.mec.reset_mutex);
> +
> +	/* The suspend may time out while the gfx engine hangs:
> reset anyway. */
> +	amdgpu_mes_suspend(adev, 0);
> +	amdgpu_userq_pre_engine_reset(adev, AMDGPU_HW_IP_GFX);
> +	r = adev->gfx.funcs->reset_engine(adev, engine);
> +	if (r) {
> +		amdgpu_userq_cancel_engine_reset(adev,
> AMDGPU_HW_IP_GFX);
> +		amdgpu_mes_resume(adev, 0);
> +		goto exit;
> +	}
> +
> +	amdgpu_userq_post_engine_reset(adev, AMDGPU_HW_IP_GFX,
> guilty_queue);
> +	r = amdgpu_mes_resume(adev, 0);
> +
> +exit:
> +	mutex_unlock(&adev->gfx.mec.reset_mutex);
> +	return r;
> +}

I think the additional functionality should be added to
the amdgpu_device_ip_soft_reset() function as well.

> +
>  int amdgpu_gfx_mes_reset_queue(struct amdgpu_ring *ring,
>  			       unsigned int vmid,
>  			       struct amdgpu_fence *timedout_fence,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> index 6bbf53359a49..d63d9f5f5b96 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> @@ -740,6 +740,9 @@ void amdgpu_gfx_pipe_reset_prepare(struct
> amdgpu_device *adev,
>  				   struct amdgpu_ring *guilty_ring,
>  				   u32 me, u32 pipe,
>  				   struct amdgpu_gfx_pipe_reset_ctx
> *ctx);
> +int amdgpu_gfx_soft_reset_engine(struct amdgpu_ip_block *ip_block,
> +				 enum amd_ip_engine engine,
> +				 struct amdgpu_usermode_queue
> *guilty_queue);
>  int amdgpu_gfx_reset_mes_gfx(struct amdgpu_device *adev,
>  			     struct amdgpu_ring *ring,
>  			     struct amdgpu_fence *guilty_fence,