* TH1520: broken CPU count detection @ 2026-09-15 7:31 Michael Opdenacker 2026-09-16 16:42 ` Yao Zi 0 siblings, 1 reply; 5+ messages in thread From: Michael Opdenacker @ 2026-09-15 7:31 UTC (permalink / raw) To: opensbi; +Cc: michael.opdenacker, Drew Fustini, guoren, wefu, inochiama Greetings, For the Yocto meta-riscv layer, we're trying to replace the downstream opensbi (called opensbi-revyos) by mainline opensbi: https://github.com/riscv/meta-riscv/pull/685/ The board boots fine, but unfortunately, only 1 CPU core is detected. This surfaces in the Linux kernel log: [ 0.089851] smp: Bringing up secondary CPUs ... [ 10.165542] CPU1 failed to report alive state [ 20.241632] CPU2 failed to report alive state [ 30.316980] CPU3 failed to report alive state Any tips for solving this issue? Thanks in advance Cheers Michael -- opensbi mailing list opensbi@lists.infradead.org http://lists.infradead.org/mailman/listinfo/opensbi ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: TH1520: broken CPU count detection 2026-09-15 7:31 TH1520: broken CPU count detection Michael Opdenacker @ 2026-09-16 16:42 ` Yao Zi 2026-09-17 10:54 ` Michael Opdenacker 0 siblings, 1 reply; 5+ messages in thread From: Yao Zi @ 2026-09-16 16:42 UTC (permalink / raw) To: Michael Opdenacker, opensbi; +Cc: Drew Fustini, guoren, wefu, inochiama, Yao Zi On Tue, Sep 15, 2026 at 09:31:01AM +0200, Michael Opdenacker wrote: > Greetings, > > For the Yocto meta-riscv layer, we're trying to replace the downstream > opensbi (called opensbi-revyos) by mainline opensbi: > https://github.com/riscv/meta-riscv/pull/685/ > > The board boots fine, but unfortunately, only 1 CPU core is detected. This > surfaces in the Linux kernel log: > > [ 0.089851] smp: Bringing up secondary CPUs ... > [ 10.165542] CPU1 failed to report alive state > [ 20.241632] CPU2 failed to report alive state > [ 30.316980] CPU3 failed to report alive state What Linux kernel are you using? > Any tips for solving this issue? > Thanks in advance > Cheers > Michael > > > -- > opensbi mailing list > opensbi@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/opensbi -- opensbi mailing list opensbi@lists.infradead.org http://lists.infradead.org/mailman/listinfo/opensbi ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: TH1520: broken CPU count detection 2026-09-16 16:42 ` Yao Zi @ 2026-09-17 10:54 ` Michael Opdenacker 2026-09-17 17:36 ` Yao Zi 0 siblings, 1 reply; 5+ messages in thread From: Michael Opdenacker @ 2026-09-17 10:54 UTC (permalink / raw) To: Yao Zi; +Cc: michael.opdenacker, Drew Fustini, guoren, wefu, inochiama, opensbi Hi Yao On 9/16/26 6:42 PM, Yao Zi wrote: > On Tue, Sep 15, 2026 at 09:31:01AM +0200, Michael Opdenacker wrote: >> Greetings, >> >> For the Yocto meta-riscv layer, we're trying to replace the downstream >> opensbi (called opensbi-revyos) by mainline opensbi: >> https://github.com/riscv/meta-riscv/pull/685/ >> >> The board boots fine, but unfortunately, only 1 CPU core is detected. This >> surfaces in the Linux kernel log: >> >> [ 0.089851] smp: Bringing up secondary CPUs ... >> [ 10.165542] CPU1 failed to report alive state >> [ 20.241632] CPU2 failed to report alive state >> [ 30.316980] CPU3 failed to report alive state > What Linux kernel are you using? I'm using mainline Linux 7.2.x. Is this something Linux can manage? Thanks Michael -- opensbi mailing list opensbi@lists.infradead.org http://lists.infradead.org/mailman/listinfo/opensbi ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: TH1520: broken CPU count detection 2026-09-17 10:54 ` Michael Opdenacker @ 2026-09-17 17:36 ` Yao Zi [not found] ` <7d24d195-02e4-46d3-b0a3-4c48bf6a0d90@rootcommit.com> 0 siblings, 1 reply; 5+ messages in thread From: Yao Zi @ 2026-09-17 17:36 UTC (permalink / raw) To: Michael Opdenacker, Yao Zi; +Cc: Drew Fustini, guoren, wefu, inochiama, opensbi On Thu, Sep 17, 2026 at 12:54:49PM +0200, Michael Opdenacker wrote: > Hi Yao > > On 9/16/26 6:42 PM, Yao Zi wrote: > > On Tue, Sep 15, 2026 at 09:31:01AM +0200, Michael Opdenacker wrote: > > > Greetings, > > > > > > For the Yocto meta-riscv layer, we're trying to replace the downstream > > > opensbi (called opensbi-revyos) by mainline opensbi: > > > https://github.com/riscv/meta-riscv/pull/685/ > > > > > > The board boots fine, but unfortunately, only 1 CPU core is detected. This > > > surfaces in the Linux kernel log: > > > > > > [ 0.089851] smp: Bringing up secondary CPUs ... > > > [ 10.165542] CPU1 failed to report alive state > > > [ 20.241632] CPU2 failed to report alive state > > > [ 30.316980] CPU3 failed to report alive state > > What Linux kernel are you using? > I'm using mainline Linux 7.2.x. > Is this something Linux can manage? Okay, I guess I should have more sleep when writing this reply. I was meant to ask the U-Boot you're using. The problem is that, mainline OpenSBI doesn't have the ability to bring CPU cores out of reset, while T-Head's original vendor U-Boot doesn't, either, and relies on OpenSBI to do the stuff (iirc through a devicetree node called "reset-sample" or similar). So if you're working with T-Head's original U-Boot but with mainline OpenSBI, then there's no one bringing secondary cores up. RevyOS' fork of T-Head's U-Boot[1] implements bringing up logic, too, so it works with mainline OpenSBI. So does mainline U-Boot. > Thanks > Michael [1]: https://github.com/revyos/th1520-vendor-uboot/blob/th1520/arch/riscv/lib/bootm.c -- opensbi mailing list opensbi@lists.infradead.org http://lists.infradead.org/mailman/listinfo/opensbi ^ permalink raw reply [flat|nested] 5+ messages in thread
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* Re: TH1520: broken CPU count detection [not found] ` <7d24d195-02e4-46d3-b0a3-4c48bf6a0d90@rootcommit.com> @ 2026-09-28 8:44 ` Michael Opdenacker 0 siblings, 0 replies; 5+ messages in thread From: Michael Opdenacker @ 2026-09-28 8:44 UTC (permalink / raw) To: Yao Zi; +Cc: michael.opdenacker, Drew Fustini, guoren, wefu, inochiama, opensbi On 9/20/26 11:09 AM, Michael Opdenacker wrote: > > As you predicted, the issue detecting the number of CPU cores is gone. > I'm preparing a meta-riscv layer update for Yocto to automate all this. > FYI, these are now supported by Yocto's meta-riscv for the BeagleV Ahead board: https://github.com/riscv/meta-riscv/blob/master/docs/BeagleV-Ahead.md We also have a pull-request under review for LicheePI 4A, with mainline DDR training, OpenSBI, U-Boot and Linux: https://github.com/riscv/meta-riscv/pull/698 Thanks again! Michael. -- Root Commit Embedded Linux Training and Consulting. Yocto Ambassador. https://rootcommit.com -- opensbi mailing list opensbi@lists.infradead.org http://lists.infradead.org/mailman/listinfo/opensbi ^ permalink raw reply [flat|nested] 5+ messages in thread
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2026-09-15 7:31 TH1520: broken CPU count detection Michael Opdenacker
2026-09-16 16:42 ` Yao Zi
2026-09-17 10:54 ` Michael Opdenacker
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