From: Nicola Vetrini <nicola.vetrini@bugseng.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: xen-devel@lists.xenproject.org, sstabellini@kernel.org,
michal.orzel@amd.com, xenia.ragiadakou@amd.com,
ayan.kumar.halder@amd.com, consulting@bugseng.com,
jbeulich@suse.com, roger.pau@citrix.com, Wei Liu <wl@xen.org>
Subject: Re: [XEN PATCH 5/9] x86/cpu-policy: address violations of MISRA C Rule 10.1
Date: Mon, 09 Oct 2023 09:13:15 +0200 [thread overview]
Message-ID: <5f83ddda5c176cccce275f52f7905de5@bugseng.com> (raw)
In-Reply-To: <91d900b5-1298-4bb3-bd3d-6a829819a030@citrix.com>
On 06/10/2023 19:57, Andrew Cooper wrote:
> On 06/10/2023 9:26 am, Nicola Vetrini wrote:
>> The COUNT_LEAVES macro is introduced to avoid using an essentially
>> boolean value in a subtraction.
>>
>> No functional change.
>>
>> Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
>> ---
>> xen/include/xen/lib/x86/cpu-policy.h | 13 +++++++------
>> 1 file changed, 7 insertions(+), 6 deletions(-)
>>
>> diff --git a/xen/include/xen/lib/x86/cpu-policy.h
>> b/xen/include/xen/lib/x86/cpu-policy.h
>> index bab3eecda6c1..700993cc67e8 100644
>> --- a/xen/include/xen/lib/x86/cpu-policy.h
>> +++ b/xen/include/xen/lib/x86/cpu-policy.h
>> @@ -95,17 +95,18 @@ const char *x86_cpuid_vendor_to_str(unsigned int
>> vendor);
>> #define CPUID_GUEST_NR_EXTD MAX(CPUID_GUEST_NR_EXTD_INTEL, \
>> CPUID_GUEST_NR_EXTD_AMD)
>>
>> +#define COUNT_LEAVES(X) ((X) - ((X) ? 1 : 0))
>> /*
>> * Maximum number of leaves a struct cpu_policy turns into when
>> serialised for
>> * interaction with the toolstack. (Sum of all leaves in each union,
>> less the
>> * entries in basic which sub-unions hang off of.)
>> */
>> -#define CPUID_MAX_SERIALISED_LEAVES \
>> - (CPUID_GUEST_NR_BASIC + \
>> - CPUID_GUEST_NR_FEAT - !!CPUID_GUEST_NR_FEAT + \
>> - CPUID_GUEST_NR_CACHE - !!CPUID_GUEST_NR_CACHE + \
>> - CPUID_GUEST_NR_TOPO - !!CPUID_GUEST_NR_TOPO + \
>> - CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \
>> +#define CPUID_MAX_SERIALISED_LEAVES \
>> + (CPUID_GUEST_NR_BASIC + \
>> + COUNT_LEAVES(CPUID_GUEST_NR_FEAT) + \
>> + COUNT_LEAVES(CPUID_GUEST_NR_CACHE) + \
>> + COUNT_LEAVES(CPUID_GUEST_NR_TOPO) + \
>> + COUNT_LEAVES(CPUID_GUEST_NR_XSTATE) + \
>> CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ )
>
> This may not have been a MISRA-approved calculation, but encapsulating
> it like this breaks any ability to follow what's going on.
>
> CPUID data in x86 is mostly a sparse 1-D array (BASIC, EXTD, HV
> blocks),
> but a couple of elements in the BASIC array have arrays themselves.
>
> The struct is laid out for O(1) access, so you can't just say
> sizeof(struct) / sizeof(element). The BASIC array has elements (0x4,
> 0x7, 0xb, 0xd) which hold no data because there's actually an array
> elsewhere containing all the data.
>
> So logically, it's:
>
> (BASIC + (FEAT - 1) + (CACHE - 1) + (TOPO - 1) + (XSTATE - 1)) + EXTD +
> 2
>
> And in practice I'd far rather express it with a plain -1 than a -
> !!NR_, if the latter isn't an option.
>
> Presumably MISRA would be happy with that?
>
> If so, I can submit a patch. There's also a typo in that the comment
> that wants fixing.
>
> ~Andrew
Yes, that should be fine. I'll be happy to test that.
--
Nicola Vetrini, BSc
Software Engineer, BUGSENG srl (https://bugseng.com)
next prev parent reply other threads:[~2023-10-09 7:13 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-06 8:26 [XEN PATCH 0/9] address violations of MISRA C:2012 Rule 10.1 Nicola Vetrini
2023-10-06 8:26 ` [XEN PATCH][for-4.19 1/9] xen/include: add macro LOWEST_POW2 Nicola Vetrini
2023-10-06 9:29 ` Julien Grall
2023-10-06 10:02 ` Nicola Vetrini
2023-10-06 10:22 ` Julien Grall
2023-10-06 10:34 ` Nicola Vetrini
2023-10-06 14:35 ` Julien Grall
2023-10-06 15:36 ` Nicola Vetrini
2023-10-07 0:05 ` Stefano Stabellini
2023-10-07 0:29 ` Stefano Stabellini
2023-10-09 8:23 ` Nicola Vetrini
2023-10-06 16:35 ` andrew.cooper3
2023-10-09 7:08 ` Nicola Vetrini
2023-10-06 8:26 ` [XEN PATCH][for-4.19 2/9] arm/bitops: encapsulate violation of MISRA C:2012 Rule 10.1 Nicola Vetrini
2023-10-10 0:45 ` Stefano Stabellini
2023-10-06 8:26 ` [XEN PATCH][for-4.19 3/9] xen/pdx: amend definition of PDX_GROUP_COUNT Nicola Vetrini
2023-10-06 8:26 ` [XEN PATCH 4/9] x86_64/mm: express macro CNT using LOWEST_POW2 Nicola Vetrini
2023-10-06 8:26 ` [XEN PATCH 5/9] x86/cpu-policy: address violations of MISRA C Rule 10.1 Nicola Vetrini
2023-10-06 17:57 ` Andrew Cooper
2023-10-09 7:13 ` Nicola Vetrini [this message]
2023-10-06 8:26 ` [XEN PATCH 6/9] x86/io_apic: address violation of MISRA C:2012 " Nicola Vetrini
2023-10-10 0:48 ` Stefano Stabellini
2023-10-06 8:26 ` [XEN PATCH 7/9] x86/mce: Move MC_NCLASSES into the enum mctelem_class Nicola Vetrini
2023-10-06 19:11 ` andrew.cooper3
2023-10-09 7:15 ` Nicola Vetrini
2023-10-06 8:26 ` [XEN PATCH][for-4.19 8/9] xen/types: address Rule 10.1 for DECLARE_BITMAP use Nicola Vetrini
2023-10-06 9:34 ` Julien Grall
2023-10-06 10:10 ` Nicola Vetrini
2023-10-06 14:47 ` Julien Grall
2023-10-07 1:04 ` Stefano Stabellini
2023-10-09 7:48 ` Nicola Vetrini
2023-10-09 9:09 ` Julien Grall
2023-10-10 1:09 ` Stefano Stabellini
2023-10-10 10:53 ` Julien Grall
2023-10-10 12:07 ` Nicola Vetrini
2023-10-10 12:13 ` Julien Grall
2023-10-10 12:15 ` Julien Grall
2023-10-10 12:55 ` Nicola Vetrini
2023-10-10 14:20 ` Nicola Vetrini
2023-10-09 7:44 ` Nicola Vetrini
2023-10-06 8:26 ` [XEN PATCH 9/9] xen/compat: address Rule 10.1 for macros CHECK_SIZE Nicola Vetrini
2023-10-10 1:02 ` Stefano Stabellini
2023-10-10 16:00 ` Andrew Cooper
2023-10-10 16:06 ` Nicola Vetrini
2023-10-10 16:19 ` Andrew Cooper
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