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* [PATCH v2 00/12] Panel Replay + Adaptive sync
@ 2025-05-20 16:53 Jouni Högander
  2025-05-20 16:53 ` [PATCH v2 01/12] drm/panelreplay: Panel Replay capability DPCD register definitions Jouni Högander
                   ` (23 more replies)
  0 siblings, 24 replies; 34+ messages in thread
From: Jouni Högander @ 2025-05-20 16:53 UTC (permalink / raw)
  To: intel-gfx, intel-xe, dri-devel; +Cc: Jouni Högander

This patch set is adding missing configuration to have Panel Replay
and Adaptive Sync enabled simultaneously. Also some issues identified
while debugging are fixed:

1. Source PORT ALPM configuration has to made during modeset.
2. PHY_CMN1_CONTROL is not written according to HAS document
3. Wrong register field definitions for PORT_ALPM_LFPS_CTL.

Patches are tested on LunarLake and PantheLake using our reference panel supporting
Adaptive Sync and Panel Replay.

EMP_AS_SDP_TL is currently missing completely from drm-tip. There is a patch for that which is needed if testing these patches:

https://patchwork.freedesktop.org/series/148421/

Otherwise "PSR idle timeout" errors are seen while testing.

v2:
  - rework Panel Replay DPCD register definitions
  - do not use hardcoded indices while accessing intel_dp->pr_dpcd
  - ensure ALPM registers are not written on platform where they do
    not exist
  - remove kerneldoc comments

Jouni Högander (12):
  drm/panelreplay: Panel Replay capability DPCD register definitions
  drm/dp: Add Panel Replay capability bits from DP2.1 specification
  drm/i915/psr: Read all Panel Replay capability registers from DPCD
  drm/i915/alpm: Add PR_ALPM_CTL register definitions
  drm/i915/alpm: Write PR_ALPM_CTL register
  drm/i915/psr: Add interface to check if AUXLess ALPM is needed by PSR
  drm/i915/alpm: Add new interface to check if AUXLess ALPM is used
  drm/i915/alpm: Move port alpm configuration
  drm/i915/display: Add PHY_CMN1_CONTROL register definitions
  drm/i915/display: Add function to configure LFPS sending
  drm/i915/psr: Fix using wrong mask in REG_FIELD_PREP
  drm/i915/psr: Do not disable Panel Replay in case VRR is enabled

 drivers/gpu/drm/i915/display/intel_alpm.c     | 72 +++++++++++++------
 drivers/gpu/drm/i915/display/intel_alpm.h     |  4 ++
 drivers/gpu/drm/i915/display/intel_cx0_phy.c  | 32 +++++++++
 drivers/gpu/drm/i915/display/intel_cx0_phy.h  |  2 +
 .../gpu/drm/i915/display/intel_cx0_phy_regs.h |  3 +
 drivers/gpu/drm/i915/display/intel_ddi.c      | 12 ++++
 .../drm/i915/display/intel_display_types.h    |  4 +-
 drivers/gpu/drm/i915/display/intel_psr.c      | 44 +++++++-----
 drivers/gpu/drm/i915/display/intel_psr.h      |  2 +
 drivers/gpu/drm/i915/display/intel_psr_regs.h | 14 +++-
 include/drm/display/drm_dp.h                  | 18 +++--
 11 files changed, 163 insertions(+), 44 deletions(-)

-- 
2.43.0


^ permalink raw reply	[flat|nested] 34+ messages in thread

end of thread, other threads:[~2025-05-21  5:43 UTC | newest]

Thread overview: 34+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-05-20 16:53 [PATCH v2 00/12] Panel Replay + Adaptive sync Jouni Högander
2025-05-20 16:53 ` [PATCH v2 01/12] drm/panelreplay: Panel Replay capability DPCD register definitions Jouni Högander
2025-05-21  4:50   ` Nautiyal, Ankit K
2025-05-20 16:53 ` [PATCH v2 02/12] drm/dp: Add Panel Replay capability bits from DP2.1 specification Jouni Högander
2025-05-21  4:49   ` Nautiyal, Ankit K
2025-05-21  5:40     ` Hogander, Jouni
2025-05-20 16:53 ` [PATCH v2 03/12] drm/i915/psr: Read all Panel Replay capability registers from DPCD Jouni Högander
2025-05-21  4:52   ` Nautiyal, Ankit K
2025-05-20 16:53 ` [PATCH v2 04/12] drm/i915/alpm: Add PR_ALPM_CTL register definitions Jouni Högander
2025-05-20 16:53 ` [PATCH v2 05/12] drm/i915/alpm: Write PR_ALPM_CTL register Jouni Högander
2025-05-20 16:53 ` [PATCH v2 06/12] drm/i915/psr: Add interface to check if AUXLess ALPM is needed by PSR Jouni Högander
2025-05-20 16:53 ` [PATCH v2 07/12] drm/i915/alpm: Add new interface to check if AUXLess ALPM is used Jouni Högander
2025-05-20 16:53 ` [PATCH v2 08/12] drm/i915/alpm: Move port alpm configuration Jouni Högander
2025-05-21  4:53   ` Nautiyal, Ankit K
2025-05-20 16:53 ` [PATCH v2 09/12] drm/i915/display: Add PHY_CMN1_CONTROL register definitions Jouni Högander
2025-05-20 16:53 ` [PATCH v2 10/12] drm/i915/display: Add function to configure LFPS sending Jouni Högander
2025-05-21  5:00   ` Nautiyal, Ankit K
2025-05-21  5:42     ` Hogander, Jouni
2025-05-20 16:53 ` [PATCH v2 11/12] drm/i915/psr: Fix using wrong mask in REG_FIELD_PREP Jouni Högander
2025-05-20 16:53 ` [PATCH v2 12/12] drm/i915/psr: Do not disable Panel Replay in case VRR is enabled Jouni Högander
2025-05-21  5:01   ` Nautiyal, Ankit K
2025-05-21  5:42     ` Hogander, Jouni
2025-05-20 17:39 ` ✗ Fi.CI.CHECKPATCH: warning for Panel Replay + Adaptive sync (rev2) Patchwork
2025-05-20 17:39 ` ✗ Fi.CI.SPARSE: " Patchwork
2025-05-20 17:53 ` ✓ CI.Patch_applied: success " Patchwork
2025-05-20 17:54 ` ✗ CI.checkpatch: warning " Patchwork
2025-05-20 17:55 ` ✓ CI.KUnit: success " Patchwork
2025-05-20 18:00 ` ✓ i915.CI.BAT: " Patchwork
2025-05-20 18:05 ` ✓ CI.Build: " Patchwork
2025-05-20 18:08 ` ✓ CI.Hooks: " Patchwork
2025-05-20 18:09 ` ✗ CI.checksparse: warning " Patchwork
2025-05-20 18:38 ` ✓ Xe.CI.BAT: success " Patchwork
2025-05-20 21:04 ` ✓ i915.CI.Full: " Patchwork
2025-05-21  3:55 ` ✗ Xe.CI.Full: failure " Patchwork

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