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From: Joachim Meyer <Jogi95@domain.hid>
To: Alexis Berlemont <berlemont.hauw@domain.hid>
Cc: xenomai@xenomai.org
Subject: Re: [Xenomai-help] Xenomai and Virtex II Pro (PPC405)
Date: Mon, 25 Feb 2008 20:03:33 +0100	[thread overview]
Message-ID: <608242735@domain.hid> (raw)

Hi

>I don't understand: I thought only the PPC405 cores were implemented as hard 
>IPs inside the FPGA, not the DDR/SDRAM controller, the EBC, etc.

Your probably right. I'm just starting to learn about FPGAs. But I didn't write anything in VHDL. But in the EDK (The Xilinx Programming Suite) I used the standard components on the builder, which includes some things like UART and DDRam, so the Code is probably in there as IP cores.

Thanks for all the information.
Joachim

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             reply	other threads:[~2008-02-25 19:03 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-02-25 19:03 Joachim Meyer [this message]
  -- strict thread matches above, loose matches on Subject: below --
2008-02-25 19:11 [Xenomai-help] Xenomai and Virtex II Pro (PPC405) Joachim Meyer
2008-02-25 19:09 Joachim Meyer
2008-02-26  8:30 ` Klaas Gadeyne
2008-02-24 13:42 Joachim Meyer
2008-02-25  3:51 ` Alexis Berlemont
2008-02-25  8:10   ` Jan Kiszka
2008-02-22 22:42 Joachim Meyer
2008-02-23  0:03 ` Alexis Berlemont
2008-02-25  8:07 ` Klaas Gadeyne

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