From: "Michał Grzelak" <michal.grzelak@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v2 5/6] drm/i915/gmbus: Drop the platform suffixes from GMBUS pins
Date: Tue, 23 Jun 2026 16:45:48 +0200 (CEST) [thread overview]
Message-ID: <6092b781-0b56-98cc-5bf0-e9ba00c062fa@intel.com> (raw)
In-Reply-To: <20260623141117.24115-1-ville.syrjala@linux.intel.com>
[-- Attachment #1: Type: text/plain, Size: 14100 bytes --]
On Tue, 23 Jun 2026, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The modern GMBUS pin numbers are just a sequential set of
> numbers, so the platform suffixes don't really buy us anything.
> Let's just drop them. We'll keep the _TCx suffixes for pins
> 9+ since that's the way they always get used.
>
> v2: Deal with gvt
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
BR,
Michał
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 62 ++++++++++----------
> drivers/gpu/drm/i915/display/intel_gmbus.c | 68 +++++++++++-----------
> drivers/gpu/drm/i915/display/intel_gmbus.h | 22 +++----
> drivers/gpu/drm/i915/display/intel_hdmi.c | 42 ++++++-------
> drivers/gpu/drm/i915/gvt/edid.c | 14 ++---
> 5 files changed, 104 insertions(+), 104 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index b6fe87c29aa7..15ebadc72b88 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -2197,52 +2197,52 @@ static u8 translate_iboost(struct intel_display *display, u8 val)
>
> static const u8 cnp_ddc_pin_map[] = {
> [0] = 0, /* N/A */
> - [GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B,
> - [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C,
> - [GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */
> - [GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */
> + [GMBUS_PIN_1] = DDC_BUS_DDI_B,
> + [GMBUS_PIN_2] = DDC_BUS_DDI_C,
> + [GMBUS_PIN_4] = DDC_BUS_DDI_D, /* sic */
> + [GMBUS_PIN_3] = DDC_BUS_DDI_F, /* sic */
> };
>
> static const u8 icp_ddc_pin_map[] = {
> - [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
> - [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
> - [GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C,
> - [GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1,
> - [GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2,
> - [GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3,
> - [GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4,
> - [GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5,
> - [GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6,
> + [GMBUS_PIN_1] = ICL_DDC_BUS_DDI_A,
> + [GMBUS_PIN_2] = ICL_DDC_BUS_DDI_B,
> + [GMBUS_PIN_3] = TGL_DDC_BUS_DDI_C,
> + [GMBUS_PIN_9_TC1] = ICL_DDC_BUS_PORT_1,
> + [GMBUS_PIN_10_TC2] = ICL_DDC_BUS_PORT_2,
> + [GMBUS_PIN_11_TC3] = ICL_DDC_BUS_PORT_3,
> + [GMBUS_PIN_12_TC4] = ICL_DDC_BUS_PORT_4,
> + [GMBUS_PIN_13_TC5] = TGL_DDC_BUS_PORT_5,
> + [GMBUS_PIN_14_TC6] = TGL_DDC_BUS_PORT_6,
> };
>
> static const u8 rkl_pch_tgp_ddc_pin_map[] = {
> - [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
> - [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
> - [GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D,
> - [GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E,
> + [GMBUS_PIN_1] = ICL_DDC_BUS_DDI_A,
> + [GMBUS_PIN_2] = ICL_DDC_BUS_DDI_B,
> + [GMBUS_PIN_9_TC1] = RKL_DDC_BUS_DDI_D,
> + [GMBUS_PIN_10_TC2] = RKL_DDC_BUS_DDI_E,
> };
>
> static const u8 adls_ddc_pin_map[] = {
> - [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
> - [GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1,
> - [GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2,
> - [GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3,
> - [GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4,
> + [GMBUS_PIN_1] = ICL_DDC_BUS_DDI_A,
> + [GMBUS_PIN_9_TC1] = ADLS_DDC_BUS_PORT_TC1,
> + [GMBUS_PIN_10_TC2] = ADLS_DDC_BUS_PORT_TC2,
> + [GMBUS_PIN_11_TC3] = ADLS_DDC_BUS_PORT_TC3,
> + [GMBUS_PIN_12_TC4] = ADLS_DDC_BUS_PORT_TC4,
> };
>
> static const u8 gen9bc_tgp_ddc_pin_map[] = {
> - [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B,
> - [GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C,
> - [GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D,
> + [GMBUS_PIN_2] = DDC_BUS_DDI_B,
> + [GMBUS_PIN_9_TC1] = DDC_BUS_DDI_C,
> + [GMBUS_PIN_10_TC2] = DDC_BUS_DDI_D,
> };
>
> static const u8 adlp_ddc_pin_map[] = {
> - [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
> - [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
> - [GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1,
> - [GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2,
> - [GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3,
> - [GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4,
> + [GMBUS_PIN_1] = ICL_DDC_BUS_DDI_A,
> + [GMBUS_PIN_2] = ICL_DDC_BUS_DDI_B,
> + [GMBUS_PIN_9_TC1] = ADLP_DDC_BUS_PORT_TC1,
> + [GMBUS_PIN_10_TC2] = ADLP_DDC_BUS_PORT_TC2,
> + [GMBUS_PIN_11_TC3] = ADLP_DDC_BUS_PORT_TC3,
> + [GMBUS_PIN_12_TC4] = ADLP_DDC_BUS_PORT_TC4,
> };
>
> static u8 map_ddc_pin(struct intel_display *display, u8 vbt_pin)
> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
> index dec0f66f756f..60a70dea5d85 100644
> --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
> @@ -105,55 +105,55 @@ static const struct gmbus_pin gmbus_pins_spt[] = {
> };
>
> static const struct gmbus_pin gmbus_pins_bxt[] = {
> - [GMBUS_PIN_1_BXT] = { "dpb", GPIO_1 },
> - [GMBUS_PIN_2_BXT] = { "dpc", GPIO_2 },
> - [GMBUS_PIN_3_BXT] = { "misc", GPIO_3 },
> + [GMBUS_PIN_1] = { "dpb", GPIO_1 },
> + [GMBUS_PIN_2] = { "dpc", GPIO_2 },
> + [GMBUS_PIN_3] = { "misc", GPIO_3 },
> };
>
> static const struct gmbus_pin gmbus_pins_cnp[] = {
> - [GMBUS_PIN_1_BXT] = { "dpb", GPIO_1 },
> - [GMBUS_PIN_2_BXT] = { "dpc", GPIO_2 },
> - [GMBUS_PIN_3_BXT] = { "misc", GPIO_3 },
> - [GMBUS_PIN_4_CNP] = { "dpd", GPIO_4 },
> + [GMBUS_PIN_1] = { "dpb", GPIO_1 },
> + [GMBUS_PIN_2] = { "dpc", GPIO_2 },
> + [GMBUS_PIN_3] = { "misc", GPIO_3 },
> + [GMBUS_PIN_4] = { "dpd", GPIO_4 },
> };
>
> static const struct gmbus_pin gmbus_pins_icp[] = {
> - [GMBUS_PIN_1_BXT] = { "dpa", GPIO_1 },
> - [GMBUS_PIN_2_BXT] = { "dpb", GPIO_2 },
> - [GMBUS_PIN_3_BXT] = { "dpc", GPIO_3 },
> - [GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIO_9 },
> - [GMBUS_PIN_10_TC2_ICP] = { "tc2", GPIO_10 },
> - [GMBUS_PIN_11_TC3_ICP] = { "tc3", GPIO_11 },
> - [GMBUS_PIN_12_TC4_ICP] = { "tc4", GPIO_12 },
> - [GMBUS_PIN_13_TC5_TGP] = { "tc5", GPIO_13 },
> - [GMBUS_PIN_14_TC6_TGP] = { "tc6", GPIO_14 },
> + [GMBUS_PIN_1] = { "dpa", GPIO_1 },
> + [GMBUS_PIN_2] = { "dpb", GPIO_2 },
> + [GMBUS_PIN_3] = { "dpc", GPIO_3 },
> + [GMBUS_PIN_9_TC1] = { "tc1", GPIO_9 },
> + [GMBUS_PIN_10_TC2] = { "tc2", GPIO_10 },
> + [GMBUS_PIN_11_TC3] = { "tc3", GPIO_11 },
> + [GMBUS_PIN_12_TC4] = { "tc4", GPIO_12 },
> + [GMBUS_PIN_13_TC5] = { "tc5", GPIO_13 },
> + [GMBUS_PIN_14_TC6] = { "tc6", GPIO_14 },
> };
>
> static const struct gmbus_pin gmbus_pins_dg1[] = {
> - [GMBUS_PIN_1_BXT] = { "dpa", GPIO_1 },
> - [GMBUS_PIN_2_BXT] = { "dpb", GPIO_2 },
> - [GMBUS_PIN_3_BXT] = { "dpc", GPIO_3 },
> - [GMBUS_PIN_4_CNP] = { "dpd", GPIO_4 },
> + [GMBUS_PIN_1] = { "dpa", GPIO_1 },
> + [GMBUS_PIN_2] = { "dpb", GPIO_2 },
> + [GMBUS_PIN_3] = { "dpc", GPIO_3 },
> + [GMBUS_PIN_4] = { "dpd", GPIO_4 },
> };
>
> static const struct gmbus_pin gmbus_pins_dg2[] = {
> - [GMBUS_PIN_1_BXT] = { "dpa", GPIO_1 },
> - [GMBUS_PIN_2_BXT] = { "dpb", GPIO_2 },
> - [GMBUS_PIN_3_BXT] = { "dpc", GPIO_3 },
> - [GMBUS_PIN_4_CNP] = { "dpd", GPIO_4 },
> - [GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIO_9 },
> + [GMBUS_PIN_1] = { "dpa", GPIO_1 },
> + [GMBUS_PIN_2] = { "dpb", GPIO_2 },
> + [GMBUS_PIN_3] = { "dpc", GPIO_3 },
> + [GMBUS_PIN_4] = { "dpd", GPIO_4 },
> + [GMBUS_PIN_9_TC1] = { "tc1", GPIO_9 },
> };
>
> static const struct gmbus_pin gmbus_pins_mtp[] = {
> - [GMBUS_PIN_1_BXT] = { "dpa", GPIO_1 },
> - [GMBUS_PIN_2_BXT] = { "dpb", GPIO_2 },
> - [GMBUS_PIN_3_BXT] = { "dpc", GPIO_3 },
> - [GMBUS_PIN_4_CNP] = { "dpd", GPIO_4 },
> - [GMBUS_PIN_5_MTP] = { "dpe", GPIO_5 },
> - [GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIO_9 },
> - [GMBUS_PIN_10_TC2_ICP] = { "tc2", GPIO_10 },
> - [GMBUS_PIN_11_TC3_ICP] = { "tc3", GPIO_11 },
> - [GMBUS_PIN_12_TC4_ICP] = { "tc4", GPIO_12 },
> + [GMBUS_PIN_1] = { "dpa", GPIO_1 },
> + [GMBUS_PIN_2] = { "dpb", GPIO_2 },
> + [GMBUS_PIN_3] = { "dpc", GPIO_3 },
> + [GMBUS_PIN_4] = { "dpd", GPIO_4 },
> + [GMBUS_PIN_5] = { "dpe", GPIO_5 },
> + [GMBUS_PIN_9_TC1] = { "tc1", GPIO_9 },
> + [GMBUS_PIN_10_TC2] = { "tc2", GPIO_10 },
> + [GMBUS_PIN_11_TC3] = { "tc3", GPIO_11 },
> + [GMBUS_PIN_12_TC4] = { "tc4", GPIO_12 },
> };
>
> static const struct gmbus_pin *get_gmbus_pin(struct intel_display *display,
> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.h b/drivers/gpu/drm/i915/display/intel_gmbus.h
> index 35a200a9efc0..5fdeab1aa794 100644
> --- a/drivers/gpu/drm/i915/display/intel_gmbus.h
> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.h
> @@ -20,17 +20,17 @@ struct intel_display;
> #define GMBUS_PIN_DPB 5 /* SDVO, HDMIB */
> #define GMBUS_PIN_DPD 6 /* HDMID */
> #define GMBUS_PIN_RESERVED 7 /* 7 reserved */
> -#define GMBUS_PIN_1_BXT 1 /* BXT+ (atom) and CNP+ (big core) */
> -#define GMBUS_PIN_2_BXT 2
> -#define GMBUS_PIN_3_BXT 3
> -#define GMBUS_PIN_4_CNP 4
> -#define GMBUS_PIN_5_MTP 5
> -#define GMBUS_PIN_9_TC1_ICP 9
> -#define GMBUS_PIN_10_TC2_ICP 10
> -#define GMBUS_PIN_11_TC3_ICP 11
> -#define GMBUS_PIN_12_TC4_ICP 12
> -#define GMBUS_PIN_13_TC5_TGP 13
> -#define GMBUS_PIN_14_TC6_TGP 14
> +#define GMBUS_PIN_1 1 /* BXT+ (atom) and CNP+ (big core) */
> +#define GMBUS_PIN_2 2
> +#define GMBUS_PIN_3 3
> +#define GMBUS_PIN_4 4
> +#define GMBUS_PIN_5 5
> +#define GMBUS_PIN_9_TC1 9 /* ICP+ */
> +#define GMBUS_PIN_10_TC2 10
> +#define GMBUS_PIN_11_TC3 11
> +#define GMBUS_PIN_12_TC4 12
> +#define GMBUS_PIN_13_TC5 13
> +#define GMBUS_PIN_14_TC6 14
>
> #define GMBUS_NUM_PINS 15 /* including 0 */
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index beca0ff5a5b4..f046918fd4bc 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2825,14 +2825,14 @@ static u8 bxt_encoder_to_ddc_pin(struct intel_encoder *encoder)
>
> switch (port) {
> case PORT_B:
> - ddc_pin = GMBUS_PIN_1_BXT;
> + ddc_pin = GMBUS_PIN_1;
> break;
> case PORT_C:
> - ddc_pin = GMBUS_PIN_2_BXT;
> + ddc_pin = GMBUS_PIN_2;
> break;
> default:
> MISSING_CASE(port);
> - ddc_pin = GMBUS_PIN_1_BXT;
> + ddc_pin = GMBUS_PIN_1;
> break;
> }
> return ddc_pin;
> @@ -2845,20 +2845,20 @@ static u8 cnp_encoder_to_ddc_pin(struct intel_encoder *encoder)
>
> switch (port) {
> case PORT_B:
> - ddc_pin = GMBUS_PIN_1_BXT;
> + ddc_pin = GMBUS_PIN_1;
> break;
> case PORT_C:
> - ddc_pin = GMBUS_PIN_2_BXT;
> + ddc_pin = GMBUS_PIN_2;
> break;
> case PORT_D:
> - ddc_pin = GMBUS_PIN_4_CNP;
> + ddc_pin = GMBUS_PIN_4;
> break;
> case PORT_F:
> - ddc_pin = GMBUS_PIN_3_BXT;
> + ddc_pin = GMBUS_PIN_3;
> break;
> default:
> MISSING_CASE(port);
> - ddc_pin = GMBUS_PIN_1_BXT;
> + ddc_pin = GMBUS_PIN_1;
> break;
> }
> return ddc_pin;
> @@ -2870,12 +2870,12 @@ static u8 icl_encoder_to_ddc_pin(struct intel_encoder *encoder)
> enum port port = encoder->port;
>
> if (intel_encoder_is_combo(encoder))
> - return GMBUS_PIN_1_BXT + port;
> + return GMBUS_PIN_1 + port;
> else if (intel_encoder_is_tc(encoder))
> - return GMBUS_PIN_9_TC1_ICP + intel_encoder_to_tc(encoder);
> + return GMBUS_PIN_9_TC1 + intel_encoder_to_tc(encoder);
>
> drm_WARN(display->drm, 1, "Unknown port:%c\n", port_name(port));
> - return GMBUS_PIN_2_BXT;
> + return GMBUS_PIN_2;
> }
>
> static u8 mcc_encoder_to_ddc_pin(struct intel_encoder *encoder)
> @@ -2885,17 +2885,17 @@ static u8 mcc_encoder_to_ddc_pin(struct intel_encoder *encoder)
>
> switch (phy) {
> case PHY_A:
> - ddc_pin = GMBUS_PIN_1_BXT;
> + ddc_pin = GMBUS_PIN_1;
> break;
> case PHY_B:
> - ddc_pin = GMBUS_PIN_2_BXT;
> + ddc_pin = GMBUS_PIN_2;
> break;
> case PHY_C:
> - ddc_pin = GMBUS_PIN_9_TC1_ICP;
> + ddc_pin = GMBUS_PIN_9_TC1;
> break;
> default:
> MISSING_CASE(phy);
> - ddc_pin = GMBUS_PIN_1_BXT;
> + ddc_pin = GMBUS_PIN_1;
> break;
> }
> return ddc_pin;
> @@ -2915,9 +2915,9 @@ static u8 rkl_encoder_to_ddc_pin(struct intel_encoder *encoder)
> * all outputs.
> */
> if (INTEL_PCH_TYPE(display) >= PCH_TGP && phy >= PHY_C)
> - return GMBUS_PIN_9_TC1_ICP + phy - PHY_C;
> + return GMBUS_PIN_9_TC1 + phy - PHY_C;
>
> - return GMBUS_PIN_1_BXT + phy;
> + return GMBUS_PIN_1 + phy;
> }
>
> static u8 gen9bc_tgp_encoder_to_ddc_pin(struct intel_encoder *encoder)
> @@ -2934,9 +2934,9 @@ static u8 gen9bc_tgp_encoder_to_ddc_pin(struct intel_encoder *encoder)
> * all outputs.
> */
> if (INTEL_PCH_TYPE(display) >= PCH_TGP && phy >= PHY_C)
> - return GMBUS_PIN_9_TC1_ICP + phy - PHY_C;
> + return GMBUS_PIN_9_TC1 + phy - PHY_C;
>
> - return GMBUS_PIN_1_BXT + phy;
> + return GMBUS_PIN_1 + phy;
> }
>
> static u8 dg1_encoder_to_ddc_pin(struct intel_encoder *encoder)
> @@ -2955,9 +2955,9 @@ static u8 adls_encoder_to_ddc_pin(struct intel_encoder *encoder)
> * except first combo output.
> */
> if (phy == PHY_A)
> - return GMBUS_PIN_1_BXT;
> + return GMBUS_PIN_1;
>
> - return GMBUS_PIN_9_TC1_ICP + phy - PHY_B;
> + return GMBUS_PIN_9_TC1 + phy - PHY_B;
> }
>
> static u8 g4x_encoder_to_ddc_pin(struct intel_encoder *encoder)
> diff --git a/drivers/gpu/drm/i915/gvt/edid.c b/drivers/gpu/drm/i915/gvt/edid.c
> index ca5b54466a65..dc9ef98ff51b 100644
> --- a/drivers/gpu/drm/i915/gvt/edid.c
> +++ b/drivers/gpu/drm/i915/gvt/edid.c
> @@ -90,13 +90,13 @@ static inline int cnp_get_port_from_gmbus0(u32 gmbus0)
> int port_select = gmbus0 & _GMBUS_PIN_SEL_MASK;
> int port = -EINVAL;
>
> - if (port_select == GMBUS_PIN_1_BXT)
> + if (port_select == GMBUS_PIN_1)
> port = PORT_B;
> - else if (port_select == GMBUS_PIN_2_BXT)
> + else if (port_select == GMBUS_PIN_2)
> port = PORT_C;
> - else if (port_select == GMBUS_PIN_3_BXT)
> + else if (port_select == GMBUS_PIN_3)
> port = PORT_D;
> - else if (port_select == GMBUS_PIN_4_CNP)
> + else if (port_select == GMBUS_PIN_4)
> port = PORT_E;
> return port;
> }
> @@ -106,11 +106,11 @@ static inline int bxt_get_port_from_gmbus0(u32 gmbus0)
> int port_select = gmbus0 & _GMBUS_PIN_SEL_MASK;
> int port = -EINVAL;
>
> - if (port_select == GMBUS_PIN_1_BXT)
> + if (port_select == GMBUS_PIN_1)
> port = PORT_B;
> - else if (port_select == GMBUS_PIN_2_BXT)
> + else if (port_select == GMBUS_PIN_2)
> port = PORT_C;
> - else if (port_select == GMBUS_PIN_3_BXT)
> + else if (port_select == GMBUS_PIN_3)
> port = PORT_D;
> return port;
> }
> --
> 2.53.0
>
>
next prev parent reply other threads:[~2026-06-23 14:45 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-23 12:51 [PATCH 0/6] drm/i915: Clean up GPIO pin stuff Ville Syrjala
2026-06-23 12:51 ` [PATCH 1/6] drm/i915/gmbus: Rename GPIO pins Ville Syrjala
2026-06-23 14:43 ` Michał Grzelak
2026-06-23 12:51 ` [PATCH 2/6] drm/i915/gmbus: s/gmbus_pins_bdw/gmbus_pins_lpt/ Ville Syrjala
2026-06-23 14:43 ` Michał Grzelak
2026-06-23 12:51 ` [PATCH 3/6] drm/i915/gmbus: Add gmbus_pins_lpt_lp[] Ville Syrjala
2026-06-23 14:45 ` Michał Grzelak
2026-06-23 12:51 ` [PATCH 4/6] drm/i915/gmbus: s/gmbus_pins_skl/gmbus_pins_spt/ Ville Syrjala
2026-06-23 14:45 ` Michał Grzelak
2026-06-23 12:51 ` [PATCH 5/6] drm/i915/gmbus: Drop the platform suffixes from GMBUS pins Ville Syrjala
2026-06-23 14:11 ` [PATCH v2 " Ville Syrjala
2026-06-23 14:45 ` Michał Grzelak [this message]
2026-06-23 12:51 ` [PATCH 6/6] drm/i915/hdmi: Remove CNP port F leftovers Ville Syrjala
2026-06-23 14:45 ` Michał Grzelak
2026-06-23 13:30 ` ✓ CI.KUnit: success for drm/i915: Clean up GPIO pin stuff Patchwork
2026-06-23 13:50 ` ✗ Fi.CI.BUILD: failure " Patchwork
2026-06-23 14:18 ` ✓ CI.KUnit: success for drm/i915: Clean up GPIO pin stuff (rev2) Patchwork
2026-06-23 15:04 ` ✓ i915.CI.BAT: " Patchwork
2026-06-23 15:14 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-23 20:12 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-06-23 22:38 ` ✗ i915.CI.Full: " Patchwork
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