Re: [PATCH v1 4/4] drm/rockchip: analogix_dp: Add support for RK3576

From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
To: hjc@rock-chips.com, heiko@sntech.de, andy.yan@rock-chips.com,
	maarten.lankhorst@linux.intel.com, mripard@kernel.org,
	tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	andrzej.hajda@intel.com, neil.armstrong@linaro.org,
	rfoss@kernel.org, Damon Ding <damon.ding@rock-chips.com>
Cc: Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se,
	jernej.skrabec@gmail.com, alchark@gmail.com,
	cristian.ciocaltea@collabora.com,
	sebastian.reichel@collabora.com, kever.yang@rock-chips.com,
	dmitry.baryshkov@oss.qualcomm.com, luca.ceresoli@bootlin.com,
	dianders@chromium.org, m.szyprowski@samsung.com,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	Damon Ding <damon.ding@rock-chips.com>
Subject: Re: [PATCH v1 4/4] drm/rockchip: analogix_dp: Add support for RK3576
Date: Mon, 16 Mar 2026 12:35:24 +0100	[thread overview]
Message-ID: <6140062.MhkbZ0Pkbq@workhorse> (raw)
In-Reply-To: <20260310105307.309765-5-damon.ding@rock-chips.com>

On Tuesday, 10 March 2026 11:53:07 Central European Standard Time Damon Ding wrote:
> RK3576 integrates the Analogix eDP 1.3 TX controller IP and the HDMI/eDP
> TX Combo PHY based on a Samsung IP block - both of which are the same as
> those on RK3588.
> 
> The patch currently adds only the basic support, specifically RGB output
> up to 4K@60Hz, without the tests for audio, PSR and other eDP 1.3 specific
> features.
> 
> In additon, the newly added clock 'hclk' is the video datapath clock,
> which must be enabled during probing for RK3576 eDP controller.
> 
> Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
> ---
>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 832e9766bef0..4f8511636cdf 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -71,6 +71,7 @@ struct rockchip_dp_device {
>  
>  	struct clk               *pclk;
>  	struct clk               *grfclk;
> +	struct clk               *hclk;
>  	struct regmap            *grf;
>  	struct reset_control     *rst;
>  	struct reset_control     *apbrst;
> @@ -327,6 +328,11 @@ static int rockchip_dp_of_probe(struct rockchip_dp_device *dp)
>  		return dev_err_probe(dev, PTR_ERR(dp->pclk),
>  				     "failed to get pclk property\n");
>  
> +	dp->hclk = devm_clk_get_optional_enabled(dev, "hclk");
> +	if (IS_ERR(dp->hclk))
> +		return dev_err_probe(dev, PTR_ERR(dp->hclk),
> +				     "failed to get hclk property\n");
> +
>  	dp->rst = devm_reset_control_get(dev, "dp");
>  	if (IS_ERR(dp->rst))
>  		return dev_err_probe(dev, PTR_ERR(dp->rst),
> @@ -514,6 +520,14 @@ static const struct rockchip_dp_chip_data rk3288_dp[] = {
>  	{ /* sentinel */ }
>  };
>  
> +static const struct rockchip_dp_chip_data rk3576_edp[] = {
> +	{
> +		.chip_type = RK3576_EDP,
> +		.reg = 0x27dc0000,
> +	},
> +	{ /* sentinel */ }
> +};
> +
>  static const struct rockchip_dp_chip_data rk3588_edp[] = {
>  	{
>  		.edp_mode = GRF_REG_FIELD(0x0000, 0, 0),
> @@ -531,6 +545,7 @@ static const struct rockchip_dp_chip_data rk3588_edp[] = {
>  static const struct of_device_id rockchip_dp_dt_ids[] = {
>  	{.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },
>  	{.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp },
> +	{.compatible = "rockchip,rk3576-edp", .data = &rk3576_edp },
>  	{.compatible = "rockchip,rk3588-edp", .data = &rk3588_edp },
>  	{}
>  };
> 

Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

Kind regards,
Nicolas Frattaroli