[Xenomai-help] Dual Core CPU - L2 Cache organization/reservation

[Xenomai-help] Dual Core CPU - L2 Cache organization/reservation

[M. Koehrer]

Hi all,

I made excellent results with Xenomai and the dual core Pentium D CPU.
I use one of the cores for real time code, the other core is used for housekeeping, communication...
Excellent means, that the runtime jitter of the real time application is extremely low.
For example, I have a physical model running that takes about 40 microseconds to run.
The runtime jitter on the dual core CPU is less than 3 microseconds. On the uni processor machine,
the runtime jitter is about 40-60 (!) microseconds.
On the dual core CPU the model seems to run completely out of the cache which is perfect for achieving
excellent computation times. On the UP system, the non-real time code seems to "eat up" the cache occasionally used by the real time core, i.e. the real time code has to re-load its cache from memory.

Now I read about the way the cache is organized in Intel's Core 2 Duo series. Here one common cache is 
used that is shared between both cores.
I have now the fear, that the Core 2 Duo CPU does not show this excellent results as the Pentium D as the non-real time code might "eat up" the cache as it does on a UP system.

Or is there a way that allows me to "reserve" parts of the common cache for one Core (or for the real time application, i.e. for certain physical addresses)?
Of course a real Multi CPU system (Xeon based) might help (Server/Workstation), however these systems 
are fairly expensive compared to the Core 2 Duo desktop systems...

Thanks for all feedback on this issue!

Regards

Mathias



-- 
Mathias Koehrer
mathias_koehrer@domain.hid


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