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* [PATCH v2] drm/i915/psr: Do not read PSR2_SU_STATUS on AlderLake and onwards
@ 2025-05-16  6:30 Jouni Högander
  2025-05-16  6:37 ` ✓ CI.Patch_applied: success for drm/i915/psr: Do not read PSR2_SU_STATUS on AlderLake and onwards (rev2) Patchwork
                   ` (11 more replies)
  0 siblings, 12 replies; 17+ messages in thread
From: Jouni Högander @ 2025-05-16  6:30 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: mika.kahola, Jouni Högander

Bspec comment on PSR2_SU_STATUS:

"This register has been tied-off since DG2/ADL-P (it returns zeros only)
and it has been removed on Xe2_LPD."

v2: fix inversed logic

Bspec: 69889
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 34 ++++++++++++++----------
 1 file changed, 20 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 430ad4ef7146..cd833b63ea6b 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -4021,24 +4021,30 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
 		int frame;
 
 		/*
-		 * Reading all 3 registers before hand to minimize crossing a
-		 * frame boundary between register reads
+		 * PSR2_SU_STATUS register has been tied-off since DG2/ADL-P
+		 * (it returns zeros only) and it has been removed on Xe2_LPD.
 		 */
-		for (frame = 0; frame < PSR2_SU_STATUS_FRAMES; frame += 3) {
-			val = intel_de_read(display,
-					    PSR2_SU_STATUS(display, cpu_transcoder, frame));
-			su_frames_val[frame / 3] = val;
-		}
+		if (DISPLAY_VER(display) < 13) {
+			/*
+			 * Reading all 3 registers before hand to minimize crossing a
+			 * frame boundary between register reads
+			 */
+			for (frame = 0; frame < PSR2_SU_STATUS_FRAMES; frame += 3) {
+				val = intel_de_read(display,
+						    PSR2_SU_STATUS(display, cpu_transcoder, frame));
+				su_frames_val[frame / 3] = val;
+			}
 
-		seq_puts(m, "Frame:\tPSR2 SU blocks:\n");
+			seq_puts(m, "Frame:\tPSR2 SU blocks:\n");
 
-		for (frame = 0; frame < PSR2_SU_STATUS_FRAMES; frame++) {
-			u32 su_blocks;
+			for (frame = 0; frame < PSR2_SU_STATUS_FRAMES; frame++) {
+				u32 su_blocks;
 
-			su_blocks = su_frames_val[frame / 3] &
-				    PSR2_SU_STATUS_MASK(frame);
-			su_blocks = su_blocks >> PSR2_SU_STATUS_SHIFT(frame);
-			seq_printf(m, "%d\t%d\n", frame, su_blocks);
+				su_blocks = su_frames_val[frame / 3] &
+					PSR2_SU_STATUS_MASK(frame);
+				su_blocks = su_blocks >> PSR2_SU_STATUS_SHIFT(frame);
+				seq_printf(m, "%d\t%d\n", frame, su_blocks);
+			}
 		}
 
 		seq_printf(m, "PSR2 selective fetch: %s\n",
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 17+ messages in thread

end of thread, other threads:[~2025-05-27  2:24 UTC | newest]

Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-05-16  6:30 [PATCH v2] drm/i915/psr: Do not read PSR2_SU_STATUS on AlderLake and onwards Jouni Högander
2025-05-16  6:37 ` ✓ CI.Patch_applied: success for drm/i915/psr: Do not read PSR2_SU_STATUS on AlderLake and onwards (rev2) Patchwork
2025-05-16  6:37 ` ✓ CI.checkpatch: " Patchwork
2025-05-16  6:38 ` ✓ CI.KUnit: " Patchwork
2025-05-16  6:51 ` ✓ CI.Build: " Patchwork
2025-05-16  6:55 ` ✓ CI.Hooks: " Patchwork
2025-05-16  6:56 ` ✓ CI.checksparse: " Patchwork
2025-05-16  7:19 ` ✓ Xe.CI.BAT: " Patchwork
2025-05-16  7:20 ` ✓ i915.CI.BAT: " Patchwork
2025-05-16  9:25 ` ✗ i915.CI.Full: failure " Patchwork
2025-05-19  6:45   ` Hogander, Jouni
2025-05-16 12:17 ` [PATCH v2] drm/i915/psr: Do not read PSR2_SU_STATUS on AlderLake and onwards Kahola, Mika
2025-05-16 12:41   ` Naladala, Ramanaidu
2025-05-19  7:01   ` Hogander, Jouni
2025-05-16 22:00 ` ✗ Xe.CI.Full: failure for drm/i915/psr: Do not read PSR2_SU_STATUS on AlderLake and onwards (rev2) Patchwork
2025-05-19  6:35   ` Hogander, Jouni
2025-05-27  2:24 ` ✗ CI.Patch_applied: " Patchwork

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